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5
Makefile
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5
Makefile
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all:reinette
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reinette:reinette.c
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gcc -Wall -O3 -lncurses reinette.c -o reinette
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567
reinette.c
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567
reinette.c
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// Reinette, emulates the Apple 1 computer
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// Copyright 2018 Arthur Ferreira
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// Last modified 5th of March 2019
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// initially developped on GNU/Linux
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// compiles with gcc 6.3.0-18
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#include <ncurses.h>
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#include <unistd.h> // for usleep()
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#include "woz.h"
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#define RAMSIZE 0xC000 // 48KB
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uint8_t ram[RAMSIZE];
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#define CARRY 0x01
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#define ZERO 0x02
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#define INTERRUPT 0x04
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#define DECIMAL 0x08
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#define BREAK 0x10
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#define UNDEFINED 0x20
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#define OVERFLOW 0x40
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#define SIGN 0x80
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struct Operand{
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bool setAcc;
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uint16_t value, address;
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}ope;
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struct Register{
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uint8_t A,X,Y,SR,SP;
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uint16_t PC;
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}reg;
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uint8_t key, keyRdy;
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// MEMORY AND I/O
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static uint8_t readMem(uint16_t address){
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static uint8_t queries=0; // slow down emulation when waiting for a keypress
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if (address < RAMSIZE) return (ram[address]);
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if (address >= ROMSTART) return (rom[address - ROMSTART]);
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if (address == 0xD011 ){ // is there a keypressed ?
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if (keyRdy) return(keyRdy); // yes
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if (! ++queries) usleep(100); // else sleep 100ms every 256 iterations
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return(0); // and return 0 (no keypressed)
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}
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if ((address == 0xD010) && keyRdy){ // is there a key waiting us ?
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keyRdy = 0; // yes, reset the keyRdy flag
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return(key | 0x80); // and return the key
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}
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return(0); // catch all
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}
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static void writeMem(uint16_t address, uint8_t value){
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if (address < RAMSIZE) ram[address] = value;
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else if (address == 0xD012){ // DSP, display one char
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value &= 0x7F;
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if (value == 0x7F) value = '@'; // make DEL printable
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if (value == 0x0D) value = 0x0A; // CR (\r) to LF (\n)
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if (value == 0x5F) // erase the previous character
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printw("%c%c%c",0x08,0x20,0x08); // BackSpace, Space , BackSpace
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else printw("%c",value);
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}
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}
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// RESET
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static void reset(){
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reg.PC = readMem(0xFFFC) | (readMem(0xFFFD) << 8);
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reg.SP = 0xFF;
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reg.SR |= UNDEFINED;
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key = 0;
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keyRdy = 0;
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ope.setAcc = false;
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ope.value = 0;
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ope.address = 0;
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}
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// STACK, SIGN AND ZERO FLAGS ROUTINES
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static void push(uint8_t value){
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writeMem(0x100 + reg.SP--, value);
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}
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uint8_t pull(){
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return(readMem(0x100 + ++reg.SP));
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}
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static void setSZ(uint8_t value){ // updates both the Sign & Zero FLAGS
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if (value & 0x00FF) reg.SR &= ~ZERO;
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else reg.SR |= ZERO;
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if (value & 0x80) reg.SR |= SIGN;
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else reg.SR &= ~SIGN;
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}
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// ADDRESSING MODES
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static void IMP(){ // Implicit
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}
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static void ACC(){ // ACCumulator
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ope.value = reg.A;
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ope.setAcc = true;
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}
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static void IMM(){ // IMMediate
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ope.address = reg.PC++;
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ope.value = readMem(ope.address);
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}
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static void ZPG(){ // Zero PaGe
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ope.address = readMem(reg.PC++);
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ope.value = readMem(ope.address);
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}
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static void ZPX(){ // Zero PaGe,X
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ope.address = (readMem(reg.PC++) + reg.X) & 0xFF;
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ope.value = readMem(ope.address);
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}
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static void ZPY(){ // Zero PaGe,Y
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ope.address = (readMem(reg.PC++) + reg.Y) & 0xFF;
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ope.value = readMem(ope.address);
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}
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static void REL(){ // RELative (for branch instructions)
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ope.address = readMem(reg.PC++);
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if (ope.address & 0x80) ope.address |= 0xFF00; // branch backward
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}
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static void ABS(){ // ABSolute
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ope.address = readMem(reg.PC) | (readMem(reg.PC + 1) << 8);
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ope.value = readMem(ope.address);
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reg.PC += 2;
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}
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static void ABX(){ // ABsolute,X
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ope.address = (readMem(reg.PC) | (readMem(reg.PC + 1) << 8)) + reg.X;
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ope.value = readMem(ope.address);
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reg.PC += 2;
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}
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static void ABY(){ // ABsolute,Y
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ope.address = (readMem(reg.PC) | (readMem(reg.PC + 1) << 8)) + reg.Y;
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ope.value = readMem(ope.address);
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reg.PC += 2;
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}
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static void IND(){ // INDirect - JMP ($ABCD) with page-boundary wraparound bug
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uint16_t vector1 = readMem(reg.PC) | (readMem(reg.PC + 1) << 8);
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uint16_t vector2 = (vector1 & 0xFF00) | ((vector1 + 1) & 0x00FF);
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ope.address = readMem(vector1) | (readMem(vector2) << 8);
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ope.value = readMem(ope.address);
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reg.PC += 2;
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}
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static void IDX(){ // InDexed indirect X
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uint16_t vector1 = ((readMem(reg.PC++) + reg.X) & 0xFF);
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ope.address = readMem(vector1&0x00FF) | (readMem((vector1+1) & 0x00FF) << 8);
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ope.value = readMem(ope.address);
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}
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static void IDY(){ // InDirect Indexed Y
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uint16_t vector1 = readMem(reg.PC++);
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uint16_t vector2 = (vector1 & 0xFF00) | ((vector1 + 1) & 0x00FF);
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ope.address = (readMem(vector1) | (readMem(vector2) << 8)) + reg.Y;
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ope.value = readMem(ope.address);
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}
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// INSTRUCTIONS
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static void NOP(){ // NO Operation
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}
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static void BRK(){ // BReaK
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push(((++reg.PC) >> 8) & 0xFF);
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push(reg.PC & 0xFF);
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push(reg.SR | BREAK);
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reg.SR |= INTERRUPT;
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reg.PC = readMem(0xFFFE) | (readMem(0xFFFF) << 8);
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}
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static void CLD(){ // CLear Decimal
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reg.SR &= ~DECIMAL;
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}
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static void SED(){ // SEt Decimal
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reg.SR |= DECIMAL;
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}
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static void CLC(){ // CLear Carry
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reg.SR &= ~CARRY;
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}
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static void SEC(){ // SEt Carry
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reg.SR |= CARRY;
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}
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static void CLI(){ // CLear Interrupt
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reg.SR &= ~INTERRUPT;
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}
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static void SEI(){ // SEt Interrupt
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reg.SR |= INTERRUPT;
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}
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static void CLV(){ // CLear oVerflow
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reg.SR &= ~OVERFLOW;
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}
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static void LDA(){ // LoaD Accumulator
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reg.A = ope.value;
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setSZ(reg.A);
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}
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static void LDX(){ // LoaD X
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reg.X = ope.value;
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setSZ(reg.X);}
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static void LDY(){ // LoaD Y
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reg.Y = ope.value;
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setSZ(reg.Y);
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}
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static void STA(){ // STore Accumulator
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writeMem(ope.address, reg.A);
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}
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static void STX(){ // STore X
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writeMem(ope.address, reg.X);
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}
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static void STY(){ // STore Y
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writeMem(ope.address, reg.Y);
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}
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static void DEC(){ // DECrement
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writeMem(ope.address, --ope.value);
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setSZ(ope.value);
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}
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static void DEX(){ // DEcrement X
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setSZ(--reg.X);
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}
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static void DEY(){ // DEcrement Y
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setSZ(--reg.Y);
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}
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static void INC(){ // INCrement
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writeMem(ope.address, ++ope.value);
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setSZ(ope.value);
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}
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static void INX(){ // INcrement X
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setSZ(++reg.X);
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}
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static void INY(){ // INcrement Y
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setSZ(++reg.Y);
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}
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static void TAX(){ // Transfer Accumulator to X
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reg.X = reg.A;
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setSZ(reg.X);
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}
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static void TAY(){ // Transfer Accumulator to Y
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reg.Y = reg.A;
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setSZ(reg.Y);
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}
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static void TXA(){ // Transfer X to Accumulator
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reg.A = reg.X;
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setSZ(reg.A);
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}
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static void TYA(){ // Transfer Y to Accumulator
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reg.A = reg.Y;
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setSZ(reg.A);
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}
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static void TSX(){ // Transfer Sp to X
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reg.X = reg.SP;
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setSZ(reg.X);
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}
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static void TXS(){ // Transfer X to Sp
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reg.SP = reg.X;
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}
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static void BEQ(){ // Branch on EQual (zero set)
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if (reg.SR & ZERO) reg.PC += ope.address;
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}
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static void BNE(){ // Branch on Not Equal (zero clear)
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if (!(reg.SR & ZERO)) reg.PC += ope.address;
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}
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static void BMI(){ // Branch if MInus (ie when negative, when SIGN is set)
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if (reg.SR & SIGN) reg.PC += ope.address;
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}
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static void BPL(){ // Branch if PLus (ie when positive, when SIGN is clear)
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if (!(reg.SR & SIGN)) reg.PC += ope.address;
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}
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static void BVS(){ // Branch on oVerflow Set
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if (reg.SR & OVERFLOW) reg.PC += ope.address;
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}
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static void BVC(){ // Branch on oVerflow Clear
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if (!(reg.SR & OVERFLOW)) reg.PC += ope.address;
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}
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static void BCS(){ // Branch on Carry Set
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if (reg.SR & CARRY) reg.PC +=ope.address;
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}
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static void BCC(){ // Branch on Carry Clear
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if (!(reg.SR & CARRY)) reg.PC += ope.address;
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}
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static void PHA(){ // PusH A to the stack
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push(reg.A);
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}
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static void PLA(){ // PulL stack into A
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reg.A = pull();
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setSZ(reg.A);
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}
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static void PHP(){ // PusH Programm (Status) register to the stack
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push(reg.SR | BREAK);
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}
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static void PLP(){ // PulL stack into Programm (SR) register
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reg.SR = pull() | UNDEFINED;
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}
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static void JMP(){ // JuMP
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reg.PC = ope.address;
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}
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static void JSR(){ // Jump Sub-Routine
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push((--reg.PC >> 8) & 0xFF);
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push(reg.PC & 0xFF);
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reg.PC = ope.address;
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}
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static void RTS(){ // ReTurn from Sub-routine
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reg.PC = (pull() | (pull() << 8)) + 1;
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}
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static void RTI(){ // ReTurn from Interrupt
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reg.SR = pull();
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reg.PC = pull() | (pull() << 8);
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}
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static void CMP(){ // Compare with A
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setSZ((reg.A - ope.value) & 0xFF);
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if (reg.A >= (ope.value & 0xFF)) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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}
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static void CPX(){ // Compare with X
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setSZ((reg.X - ope.value) & 0xFF);
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if (reg.X >= (ope.value & 0xFF)) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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}
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static void CPY(){ // Compare with Y
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setSZ((reg.Y - ope.value) & 0xFF);
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if (reg.Y >= (ope.value & 0xFF)) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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}
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static void AND(){ // AND with A
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reg.A &= ope.value;
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setSZ(reg.A);
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}
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static void ORA(){ // OR with A
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reg.A |= ope.value;
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setSZ(reg.A);
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}
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static void EOR(){ // Exclusive Or with A
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reg.A ^= ope.value;
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setSZ(reg.A);
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}
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static void BIT(){ // BIT with A - http://www.6502.org/tutorials/vflag.html
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if (!(reg.A & ope.value)) reg.SR |= ZERO;
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else reg.SR &= ~ZERO;
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reg.SR = (reg.SR & 0x3F) | (ope.value & 0xC0); // update SIGN & OVERFLOW
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}
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static void ASL(){ // Arithmetic Shift Left
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uint16_t result = (ope.value << 1);
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if (result & 0xFF00) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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result &= 0xFF;
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if (ope.setAcc){
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reg.A = result;
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ope.setAcc = false;
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}
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else writeMem(ope.address, result);
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setSZ(result);
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}
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static void LSR(){ // Logical Shift Right
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uint8_t result8;
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if (ope.value & 1) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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result8 = (ope.value >> 1) & 0xFF;
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if (ope.setAcc){
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reg.A = result8;
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ope.setAcc = false;
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}
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else writeMem(ope.address, result8);
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setSZ(result8);
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}
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static void ROL(){ // ROtate Left
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uint16_t result = ((ope.value << 1) | (reg.SR & CARRY));
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if (result & 0x100) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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result &= 0xFF;
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if (ope.setAcc){
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reg.A = result;
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ope.setAcc = false;
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}
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else writeMem(ope.address, result);
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setSZ(result);
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}
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static void ROR(){ // ROtate Right
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uint16_t result = (ope.value >> 1) | ((reg.SR & CARRY) << 7);
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if (ope.value & 0x1) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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result &= 0xFF;
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if (ope.setAcc){
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reg.A = result;
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ope.setAcc = false;
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}
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else writeMem(ope.address, result);
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setSZ(result);
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}
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static void ADC(){ // ADd with Carry
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uint16_t result = reg.A + ope.value + (reg.SR & CARRY);
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setSZ(result);
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if (((result)^(reg.A ))&((result)^(ope.value))&0x0080) reg.SR |= OVERFLOW;
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else reg.SR &= ~OVERFLOW;
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if (reg.SR&DECIMAL) result += ((((result+0x66)^reg.A^ope.value)>>3)&0x22)*3;
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if (result & 0xFF00) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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reg.A = (result & 0xFF);
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}
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static void SBC(){ // SuBtract with Carry
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ope.value ^= 0xFF;
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if (reg.SR & DECIMAL) ope.value -= 0x0066;
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uint16_t result = reg.A + ope.value + (reg.SR & CARRY);
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setSZ(result);
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if (((result)^(reg.A ))&((result)^(ope.value))&0x0080) reg.SR |= OVERFLOW;
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else reg.SR &= ~OVERFLOW;
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if (reg.SR&DECIMAL) result += ((((result+0x66)^reg.A^ope.value)>>3)&0x22)*3;
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if (result & 0xFF00) reg.SR |= CARRY;
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else reg.SR &= ~CARRY;
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reg.A = (result & 0xFF);
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}
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static void UND(){ // UNDefined (not a valid or supported 6502 opcode)
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printw("\n\n~ Illegal Instruction At Address $%04X ~\n", reg.PC - 1);
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BRK();
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}
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static void (*instruction[])(void) = {
|
||||
BRK, ORA, UND, UND, UND, ORA, ASL, UND, PHP, ORA, ASL, UND, UND, ORA, ASL, UND,
|
||||
BPL, ORA, UND, UND, UND, ORA, ASL, UND, CLC, ORA, UND, UND, UND, ORA, ASL, UND,
|
||||
JSR, AND, UND, UND, BIT, AND, ROL, UND, PLP, AND, ROL, UND, BIT, AND, ROL, UND,
|
||||
BMI, AND, UND, UND, UND, AND, ROL, UND, SEC, AND, UND, UND, UND, AND, ROL, UND,
|
||||
RTI, EOR, UND, UND, UND, EOR, LSR, UND, PHA, EOR, LSR, UND, JMP, EOR, LSR, UND,
|
||||
BVC, EOR, UND, UND, UND, EOR, LSR, UND, CLI, EOR, UND, UND, UND, EOR, LSR, UND,
|
||||
RTS, ADC, UND, UND, UND, ADC, ROR, UND, PLA, ADC, ROR, UND, JMP, ADC, ROR, UND,
|
||||
BVS, ADC, UND, UND, UND, ADC, ROR, UND, SEI, ADC, UND, UND, UND, ADC, ROR, UND,
|
||||
UND, STA, UND, UND, STY, STA, STX, UND, DEY, UND, TXA, UND, STY, STA, STX, UND,
|
||||
BCC, STA, UND, UND, STY, STA, STX, UND, TYA, STA, TXS, UND, UND, STA, UND, UND,
|
||||
LDY, LDA, LDX, UND, LDY, LDA, LDX, UND, TAY, LDA, TAX, UND, LDY, LDA, LDX, UND,
|
||||
BCS, LDA, UND, UND, LDY, LDA, LDX, UND, CLV, LDA, TSX, UND, LDY, LDA, LDX, UND,
|
||||
CPY, CMP, UND, UND, CPY, CMP, DEC, UND, INY, CMP, DEX, UND, CPY, CMP, DEC, UND,
|
||||
BNE, CMP, UND, UND, UND, CMP, DEC, UND, CLD, CMP, UND, UND, UND, CMP, DEC, UND,
|
||||
CPX, SBC, UND, UND, CPX, SBC, INC, UND, INX, SBC, NOP, UND, CPX, SBC, INC, UND,
|
||||
BEQ, SBC, UND, UND, UND, SBC, INC, UND, SED, SBC, UND, UND, UND, SBC, INC, UND
|
||||
};
|
||||
|
||||
static void (*addressing[])(void) = {
|
||||
IMP, IDX, IMP, IMP, IMP, ZPG, ZPG, IMP, IMP, IMM, ACC, IMP, IMP, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABY, IMP, IMP, IMP, ABX, ABX, IMP,
|
||||
ABS, IDX, IMP, IMP, ZPG, ZPG, ZPG, IMP, IMP, IMM, ACC, IMP, ABS, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABY, IMP, IMP, IMP, ABX, ABX, IMP,
|
||||
IMP, IDX, IMP, IMP, IMP, ZPG, ZPG, IMP, IMP, IMM, ACC, IMP, ABS, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABY, IMP, IMP, IMP, ABX, ABX, IMP,
|
||||
IMP, IDX, IMP, IMP, IMP, ZPG, ZPG, IMP, IMP, IMM, ACC, IMP, IND, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABY, IMP, IMP, IMP, ABX, ABX, IMP,
|
||||
IMP, IDX, IMP, IMP, ZPG, ZPG, ZPG, IMP, IMP, IMP, IMP, IMP, ABS, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABY, IMP, IMP, IMP, ABX, IMP, IMP,
|
||||
IMM, IDX, IMM, IMP, ZPG, ZPG, ZPG, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABY, IMP, IMP, ABX, ABX, ABY, IMP,
|
||||
IMM, IDX, IMP, IMP, ZPG, ZPG, ZPG, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABY, IMP, IMP, IMP, ABX, ABX, IMP,
|
||||
IMM, IDX, IMP, IMP, ZPG, ZPG, ZPG, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
|
||||
REL, IDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABY, IMP, IMP, IMP, ABX, ABX, IMP
|
||||
};
|
||||
|
||||
|
||||
// PROGRAM ENTRY POINT
|
||||
|
||||
int main(int argc, char *argv[]) {
|
||||
int i = 0, ch = 0;
|
||||
uint8_t opcode = 0;
|
||||
|
||||
// ncurses initialization
|
||||
initscr();
|
||||
cbreak();
|
||||
noecho();
|
||||
qiflush();
|
||||
scrollok(stdscr, TRUE);
|
||||
nodelay(stdscr, TRUE);
|
||||
|
||||
// processor reset
|
||||
reset();
|
||||
|
||||
// main loop
|
||||
while(1){
|
||||
for (i=0; i<100; i++){ // executes 100 instructions before a kbd scan
|
||||
opcode = readMem(reg.PC++); // fetch and increment the Program Counter
|
||||
addressing[opcode](); // decode operands against the addressing mode
|
||||
instruction[opcode](); // execute the instruction
|
||||
}
|
||||
|
||||
// keyboard controller
|
||||
if (!keyRdy){ // don't miss a keystroke
|
||||
ch = getch(); // reads from ncurses
|
||||
if (ch != ERR){
|
||||
key = (uint8_t)ch; // getch() returns an int
|
||||
if (key == 0x12) reset(); // CTRL-R, reset
|
||||
else if (key == 0x02) BRK(); // CTRL-B, break
|
||||
else {
|
||||
if (key == 0x0A) key = 0x0D; // LF (\n) to CR (\r)
|
||||
if ((key == 0x7F) || (key == 0x08)) key = 0x5F; // DEL and BS to _
|
||||
if ((key >= 0x61) && (key <= 0x7A)) key &= 0xDF; // to upper case
|
||||
keyRdy = 0x80;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
7
woz.h
Normal file
7
woz.h
Normal file
@ -0,0 +1,7 @@
|
||||
// this is the Woz monitor starting at $FF00
|
||||
|
||||
#define ROMSTART 0xFF00
|
||||
|
||||
const uint8_t rom[256] = {
|
||||
0xd8, 0x58, 0xa0, 0x7f, 0x8c, 0x12, 0xd0, 0xa9, 0xa7, 0x8d, 0x11, 0xd0, 0x8d, 0x13, 0xd0, 0xc9, 0xdf, 0xf0, 0x13, 0xc9, 0x9b, 0xf0, 0x03, 0xc8, 0x10, 0x0f, 0xa9, 0xdc, 0x20, 0xef, 0xff, 0xa9, 0x8d, 0x20, 0xef, 0xff, 0xa0, 0x01, 0x88, 0x30, 0xf6, 0xad, 0x11, 0xd0, 0x10, 0xfb, 0xad, 0x10, 0xd0, 0x99, 0x00, 0x02, 0x20, 0xef, 0xff, 0xc9, 0x8d, 0xd0, 0xd4, 0xa0, 0xff, 0xa9, 0x00, 0xaa, 0x0a, 0x85, 0x2b, 0xc8, 0xb9, 0x00, 0x02, 0xc9, 0x8d, 0xf0, 0xd4, 0xc9, 0xae, 0x90, 0xf4, 0xf0, 0xf0, 0xc9, 0xba, 0xf0, 0xeb, 0xc9, 0xd2, 0xf0, 0x3b, 0x86, 0x28, 0x86, 0x29, 0x84, 0x2a, 0xb9, 0x00, 0x02, 0x49, 0xb0, 0xc9, 0x0a, 0x90, 0x06, 0x69, 0x88, 0xc9, 0xfa, 0x90, 0x11, 0x0a, 0x0a, 0x0a, 0x0a, 0xa2, 0x04, 0x0a, 0x26, 0x28, 0x26, 0x29, 0xca, 0xd0, 0xf8, 0xc8, 0xd0, 0xe0, 0xc4, 0x2a, 0xf0, 0x97, 0x24, 0x2b, 0x50, 0x10, 0xa5, 0x28, 0x81, 0x26, 0xe6, 0x26, 0xd0, 0xb5, 0xe6, 0x27, 0x4c, 0x44, 0xff, 0x6c, 0x24, 0x00, 0x30, 0x2b, 0xa2, 0x02, 0xb5, 0x27, 0x95, 0x25, 0x95, 0x23, 0xca, 0xd0, 0xf7, 0xd0, 0x14, 0xa9, 0x8d, 0x20, 0xef, 0xff, 0xa5, 0x25, 0x20, 0xdc, 0xff, 0xa5, 0x24, 0x20, 0xdc, 0xff, 0xa9, 0xba, 0x20, 0xef, 0xff, 0xa9, 0xa0, 0x20, 0xef, 0xff, 0xa1, 0x24, 0x20, 0xdc, 0xff, 0x86, 0x2b, 0xa5, 0x24, 0xc5, 0x28, 0xa5, 0x25, 0xe5, 0x29, 0xb0, 0xc1, 0xe6, 0x24, 0xd0, 0x02, 0xe6, 0x25, 0xa5, 0x24, 0x29, 0x07, 0x10, 0xc8, 0x48, 0x4a, 0x4a, 0x4a, 0x4a, 0x20, 0xe5, 0xff, 0x68, 0x29, 0x0f, 0x09, 0xb0, 0xc9, 0xba, 0x90, 0x02, 0x69, 0x06, 0x2c, 0x12, 0xd0, 0x30, 0xfb, 0x8d, 0x12, 0xd0, 0x60, 0x00, 0x00, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user