24 lines
1.3 KiB
Plaintext
24 lines
1.3 KiB
Plaintext
I, Frederick Kilner, being of sound mind and body and making a gate level Apple ][ in a FPGA.
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Creating a functional gate level Apple II from Apple II schematic.
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Using Xilinx 14.7 Schematic Entry. Making small test benches of module.
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Design will be loaded in to Nexsys-2 Spartan3E-500 board.
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Also manually entering 74series chips(gate level schemtic).
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I didn't find a 74series library so have to enter my own chips.
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My goal is to have a functional gate level apple II in an FPGA.
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I want to be able to connect it to the composite input of a monitor. I'll need a few analog components for that.
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Also I will want to have a module which reads the generated composite signal and drives the analog VGA port.
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That will probably require a frame buffer unless 59.94Hz refresh rate is okay for some VGA mode.
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Voltage level shifters will be needed but I have expansion connections and want to be able to plug in
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real Apple II cards including disk drive card and music card and 80 column card.
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I want to be able to prototype Apple II hardware changes in FPGA board.
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Verilog generated from Xilinx ISE can be used in Xilinx Vivado project to have apple II on Artix-7 chip.
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Verilog can be used in other design tool for other chips/boards.. such as Quartus-II or whatever it is now.
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FPGA is neat. |