16 Commits

Author	SHA1	Message	Date
Florian Reitz	b0df142692	Linear addressing from C700, test code added to ram	2017-10-22 20:50:14 +02:00
Florian Reitz	9e674fe0c6	Hex file for new address mapping	2017-10-17 00:06:33 +02:00
Florian Reitz	f20a1d529d	Test routine added	2017-10-15 16:48:13 +02:00
Florian Reitz	c438775789	Check for init failure	2017-10-03 17:46:50 +02:00
Florian Reitz	2a06e1ba5d	Support for second partition, card detect and write protect added	2017-09-09 20:34:24 +02:00
Florian Reitz	30f6b89f2b	inited flag in fpga	2017-08-27 15:02:58 +02:00
Florian Reitz	f3751b90fb	7MHz clock used, read/write improved ... reverted to Merlin-8	2017-08-27 00:37:54 +02:00
Florian Reitz	6e37a8c482	Code updated for Merlin32	2017-08-26 13:07:42 +02:00
Unknown	3edc480c74	Fix for crc after read command	2017-08-13 13:47:20 +02:00
Unknown	92f8061ea8	Fix for line ending	2017-08-13 13:34:15 +02:00
Unknown	ff87291902	several fixes, not completely booting	2017-08-12 17:56:49 +02:00
Unknown	7d67a7b4d5	Several fixes, binary and srec files added	2017-08-11 22:59:02 +02:00
freitz85	7391fa7cbc	Fixed bug in Write Block	2017-07-16 23:29:09 +02:00
freitz85	624bd4e9a7	Debug flags added, block and command sequences moved to subroutine	2017-07-16 15:36:47 +02:00
freitz85	240b301bad	Source and Listing updated to ROM location	2017-07-15 18:32:17 +02:00
freitz85	c185b53681	R and C changed to SMD	2017-07-12 22:23:15 +02:00