mirror of
https://github.com/freitz85/AppleIISd.git
synced 2024-11-23 04:32:48 +00:00
245 lines
7.0 KiB
Plaintext
245 lines
7.0 KiB
Plaintext
VERSION 6
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BEGIN SCHEMATIC
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BEGIN ATTR DeviceFamilyName "xc9500xl"
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DELETE all:0
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EDITNAME all:0
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EDITTRAIT all:0
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END ATTR
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BEGIN NETLIST
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SIGNAL A10
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SIGNAL A9
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SIGNAL A8
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SIGNAL XLXN_10
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SIGNAL CLK
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SIGNAL XLXN_14
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SIGNAL B10
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SIGNAL B9
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SIGNAL B8
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SIGNAL NOE
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SIGNAL XLXN_29
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SIGNAL NIO_SEL
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SIGNAL NIO_STB
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SIGNAL XLXN_38
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SIGNAL XLXN_46
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SIGNAL XLXN_47
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SIGNAL NDEV_SEL
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PORT Input A10
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PORT Input A9
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PORT Input A8
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PORT Input CLK
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PORT Output B10
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PORT Output B9
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PORT Output B8
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PORT Output NOE
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PORT Input NIO_SEL
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PORT Input NIO_STB
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PORT Input NDEV_SEL
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BEGIN BLOCKDEF fdrs
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TIMESTAMP 2001 3 9 11 23 0
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LINE N 0 -128 64 -128
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LINE N 0 -256 64 -256
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LINE N 384 -256 320 -256
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LINE N 0 -32 64 -32
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LINE N 0 -352 64 -352
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RECTANGLE N 64 -320 320 -64
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LINE N 192 -64 192 -32
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LINE N 192 -32 64 -32
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LINE N 64 -112 80 -128
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LINE N 80 -128 64 -144
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LINE N 192 -320 192 -352
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LINE N 192 -352 64 -352
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END BLOCKDEF
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BEGIN BLOCKDEF inv
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TIMESTAMP 2001 3 9 11 23 50
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LINE N 0 -32 64 -32
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LINE N 224 -32 160 -32
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LINE N 64 -64 128 -32
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LINE N 128 -32 64 0
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LINE N 64 0 64 -64
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CIRCLE N 128 -48 160 -16
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END BLOCKDEF
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BEGIN BLOCKDEF vcc
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TIMESTAMP 2001 3 9 11 23 11
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LINE N 96 -64 32 -64
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LINE N 64 0 64 -32
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LINE N 64 -32 64 -64
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END BLOCKDEF
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BEGIN BLOCKDEF and2
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TIMESTAMP 2001 5 11 10 41 37
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LINE N 0 -64 64 -64
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LINE N 0 -128 64 -128
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LINE N 256 -96 192 -96
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ARC N 96 -144 192 -48 144 -48 144 -144
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LINE N 144 -48 64 -48
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LINE N 64 -144 144 -144
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LINE N 64 -48 64 -144
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END BLOCKDEF
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BEGIN BLOCKDEF and4
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TIMESTAMP 2001 5 11 10 43 14
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LINE N 144 -112 64 -112
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ARC N 96 -208 192 -112 144 -112 144 -208
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LINE N 64 -208 144 -208
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LINE N 64 -64 64 -256
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LINE N 256 -160 192 -160
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LINE N 0 -256 64 -256
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LINE N 0 -192 64 -192
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LINE N 0 -128 64 -128
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LINE N 0 -64 64 -64
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END BLOCKDEF
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BEGIN BLOCKDEF nand2
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TIMESTAMP 2001 3 9 11 23 50
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LINE N 0 -64 64 -64
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LINE N 0 -128 64 -128
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LINE N 256 -96 216 -96
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CIRCLE N 192 -108 216 -84
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LINE N 64 -48 64 -144
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LINE N 64 -144 144 -144
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LINE N 144 -48 64 -48
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ARC N 96 -144 192 -48 144 -48 144 -144
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END BLOCKDEF
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BEGIN BLOCK XLXI_16 fdrs
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PIN C CLK
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PIN D XLXN_14
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PIN R XLXN_10
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PIN S XLXN_46
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PIN Q XLXN_47
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END BLOCK
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BEGIN BLOCK XLXI_17 vcc
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PIN P XLXN_14
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END BLOCK
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BEGIN BLOCK XLXI_18 and2
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PIN I0 A10
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PIN I1 XLXN_38
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PIN O B10
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END BLOCK
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BEGIN BLOCK XLXI_19 and2
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PIN I0 A9
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PIN I1 XLXN_38
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PIN O B9
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END BLOCK
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BEGIN BLOCK XLXI_20 and2
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PIN I0 A8
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PIN I1 XLXN_38
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PIN O B8
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END BLOCK
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BEGIN BLOCK XLXI_22 inv
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PIN I NIO_SEL
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PIN O XLXN_46
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END BLOCK
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BEGIN BLOCK XLXI_30 and4
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PIN I0 A8
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PIN I1 A9
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PIN I2 A10
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PIN I3 XLXN_38
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PIN O XLXN_10
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END BLOCK
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BEGIN BLOCK XLXI_31 inv
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PIN I NIO_STB
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PIN O XLXN_38
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END BLOCK
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BEGIN BLOCK XLXI_32 nand2
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PIN I0 XLXN_47
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PIN I1 NDEV_SEL
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PIN O NOE
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END BLOCK
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END NETLIST
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BEGIN SHEET 1 3520 2720
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BEGIN BRANCH A10
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WIRE 320 704 592 704
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WIRE 592 704 704 704
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WIRE 592 704 592 992
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WIRE 592 992 1088 992
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END BRANCH
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BEGIN BRANCH A9
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WIRE 320 768 528 768
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WIRE 528 768 704 768
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WIRE 528 768 528 1136
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WIRE 528 1136 1088 1136
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END BRANCH
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BEGIN BRANCH A8
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WIRE 320 832 464 832
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WIRE 464 832 704 832
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WIRE 464 832 464 1280
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WIRE 464 1280 1088 1280
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END BRANCH
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IOMARKER 320 704 A10 R180 28
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IOMARKER 320 768 A9 R180 28
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IOMARKER 320 832 A8 R180 28
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BEGIN BRANCH CLK
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WIRE 320 576 912 576
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WIRE 912 576 912 640
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WIRE 912 640 992 640
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END BRANCH
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BEGIN BRANCH B10
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WIRE 1344 960 1360 960
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WIRE 1360 960 1664 960
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END BRANCH
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BEGIN BRANCH B9
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WIRE 1344 1104 1360 1104
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WIRE 1360 1104 1664 1104
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END BRANCH
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BEGIN BRANCH B8
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WIRE 1344 1248 1360 1248
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WIRE 1360 1248 1664 1248
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END BRANCH
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BEGIN BRANCH NOE
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WIRE 1680 336 1696 336
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END BRANCH
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BEGIN BRANCH NIO_SEL
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WIRE 320 368 352 368
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END BRANCH
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BEGIN BRANCH NIO_STB
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WIRE 320 640 336 640
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END BRANCH
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IOMARKER 320 368 NIO_SEL R180 28
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IOMARKER 320 640 NIO_STB R180 28
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INSTANCE XLXI_31 336 672 R0
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BEGIN BRANCH XLXN_38
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WIRE 560 640 672 640
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WIRE 672 640 704 640
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WIRE 672 640 672 928
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WIRE 672 928 1088 928
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WIRE 672 928 672 1072
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WIRE 672 1072 1088 1072
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WIRE 672 1072 672 1216
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WIRE 672 1216 1088 1216
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END BRANCH
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INSTANCE XLXI_30 704 896 R0
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BEGIN BRANCH XLXN_10
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WIRE 960 736 976 736
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WIRE 976 736 992 736
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END BRANCH
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BEGIN BRANCH XLXN_14
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WIRE 848 496 848 512
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WIRE 848 512 992 512
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END BRANCH
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IOMARKER 320 576 CLK R180 28
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INSTANCE XLXI_17 784 496 R0
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INSTANCE XLXI_22 352 400 R0
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BEGIN BRANCH XLXN_46
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WIRE 576 368 592 368
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WIRE 592 368 992 368
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WIRE 992 368 992 416
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END BRANCH
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INSTANCE XLXI_16 992 768 R0
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INSTANCE XLXI_18 1088 1056 R0
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INSTANCE XLXI_19 1088 1200 R0
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INSTANCE XLXI_20 1088 1344 R0
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IOMARKER 1664 960 B10 R0 28
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IOMARKER 1664 1104 B9 R0 28
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IOMARKER 1664 1248 B8 R0 28
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INSTANCE XLXI_32 1424 432 R0
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BEGIN BRANCH XLXN_47
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WIRE 1376 512 1392 512
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WIRE 1392 368 1424 368
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WIRE 1392 368 1392 512
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END BRANCH
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IOMARKER 1696 336 NOE R0 28
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BEGIN BRANCH NDEV_SEL
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WIRE 320 304 1408 304
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WIRE 1408 304 1424 304
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END BRANCH
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IOMARKER 320 304 NDEV_SEL R180 28
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END SHEET
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END SCHEMATIC
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