GR8RAM/Documentation/UFM Load

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UFM Load
LState ARCLK ARShft DRCLK DRShft UFM
--------------------------------------------------------------------------------
$0000 0 1 0 0
$0FBF 0 1 0 0
...
$0FC0 1 1 0 0
$0FC1 1 1 0 0
$0FC2 0 1 0 0
$0FC3 0 1 0 0
$0FC4 1 1 0 0
$0FC5 1 1 0 0
$0FC6 0 1 0 0
$0FC7 0 1 0 0
$0FC8 1 1 0 0
$0FC9 1 1 0 0
$0FCA 0 1 0 0
$0FCB 0 1 0 0
$0FCC 1 1 0 0
$0FCD 1 1 0 0
$0FCE 0 1 0 0
$0FCF 0 1 0 0
$0FD0 1 1 0 0
$0FD1 1 1 0 0
$0FD2 0 1 0 0
$0FD3 0 1 0 0
$0FD4 1 1 0 0
$0FD5 1 1 0 0
$0FD6 0 1 0 0
$0FD7 0 1 0 0
$0FD8 1 1 0 0
$0FD9 1 1 0 0
$0FDA 0 1 0 0
$0FDB 0 1 0 0
$0FDC 1 1 0 0
$0FDD 1 1 0 0
$0FDE 0 1 0 0
$0FDF 0 1 0 0
$0FE0 1 1 0 0
$0FE1 1 1 0 0
$0FE2 0 1 0 0
$0FE3 0 1 0 0
$0FE4 1 1 0 0
$0FE5 1 1 0 0
$0FE6 0 1 0 0
$0FE7 0 1 0 0
$0FE8 1 1 0 0
$0FE9 1 1 0 0
$0FEA 0 1 0 0
$0FEB 0 1 0 0
$0FEC 1 1 0 0
$0FED 1 1 0 0
$0FEE 0 1 0 0
$0FEF 0 1 0 0
$0FF0 1 1 0 0
$0FF1 1 1 0 0
$0FF2 0 1 0 0
$0FF3 0 1 0 0
$0FF4 1 1 0 0
$0FF5 1 1 0 0
$0FF6 0 1 0 0
$0FF7 0 1 0 0
$0FF8 1 1 0 0
$0FF9 1 1 0 0
$0FFA 0 1 0 0
$0FFB 0 1 0 0
$0FFC 1 1 0 0
$0FFD 1 1 0 0
$0FFE 0 1 0 0
$0FFF 0 1 0 0
$1000 0 0 1 0 parallel load into DR
$1001 0 0 1 0
$1002 0 0 0 1
$1003 0 0 0 1
$1004 0 0 1 1 SetLoaded <= Dout
$1005 0 0 1 1
$1006 0 0 0 1
$1007 0 0 0 1
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$1008 0 0 1 1 latch DR[14] (SetFW)
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$1009 0 0 1 1
$100A 0 0 0 1
$100B 0 0 0 1
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$100C 1 0 0 1 latch DR[13] (SetLim8M)
$100D 1 0 0 1
$100E 0 0 0 0
$100F 0 0 0 0
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...
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$1FF0 0 0 1 0 parallel load into DR
$1FF1 0 0 1 0
$1FF2 0 0 0 1
$1FF3 0 0 0 1
$1FF4 0 0 1 1 SetLoaded <= Dout
$1FF5 0 0 1 1
$1FF6 0 0 0 1
$1FF7 0 0 0 1
$1FF8 0 0 1 1 latch DR[14] (SetFW)
$1FF9 0 0 1 1
$1FFA 0 0 0 1
$1FFB 0 0 0 1
$1FFC 1 0 0 1 latch DR[13] (SetLim8M)
$1FFD 1 0 0 1
$1FFE 0 0 0 0
$1FFF 0 0 0 0
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$2000 0 0 0 0 Everything 0, set SetLoaded