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Cleanup
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@ -34,7 +34,6 @@ module GR8RAM(C7M, C7M_2, Q3, PHI0in, PHI1in, nRES, nMode,
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/* Select Signals */
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wire BankSELA = A[3:0]==4'hF;
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wire SetSELA = A[3:0]==4'hE;
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wire RAMSELA = A[3:0]==4'h3;
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wire AddrHSELA = A[3:0]==4'h2;
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wire AddrMSELA = A[3:0]==4'h1;
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@ -53,7 +52,7 @@ module GR8RAM(C7M, C7M_2, Q3, PHI0in, PHI1in, nRES, nMode,
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wire DOE = DBEN & nWE &
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((~nDEVSEL & REGEN) | ~nIOSEL | (~nIOSTRB & IOROMEN));
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wire [7:0] Dout = (nDEVSEL | RAMSELA) ? RD[7:0] :
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AddrHSELA ? {Addr[23:16]} :
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AddrHSELA ? Addr[23:16] :
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AddrMSELA ? Addr[15:8] :
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AddrLSELA ? Addr[7:0] : 8'h00;
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inout [7:0] D = DOE ? Dout : 8'bZ;
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