mirror of
https://github.com/garrettsworkshop/GR8RAM.git
synced 2026-03-12 07:41:45 +00:00
129 lines
6.3 KiB
Plaintext
129 lines
6.3 KiB
Plaintext
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Copyright (C) 1994-2018 Synopsys, Inc.
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This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
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and may only be used pursuant to the terms and conditions of a written license agreement
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with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
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Synopsys software or the associated documentation is strictly prohibited.
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Tool: Synplify Pro (R)
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Build: N-2018.03L-SP1-1
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Install: C:\lscc\diamond\3.11_x64\synpbase
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OS: Windows 6.2
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Hostname: ZANEMACWIN11
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Implementation : impl1
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Synopsys HDL Compiler, Version comp2018q2p1, Build 461R, Built Apr 1 2019 09:17:43
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@N|Running in 64-bit mode
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Copyright (C) 1994-2018 Synopsys, Inc.
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This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
|
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and may only be used pursuant to the terms and conditions of a written license agreement
|
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with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
|
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Synopsys software or the associated documentation is strictly prohibited.
|
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Tool: Synplify Pro (R)
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Build: N-2018.03L-SP1-1
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Install: C:\lscc\diamond\3.11_x64\synpbase
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OS: Windows 6.2
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Hostname: ZANEMACWIN11
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Implementation : impl1
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Synopsys Verilog Compiler, Version comp2018q2p1, Build 461R, Built Apr 1 2019 09:17:43
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@N|Running in 64-bit mode
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@I::"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\machxo2.v" (library work)
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@I::"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\pmi_def.v" (library work)
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@I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__)
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@I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\umr_capim.v" (library snps_haps)
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@I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\scemi_objects.v" (library snps_haps)
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@I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps)
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@I::"\\Mac\iCloud\Repos\GR8RAM\cpld\GR8RAM.v" (library work)
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@I::"\\Mac\iCloud\Repos\GR8RAM\cpld\SlinkyRegisters.v" (library work)
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@I::"\\Mac\iCloud\Repos\GR8RAM\cpld\BusInterface.v" (library work)
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@I::"\\Mac\iCloud\Repos\GR8RAM\cpld\InitController.v" (library work)
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@I::"\\Mac\iCloud\Repos\GR8RAM\cpld\SDRAMController.v" (library work)
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Verilog syntax check successful!
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Selecting top level module GR8RAM
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@N: CG364 :"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\machxo2.v":1793:7:1793:10|Synthesizing module OSCH in library work.
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Running optimization stage 1 on OSCH .......
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@N: CG364 :"\\Mac\iCloud\Repos\GR8RAM\cpld\BusInterface.v":1:8:1:19|Synthesizing module BusInterface in library work.
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Running optimization stage 1 on BusInterface .......
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@N: CG364 :"\\Mac\iCloud\Repos\GR8RAM\cpld\SlinkyRegisters.v":1:7:1:21|Synthesizing module SlinkyRegisters in library work.
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Running optimization stage 1 on SlinkyRegisters .......
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@N: CG364 :"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\machxo2.v":82:7:82:8|Synthesizing module BB in library work.
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Running optimization stage 1 on BB .......
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@N: CG364 :"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\machxo2.v":1601:7:1601:12|Synthesizing module ODDRXE in library work.
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Running optimization stage 1 on ODDRXE .......
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@N: CG364 :"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\machxo2.v":868:7:868:9|Synthesizing module OBZ in library work.
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Running optimization stage 1 on OBZ .......
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@N: CG364 :"\\Mac\iCloud\Repos\GR8RAM\cpld\InitController.v":1:7:1:20|Synthesizing module InitController in library work.
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Running optimization stage 1 on InitController .......
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@N: CL189 :"\\Mac\iCloud\Repos\GR8RAM\cpld\InitController.v":82:1:82:6|Register bit InitDone is always 0.
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@N: CG364 :"\\Mac\iCloud\Repos\GR8RAM\cpld\SDRAMController.v":1:7:1:21|Synthesizing module SDRAMController in library work.
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Running optimization stage 1 on SDRAMController .......
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@N: CG364 :"\\Mac\iCloud\Repos\GR8RAM\cpld\GR8RAM.v":1:7:1:12|Synthesizing module GR8RAM in library work.
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Running optimization stage 1 on GR8RAM .......
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Running optimization stage 2 on GR8RAM .......
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@W: CL246 :"\\Mac\iCloud\Repos\GR8RAM\cpld\GR8RAM.v":15:14:15:15|Input port bits 15 to 11 of BA[15:0] are unused. Assign logic for all port bits or change the input port size.
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@N: CL159 :"\\Mac\iCloud\Repos\GR8RAM\cpld\GR8RAM.v":5:7:5:11|Input CLKin is unused.
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Running optimization stage 2 on SDRAMController .......
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Running optimization stage 2 on InitController .......
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Running optimization stage 2 on OBZ .......
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Running optimization stage 2 on ODDRXE .......
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Running optimization stage 2 on BB .......
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Running optimization stage 2 on SlinkyRegisters .......
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Running optimization stage 2 on BusInterface .......
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Running optimization stage 2 on OSCH .......
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At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process completed successfully.
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# Sun Jul 14 06:18:40 2024
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###########################################################]
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Copyright (C) 1994-2018 Synopsys, Inc.
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This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
|
|
and may only be used pursuant to the terms and conditions of a written license agreement
|
|
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
|
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Synopsys software or the associated documentation is strictly prohibited.
|
|
Tool: Synplify Pro (R)
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Build: N-2018.03L-SP1-1
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Install: C:\lscc\diamond\3.11_x64\synpbase
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OS: Windows 6.2
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Hostname: ZANEMACWIN11
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Implementation : impl1
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Synopsys Synopsys Netlist Linker, Version comp2018q2p1, Build 461R, Built Apr 1 2019 09:17:43
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@N|Running in 64-bit mode
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File \\Mac\iCloud\Repos\GR8RAM\cpld\LCMXO2-640HC\impl1\synwork\layer0.srs changed - recompiling
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At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process completed successfully.
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# Sun Jul 14 06:18:40 2024
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###########################################################]
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For a summary of runtime and memory usage for all design units, please see file:
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==========================================================
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@L: A:\\Mac\iCloud\Repos\GR8RAM\cpld\LCMXO2-640HC\impl1\synwork\GR8RAM_LCMXO2_640HC_impl1_comp.rt.csv
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@END
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At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process completed successfully.
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# Sun Jul 14 06:18:40 2024
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###########################################################]
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