Apple-2-HW/GR8RAM
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8 MB RAMFactor-compatible Apple II memory expansion card
22 Commits 4 Branches 0 Tags 76 MiB
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Zane Kaminski 79dd794f45 New PLD revision 
For write operations, register data is latched and CAS signal becomes in the middle of S6, 70ns before the end of PHI0. This gives more write data setup time, which may be needed on the Apple II with the 1 MHz 6502.
2019-10-18 15:07:38 -04:00
cpld New PLD revision 2019-10-18 15:07:38 -04:00
gerber Put gerber files back 2019-10-13 01:39:20 -04:00
.gitattributes Initial commit 2019-06-25 00:46:18 -04:00
.gitignore Rough schematic and board layout 2019-06-25 19:44:54 -04:00
Docs.sch New PLD revision 2019-10-18 15:07:38 -04:00
fp-lib-table Rough schematic and board layout 2019-06-25 19:44:54 -04:00
GR8RAM-cache.lib New schematic revision 2019-10-13 01:40:49 -04:00
GR8RAM-gerber.zip Submitted to JLCPCB 2019-07-30 17:11:31 -04:00
GR8RAM.kicad_pcb Update GR8RAM-render.png 2019-10-13 02:04:13 -04:00
GR8RAM.pdf New PLD revision 2019-10-18 15:07:38 -04:00
GR8RAM.pro New PLD revision 2019-10-18 15:07:38 -04:00
GR8RAM.sch Switch library location, fixed datasheet fields 2019-10-13 02:04:29 -04:00
LICENSE New PLD revision 2019-10-18 15:07:38 -04:00
sym-lib-table Switch library location, fixed datasheet fields 2019-10-13 02:04:29 -04:00