Initial push to git
This commit is contained in:
Terence Boldt
parent
22ec2aeee0
commit
10d923a040
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;Please note this code is assembled seven times,
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;once for each slot in the Apple II.
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;This allows the card to work in any slot without
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;having to write space consuming relocatable code.
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;Determine which slot we want by command-line define
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if SLOT1
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slot equ $01
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endif
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if SLOT2
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slot equ $02
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endif
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if SLOT3
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slot equ $03
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endif
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if SLOT4
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slot equ $04
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endif
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if SLOT5
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slot equ $05
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endif
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if SLOT6
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slot equ $06
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endif
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if SLOT7
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slot equ $07
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endif
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;Calculate I/O addresses for this slot
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slotwh equ $C081+slot*$10
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slotwl equ $C080+slot*$10
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slotrd equ $C080+slot*$10
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sdrive equ slot*$10
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sram0 equ $478+slot
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sram1 equ $4F8+slot
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sram2 equ $578+slot
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sram3 equ $5F8+slot
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sram4 equ $678+slot
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sram5 equ $6F8+slot
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sram6 equ $778+slot
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sram7 equ $7F8+slot
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;ProDOS defines
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command equ $42 ;ProDOS command
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unit equ $43 ;7=drive 6-4=slot 3-0=not used
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buflo equ $44 ;low address of buffer
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bufhi equ $45 ;hi address of buffer
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blklo equ $46 ;low block
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blkhi equ $47 ;hi block
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ioerr equ $27 ;I/O error code
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nodev equ $28 ;no device connected
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wperr equ $2B ;write protect error
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org $C000+slot*$100
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;code is non-relocatable
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; but duplicated seven times,
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; once for each slot
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;ID bytes for booting and drive detection
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cpx #$20 ;ID bytes for ProDOS and the
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cpx #$00 ; Apple Autostart ROM
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cpx #$03 ;
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cpx #$3C ;this one for older II's
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;display copyright message
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ldy #$00
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drawtxt lda text,y
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beq boot ;check for NULL
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ora #$80 ;make it visible to the Apple
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sta $07D0,y ;put text on last line
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iny
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bpl drawtxt
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;load first two blocks and execute to boot
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boot lda #$01 ;set read command
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sta command
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lda #sdrive ;set slot and unit
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sta unit
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lda #$00 ;block 0
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sta blklo
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sta blkhi
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sta buflo ;buffer at $800
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lda #$08
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sta bufhi
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jsr entry ;get the block
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lda #$00 ;block 1
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sta blklo
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sta blkhi
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sta buflo ;buffer at $A00
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lda #$0A
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sta bufhi
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jsr entry ;get the block
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ldx #sdrive ;set up for slot n
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jmp $801 ;execute the block
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;This is the ProDOS entry point for this card
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entry lda #sdrive ;unit number is $n0 - n = slot
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cmp unit ;make sure same as ProDOS
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beq docmd ;yep, do command
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sec ;nope, set device not connected
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lda #nodev
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rts ;go back to ProDOS
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docmd lda command ;get ProDOS command
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beq getstat ;command 0 is GetStatus
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cmp #$01 ;
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beq readblk ;command 1 is ReadBlock
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sec ;Format/Write not permitted
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lda #wperr ;write protect error
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rts ;go back to ProDOS
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getstat clc ;send back status
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lda #$00 ;good status
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ldx #$00 ;1024 blocks
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ldy #$04 ;
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rts
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readblk lda blkhi ;get hi block
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asl a ;shift up to top 3 bits
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asl a ;since that's all the high
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asl a ;blocks we can handle
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asl a ;
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asl a ;
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sta sram0 ;save it in scratch ram 0
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;so we can stuff it in the
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;high latch later
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lda blklo ;get low block
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lsr a ;shift so we get the top 5
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lsr a ;bits - this also goes in
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lsr a ;the high latch
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ora sram0 ;add it to those top 3 bits
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sta sram0 ;save it back in scratch ram
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lda blklo ;get low block
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asl a ;shift it to top 3 bits
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asl a ;
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asl a ;
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asl a ;
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asl a ;
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sta sram1 ;save it in scratch ram
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jsr get256 ;get first half of block
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lda sram1 ;get low latch
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and #$F0 ;clear bottom 4 bits
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ora #$10 ;set bit 5 for second half
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;of 512 byte block
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sta sram1 ;save it back in scratch
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inc bufhi ;write 2nd block up 256 bytes
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jsr get256 ;get second half of block
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dec bufhi ;put ProDOS buffer back
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clc ;clear error code for success
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lda #$00
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rts ;return to ProDOS
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;This gets 256 bytes from the ROM card
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;assuming high latch value is in sram0
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;and low latch value is in sram1
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get256 ldy #$00 ;clear buffer counter
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lda sram0 ;get high latch value
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sta slotwh ;set high latch for card
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loop256 ldx #$00 ;clear port counter
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lda sram1 ;get low latch value
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sta slotwl ;set low latch
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loop16 lda slotrd,x ;get a byte
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sta (buflo),y ;write into the buffer
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iny
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inx
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cpx #$10
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bne loop16 ;go until 16 bytes read
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inc sram1 ;next 16 bytes
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cpy #$00
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bne loop256 ;go until 256 total
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rts
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text db "ROM-Drive (c)1998-2019 Terence J. Boldt", 0
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org $C0FC+slot*$100
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db 0,0 ;0000 blocks = check status
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db 3 ;bit 0=read 1=status
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db entry&$00FF ;low byte of entry
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@ -0,0 +1,214 @@
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|
||||
(pad 34 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 33 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 32 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 31 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 30 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 29 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 28 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 27 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 26 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 25 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 24 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 23 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 22 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 21 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 20 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 19 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 18 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 17 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 16 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 15 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 14 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 13 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 12 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 11 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 10 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 9 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 8 connect roundrect (at 3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 7 connect roundrect (at 1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 6 connect roundrect (at -1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 5 connect roundrect (at -3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 4 connect roundrect (at -6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 3 connect roundrect (at -8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 2 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 1 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
)
|
||||
|
|
@ -0,0 +1,677 @@
|
|||
(export (version D)
|
||||
(design
|
||||
(source "/Volumes/data1/Apple2/ProDOS ROM-Drive 2/ProDOS ROM-Drive 2.2.sch")
|
||||
(date "Tuesday, April 02, 2019 at 10:07:18 pm")
|
||||
(tool "Eeschema (5.0.1-3-g963ef8bb5)")
|
||||
(sheet (number 1) (name /) (tstamps /)
|
||||
(title_block
|
||||
(title "ProDOS ROM-Drive")
|
||||
(company)
|
||||
(rev 2.2)
|
||||
(date)
|
||||
(source "ProDOS ROM-Drive 2.2.sch")
|
||||
(comment (number 1) (value ""))
|
||||
(comment (number 2) (value ""))
|
||||
(comment (number 3) (value ""))
|
||||
(comment (number 4) (value "")))))
|
||||
(components
|
||||
(comp (ref J1)
|
||||
(value "Apple II Expansion Slot")
|
||||
(footprint "Connector:Apple II Expansion Edge Connector")
|
||||
(datasheet ~)
|
||||
(libsource (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise) (description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72A915))
|
||||
(comp (ref U1)
|
||||
(value 74LS00)
|
||||
(footprint Package_DIP:DIP-14_W7.62mm)
|
||||
(datasheet http://www.ti.com/lit/gpn/sn74ls00)
|
||||
(libsource (lib 74xx) (part 74LS00) (description "quad 2-input NAND gate"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72AA8F))
|
||||
(comp (ref U2)
|
||||
(value 74LS32)
|
||||
(footprint Package_DIP:DIP-14_W7.62mm)
|
||||
(datasheet http://www.ti.com/lit/gpn/sn74LS32)
|
||||
(libsource (lib 74xx) (part 74LS32) (description "Quad 2-input OR"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72AF3F))
|
||||
(comp (ref DataBuffer1)
|
||||
(value 74LS245)
|
||||
(footprint Package_DIP:DIP-20_W7.62mm)
|
||||
(datasheet http://www.ti.com/lit/gpn/sn74LS245)
|
||||
(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72BA8A))
|
||||
(comp (ref LowAddrBuffer1)
|
||||
(value 74LS245)
|
||||
(footprint Package_DIP:DIP-20_W7.62mm)
|
||||
(datasheet http://www.ti.com/lit/gpn/sn74LS245)
|
||||
(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72BDB8))
|
||||
(comp (ref HiAddrBuffer1)
|
||||
(value 74LS245)
|
||||
(footprint Package_DIP:DIP-20_W7.62mm)
|
||||
(datasheet http://www.ti.com/lit/gpn/sn74LS245)
|
||||
(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72BFE6))
|
||||
(comp (ref LowAddrLatch1)
|
||||
(value 74LS374)
|
||||
(footprint Package_DIP:DIP-20_W7.62mm)
|
||||
(datasheet http://www.ti.com/lit/gpn/sn74LS374)
|
||||
(libsource (lib 74xx) (part 74LS374) (description "8-bit Register, 3-state outputs"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72C29D))
|
||||
(comp (ref HiAddrLatch1)
|
||||
(value 74LS374)
|
||||
(footprint Package_DIP:DIP-20_W7.62mm)
|
||||
(datasheet http://www.ti.com/lit/gpn/sn74LS374)
|
||||
(libsource (lib 74xx) (part 74LS374) (description "8-bit Register, 3-state outputs"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72C547))
|
||||
(comp (ref EPROM1)
|
||||
(value 27C080)
|
||||
(footprint Package_DIP:DIP-32_W15.24mm)
|
||||
(datasheet http://ww1.microchip.com/downloads/en/devicedoc/doc0360.pdf)
|
||||
(libsource (lib Memory_EPROM) (part 27C080) (description "OTP EPROM 8 MiBit (1 Mi x 8)"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C72C7EC))
|
||||
(comp (ref C8)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C818D34))
|
||||
(comp (ref C2)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C8192D3))
|
||||
(comp (ref C1)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C81986C))
|
||||
(comp (ref C5)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C81A0E4))
|
||||
(comp (ref C6)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C81A5A9))
|
||||
(comp (ref C7)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C81B5FF))
|
||||
(comp (ref C3)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C81BEDE))
|
||||
(comp (ref C4)
|
||||
(value 0.1µF)
|
||||
(footprint Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm)
|
||||
(datasheet ~)
|
||||
(libsource (lib Device) (part C_Small) (description "Unpolarized capacitor, small symbol"))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 5C81C3BC)))
|
||||
(libparts
|
||||
(libpart (lib 74xx) (part 74LS00)
|
||||
(aliases
|
||||
(alias 74LS37)
|
||||
(alias 7400)
|
||||
(alias 74HCT00)
|
||||
(alias 74HC00))
|
||||
(description "quad 2-input NAND gate")
|
||||
(docs http://www.ti.com/lit/gpn/sn74ls00)
|
||||
(footprints
|
||||
(fp DIP*W7.62mm*)
|
||||
(fp SO14*))
|
||||
(fields
|
||||
(field (name Reference) U)
|
||||
(field (name Value) 74LS00))
|
||||
(pins
|
||||
(pin (num 1) (name ~) (type input))
|
||||
(pin (num 2) (name ~) (type input))
|
||||
(pin (num 3) (name ~) (type output))
|
||||
(pin (num 4) (name ~) (type input))
|
||||
(pin (num 5) (name ~) (type input))
|
||||
(pin (num 6) (name ~) (type output))
|
||||
(pin (num 7) (name GND) (type power_in))
|
||||
(pin (num 8) (name ~) (type output))
|
||||
(pin (num 9) (name ~) (type input))
|
||||
(pin (num 10) (name ~) (type input))
|
||||
(pin (num 11) (name ~) (type output))
|
||||
(pin (num 12) (name ~) (type input))
|
||||
(pin (num 13) (name ~) (type input))
|
||||
(pin (num 14) (name VCC) (type power_in))))
|
||||
(libpart (lib 74xx) (part 74LS245)
|
||||
(aliases
|
||||
(alias 74HC245))
|
||||
(description "Octal BUS Transceivers, 3-State outputs")
|
||||
(docs http://www.ti.com/lit/gpn/sn74LS245)
|
||||
(footprints
|
||||
(fp DIP?20*))
|
||||
(fields
|
||||
(field (name Reference) U)
|
||||
(field (name Value) 74LS245))
|
||||
(pins
|
||||
(pin (num 1) (name A->B) (type input))
|
||||
(pin (num 2) (name A0) (type 3state))
|
||||
(pin (num 3) (name A1) (type 3state))
|
||||
(pin (num 4) (name A2) (type 3state))
|
||||
(pin (num 5) (name A3) (type 3state))
|
||||
(pin (num 6) (name A4) (type 3state))
|
||||
(pin (num 7) (name A5) (type 3state))
|
||||
(pin (num 8) (name A6) (type 3state))
|
||||
(pin (num 9) (name A7) (type 3state))
|
||||
(pin (num 10) (name GND) (type power_in))
|
||||
(pin (num 11) (name B7) (type 3state))
|
||||
(pin (num 12) (name B6) (type 3state))
|
||||
(pin (num 13) (name B5) (type 3state))
|
||||
(pin (num 14) (name B4) (type 3state))
|
||||
(pin (num 15) (name B3) (type 3state))
|
||||
(pin (num 16) (name B2) (type 3state))
|
||||
(pin (num 17) (name B1) (type 3state))
|
||||
(pin (num 18) (name B0) (type 3state))
|
||||
(pin (num 19) (name CE) (type input))
|
||||
(pin (num 20) (name VCC) (type power_in))))
|
||||
(libpart (lib 74xx) (part 74LS32)
|
||||
(description "Quad 2-input OR")
|
||||
(docs http://www.ti.com/lit/gpn/sn74LS32)
|
||||
(footprints
|
||||
(fp DIP?14*))
|
||||
(fields
|
||||
(field (name Reference) U)
|
||||
(field (name Value) 74LS32))
|
||||
(pins
|
||||
(pin (num 1) (name ~) (type input))
|
||||
(pin (num 2) (name ~) (type input))
|
||||
(pin (num 3) (name ~) (type output))
|
||||
(pin (num 4) (name ~) (type input))
|
||||
(pin (num 5) (name ~) (type input))
|
||||
(pin (num 6) (name ~) (type output))
|
||||
(pin (num 7) (name GND) (type power_in))
|
||||
(pin (num 8) (name ~) (type output))
|
||||
(pin (num 9) (name ~) (type input))
|
||||
(pin (num 10) (name ~) (type input))
|
||||
(pin (num 11) (name ~) (type output))
|
||||
(pin (num 12) (name ~) (type input))
|
||||
(pin (num 13) (name ~) (type input))
|
||||
(pin (num 14) (name VCC) (type power_in))))
|
||||
(libpart (lib 74xx) (part 74LS374)
|
||||
(description "8-bit Register, 3-state outputs")
|
||||
(docs http://www.ti.com/lit/gpn/sn74LS374)
|
||||
(footprints
|
||||
(fp DIP?20*))
|
||||
(fields
|
||||
(field (name Reference) U)
|
||||
(field (name Value) 74LS374))
|
||||
(pins
|
||||
(pin (num 1) (name OE) (type input))
|
||||
(pin (num 2) (name O0) (type 3state))
|
||||
(pin (num 3) (name D0) (type input))
|
||||
(pin (num 4) (name D1) (type input))
|
||||
(pin (num 5) (name O1) (type 3state))
|
||||
(pin (num 6) (name O2) (type 3state))
|
||||
(pin (num 7) (name D2) (type input))
|
||||
(pin (num 8) (name D3) (type input))
|
||||
(pin (num 9) (name O3) (type 3state))
|
||||
(pin (num 10) (name GND) (type power_in))
|
||||
(pin (num 11) (name Cp) (type input))
|
||||
(pin (num 12) (name O4) (type 3state))
|
||||
(pin (num 13) (name D4) (type input))
|
||||
(pin (num 14) (name D5) (type input))
|
||||
(pin (num 15) (name O5) (type 3state))
|
||||
(pin (num 16) (name O6) (type 3state))
|
||||
(pin (num 17) (name D6) (type input))
|
||||
(pin (num 18) (name D7) (type input))
|
||||
(pin (num 19) (name O7) (type 3state))
|
||||
(pin (num 20) (name VCC) (type power_in))))
|
||||
(libpart (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise)
|
||||
(description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")
|
||||
(docs ~)
|
||||
(footprints
|
||||
(fp Connector*:*_2x??_*))
|
||||
(fields
|
||||
(field (name Reference) J)
|
||||
(field (name Value) Conn_02x25_Counter_Clockwise))
|
||||
(pins
|
||||
(pin (num 1) (name Pin_1) (type passive))
|
||||
(pin (num 2) (name Pin_2) (type passive))
|
||||
(pin (num 3) (name Pin_3) (type passive))
|
||||
(pin (num 4) (name Pin_4) (type passive))
|
||||
(pin (num 5) (name Pin_5) (type passive))
|
||||
(pin (num 6) (name Pin_6) (type passive))
|
||||
(pin (num 7) (name Pin_7) (type passive))
|
||||
(pin (num 8) (name Pin_8) (type passive))
|
||||
(pin (num 9) (name Pin_9) (type passive))
|
||||
(pin (num 10) (name Pin_10) (type passive))
|
||||
(pin (num 11) (name Pin_11) (type passive))
|
||||
(pin (num 12) (name Pin_12) (type passive))
|
||||
(pin (num 13) (name Pin_13) (type passive))
|
||||
(pin (num 14) (name Pin_14) (type passive))
|
||||
(pin (num 15) (name Pin_15) (type passive))
|
||||
(pin (num 16) (name Pin_16) (type passive))
|
||||
(pin (num 17) (name Pin_17) (type passive))
|
||||
(pin (num 18) (name Pin_18) (type passive))
|
||||
(pin (num 19) (name Pin_19) (type passive))
|
||||
(pin (num 20) (name Pin_20) (type passive))
|
||||
(pin (num 21) (name Pin_21) (type passive))
|
||||
(pin (num 22) (name Pin_22) (type passive))
|
||||
(pin (num 23) (name Pin_23) (type passive))
|
||||
(pin (num 24) (name Pin_24) (type passive))
|
||||
(pin (num 25) (name Pin_25) (type passive))
|
||||
(pin (num 26) (name Pin_26) (type passive))
|
||||
(pin (num 27) (name Pin_27) (type passive))
|
||||
(pin (num 28) (name Pin_28) (type passive))
|
||||
(pin (num 29) (name Pin_29) (type passive))
|
||||
(pin (num 30) (name Pin_30) (type passive))
|
||||
(pin (num 31) (name Pin_31) (type passive))
|
||||
(pin (num 32) (name Pin_32) (type passive))
|
||||
(pin (num 33) (name Pin_33) (type passive))
|
||||
(pin (num 34) (name Pin_34) (type passive))
|
||||
(pin (num 35) (name Pin_35) (type passive))
|
||||
(pin (num 36) (name Pin_36) (type passive))
|
||||
(pin (num 37) (name Pin_37) (type passive))
|
||||
(pin (num 38) (name Pin_38) (type passive))
|
||||
(pin (num 39) (name Pin_39) (type passive))
|
||||
(pin (num 40) (name Pin_40) (type passive))
|
||||
(pin (num 41) (name Pin_41) (type passive))
|
||||
(pin (num 42) (name Pin_42) (type passive))
|
||||
(pin (num 43) (name Pin_43) (type passive))
|
||||
(pin (num 44) (name Pin_44) (type passive))
|
||||
(pin (num 45) (name Pin_45) (type passive))
|
||||
(pin (num 46) (name Pin_46) (type passive))
|
||||
(pin (num 47) (name Pin_47) (type passive))
|
||||
(pin (num 48) (name Pin_48) (type passive))
|
||||
(pin (num 49) (name Pin_49) (type passive))
|
||||
(pin (num 50) (name Pin_50) (type passive))))
|
||||
(libpart (lib Device) (part C_Small)
|
||||
(description "Unpolarized capacitor, small symbol")
|
||||
(docs ~)
|
||||
(footprints
|
||||
(fp C_*))
|
||||
(fields
|
||||
(field (name Reference) C)
|
||||
(field (name Value) C_Small))
|
||||
(pins
|
||||
(pin (num 1) (name ~) (type passive))
|
||||
(pin (num 2) (name ~) (type passive))))
|
||||
(libpart (lib Memory_EPROM) (part 27C080)
|
||||
(description "OTP EPROM 8 MiBit (1 Mi x 8)")
|
||||
(docs http://ww1.microchip.com/downloads/en/devicedoc/doc0360.pdf)
|
||||
(footprints
|
||||
(fp DIP*W15.24mm*)
|
||||
(fp PLCC*))
|
||||
(fields
|
||||
(field (name Reference) U)
|
||||
(field (name Value) 27C080))
|
||||
(pins
|
||||
(pin (num 1) (name A19) (type input))
|
||||
(pin (num 2) (name A16) (type input))
|
||||
(pin (num 3) (name A15) (type input))
|
||||
(pin (num 4) (name A12) (type input))
|
||||
(pin (num 5) (name A7) (type input))
|
||||
(pin (num 6) (name A6) (type input))
|
||||
(pin (num 7) (name A5) (type input))
|
||||
(pin (num 8) (name A4) (type input))
|
||||
(pin (num 9) (name A3) (type input))
|
||||
(pin (num 10) (name A2) (type input))
|
||||
(pin (num 11) (name A1) (type input))
|
||||
(pin (num 12) (name A0) (type input))
|
||||
(pin (num 13) (name D0) (type 3state))
|
||||
(pin (num 14) (name D1) (type 3state))
|
||||
(pin (num 15) (name D2) (type 3state))
|
||||
(pin (num 16) (name GND) (type power_in))
|
||||
(pin (num 17) (name D3) (type 3state))
|
||||
(pin (num 18) (name D4) (type 3state))
|
||||
(pin (num 19) (name D5) (type 3state))
|
||||
(pin (num 20) (name D6) (type 3state))
|
||||
(pin (num 21) (name D7) (type 3state))
|
||||
(pin (num 22) (name ~CE) (type input))
|
||||
(pin (num 23) (name A10) (type input))
|
||||
(pin (num 24) (name ~OE) (type input))
|
||||
(pin (num 25) (name A11) (type input))
|
||||
(pin (num 26) (name A9) (type input))
|
||||
(pin (num 27) (name A8) (type input))
|
||||
(pin (num 28) (name A13) (type input))
|
||||
(pin (num 29) (name A14) (type input))
|
||||
(pin (num 30) (name A17) (type input))
|
||||
(pin (num 31) (name A18) (type input))
|
||||
(pin (num 32) (name VCC) (type power_in)))))
|
||||
(libraries
|
||||
(library (logical 74xx)
|
||||
(uri "/Library/Application Support/kicad/library/74xx.lib"))
|
||||
(library (logical Connector_Generic)
|
||||
(uri "/Library/Application Support/kicad/library/Connector_Generic.lib"))
|
||||
(library (logical Device)
|
||||
(uri "/Library/Application Support/kicad/library/Device.lib"))
|
||||
(library (logical Memory_EPROM)
|
||||
(uri "/Library/Application Support/kicad/library/Memory_EPROM.lib")))
|
||||
(nets
|
||||
(net (code 1) (name "Net-(J1-Pad10)")
|
||||
(node (ref J1) (pin 10))
|
||||
(node (ref LowAddrBuffer1) (pin 6)))
|
||||
(net (code 2) (name "Net-(J1-Pad11)")
|
||||
(node (ref LowAddrBuffer1) (pin 7))
|
||||
(node (ref J1) (pin 11)))
|
||||
(net (code 3) (name "Net-(J1-Pad12)")
|
||||
(node (ref J1) (pin 12))
|
||||
(node (ref LowAddrBuffer1) (pin 8)))
|
||||
(net (code 4) (name "Net-(J1-Pad13)")
|
||||
(node (ref J1) (pin 13)))
|
||||
(net (code 5) (name "Net-(J1-Pad14)")
|
||||
(node (ref J1) (pin 14)))
|
||||
(net (code 6) (name "Net-(J1-Pad15)")
|
||||
(node (ref J1) (pin 15)))
|
||||
(net (code 7) (name "Net-(J1-Pad16)")
|
||||
(node (ref J1) (pin 16)))
|
||||
(net (code 8) (name "Net-(J1-Pad17)")
|
||||
(node (ref J1) (pin 17)))
|
||||
(net (code 9) (name "Net-(J1-Pad18)")
|
||||
(node (ref U1) (pin 9))
|
||||
(node (ref U1) (pin 10))
|
||||
(node (ref U2) (pin 4))
|
||||
(node (ref J1) (pin 18)))
|
||||
(net (code 10) (name "Net-(J1-Pad19)")
|
||||
(node (ref J1) (pin 19)))
|
||||
(net (code 11) (name "Net-(J1-Pad20)")
|
||||
(node (ref J1) (pin 20)))
|
||||
(net (code 12) (name "Net-(J1-Pad21)")
|
||||
(node (ref J1) (pin 21)))
|
||||
(net (code 13) (name "Net-(J1-Pad22)")
|
||||
(node (ref J1) (pin 22)))
|
||||
(net (code 14) (name "Net-(J1-Pad24)")
|
||||
(node (ref J1) (pin 24))
|
||||
(node (ref J1) (pin 27)))
|
||||
(net (code 15) (name "Net-(J1-Pad23)")
|
||||
(node (ref J1) (pin 23))
|
||||
(node (ref J1) (pin 28)))
|
||||
(net (code 16) (name "Net-(J1-Pad29)")
|
||||
(node (ref J1) (pin 29)))
|
||||
(net (code 17) (name "Net-(EPROM1-Pad11)")
|
||||
(node (ref EPROM1) (pin 11))
|
||||
(node (ref J1) (pin 3)))
|
||||
(net (code 18) (name "Net-(J1-Pad30)")
|
||||
(node (ref J1) (pin 30)))
|
||||
(net (code 19) (name "Net-(J1-Pad31)")
|
||||
(node (ref J1) (pin 31)))
|
||||
(net (code 20) (name "Net-(J1-Pad32)")
|
||||
(node (ref J1) (pin 32)))
|
||||
(net (code 21) (name "Net-(J1-Pad33)")
|
||||
(node (ref J1) (pin 33)))
|
||||
(net (code 22) (name "Net-(J1-Pad34)")
|
||||
(node (ref J1) (pin 34)))
|
||||
(net (code 23) (name "Net-(J1-Pad35)")
|
||||
(node (ref J1) (pin 35)))
|
||||
(net (code 24) (name "Net-(J1-Pad36)")
|
||||
(node (ref J1) (pin 36)))
|
||||
(net (code 25) (name "Net-(J1-Pad37)")
|
||||
(node (ref J1) (pin 37)))
|
||||
(net (code 26) (name "Net-(J1-Pad38)")
|
||||
(node (ref J1) (pin 38)))
|
||||
(net (code 27) (name "Net-(J1-Pad39)")
|
||||
(node (ref J1) (pin 39)))
|
||||
(net (code 28) (name "Net-(EPROM1-Pad10)")
|
||||
(node (ref EPROM1) (pin 10))
|
||||
(node (ref J1) (pin 4)))
|
||||
(net (code 29) (name "Net-(J1-Pad40)")
|
||||
(node (ref J1) (pin 40)))
|
||||
(net (code 30) (name "Net-(EPROM1-Pad9)")
|
||||
(node (ref EPROM1) (pin 9))
|
||||
(node (ref J1) (pin 5)))
|
||||
(net (code 31) (name "Net-(J1-Pad50)")
|
||||
(node (ref J1) (pin 50)))
|
||||
(net (code 32) (name "Net-(J1-Pad6)")
|
||||
(node (ref LowAddrBuffer1) (pin 2))
|
||||
(node (ref J1) (pin 6)))
|
||||
(net (code 33) (name "Net-(J1-Pad8)")
|
||||
(node (ref LowAddrBuffer1) (pin 4))
|
||||
(node (ref J1) (pin 8)))
|
||||
(net (code 34) (name "Net-(J1-Pad9)")
|
||||
(node (ref LowAddrBuffer1) (pin 5))
|
||||
(node (ref J1) (pin 9)))
|
||||
(net (code 35) (name "Net-(HiAddrBuffer1-Pad19)")
|
||||
(node (ref LowAddrBuffer1) (pin 19))
|
||||
(node (ref J1) (pin 1))
|
||||
(node (ref U1) (pin 1))
|
||||
(node (ref HiAddrBuffer1) (pin 19)))
|
||||
(net (code 36) (name "Net-(U1-Pad3)")
|
||||
(node (ref U1) (pin 5))
|
||||
(node (ref U1) (pin 4))
|
||||
(node (ref U1) (pin 3)))
|
||||
(net (code 37) (name "Net-(DataBuffer1-Pad19)")
|
||||
(node (ref DataBuffer1) (pin 19))
|
||||
(node (ref U1) (pin 6))
|
||||
(node (ref U2) (pin 1)))
|
||||
(net (code 38) (name "Net-(DataBuffer1-Pad1)")
|
||||
(node (ref U2) (pin 2))
|
||||
(node (ref DataBuffer1) (pin 1))
|
||||
(node (ref U1) (pin 8)))
|
||||
(net (code 39) (name "Net-(U1-Pad11)")
|
||||
(node (ref U2) (pin 13))
|
||||
(node (ref U1) (pin 11)))
|
||||
(net (code 40) (name "Net-(U2-Pad12)")
|
||||
(node (ref U2) (pin 9))
|
||||
(node (ref U2) (pin 12))
|
||||
(node (ref U2) (pin 6)))
|
||||
(net (code 41) (name "Net-(EPROM1-Pad12)")
|
||||
(node (ref EPROM1) (pin 12))
|
||||
(node (ref U1) (pin 13))
|
||||
(node (ref J1) (pin 2))
|
||||
(node (ref U2) (pin 10))
|
||||
(node (ref U1) (pin 12)))
|
||||
(net (code 42) (name "Net-(HiAddrLatch1-Pad11)")
|
||||
(node (ref U2) (pin 11))
|
||||
(node (ref HiAddrLatch1) (pin 11)))
|
||||
(net (code 43) (name "Net-(DataBuffer1-Pad11)")
|
||||
(node (ref DataBuffer1) (pin 11))
|
||||
(node (ref EPROM1) (pin 21)))
|
||||
(net (code 44) (name "Net-(DataBuffer1-Pad13)")
|
||||
(node (ref DataBuffer1) (pin 13))
|
||||
(node (ref EPROM1) (pin 19)))
|
||||
(net (code 45) (name "Net-(DataBuffer1-Pad15)")
|
||||
(node (ref EPROM1) (pin 17))
|
||||
(node (ref DataBuffer1) (pin 15)))
|
||||
(net (code 46) (name "Net-(EPROM1-Pad25)")
|
||||
(node (ref EPROM1) (pin 25))
|
||||
(node (ref LowAddrLatch1) (pin 19))
|
||||
(node (ref LowAddrBuffer1) (pin 11)))
|
||||
(net (code 47) (name "Net-(EPROM1-Pad23)")
|
||||
(node (ref LowAddrBuffer1) (pin 12))
|
||||
(node (ref EPROM1) (pin 23))
|
||||
(node (ref LowAddrLatch1) (pin 16)))
|
||||
(net (code 48) (name "Net-(EPROM1-Pad26)")
|
||||
(node (ref EPROM1) (pin 26))
|
||||
(node (ref LowAddrBuffer1) (pin 13))
|
||||
(node (ref LowAddrLatch1) (pin 15)))
|
||||
(net (code 49) (name "Net-(EPROM1-Pad27)")
|
||||
(node (ref LowAddrBuffer1) (pin 14))
|
||||
(node (ref LowAddrLatch1) (pin 12))
|
||||
(node (ref EPROM1) (pin 27)))
|
||||
(net (code 50) (name "Net-(EPROM1-Pad5)")
|
||||
(node (ref EPROM1) (pin 5))
|
||||
(node (ref LowAddrLatch1) (pin 9))
|
||||
(node (ref LowAddrBuffer1) (pin 15)))
|
||||
(net (code 51) (name "Net-(EPROM1-Pad6)")
|
||||
(node (ref LowAddrBuffer1) (pin 16))
|
||||
(node (ref LowAddrLatch1) (pin 6))
|
||||
(node (ref EPROM1) (pin 6)))
|
||||
(net (code 52) (name "Net-(EPROM1-Pad7)")
|
||||
(node (ref LowAddrBuffer1) (pin 17))
|
||||
(node (ref LowAddrLatch1) (pin 5))
|
||||
(node (ref EPROM1) (pin 7)))
|
||||
(net (code 53) (name "Net-(EPROM1-Pad8)")
|
||||
(node (ref LowAddrBuffer1) (pin 18))
|
||||
(node (ref LowAddrLatch1) (pin 2))
|
||||
(node (ref EPROM1) (pin 8)))
|
||||
(net (code 54) (name "Net-(EPROM1-Pad1)")
|
||||
(node (ref HiAddrBuffer1) (pin 11))
|
||||
(node (ref EPROM1) (pin 1))
|
||||
(node (ref HiAddrLatch1) (pin 19)))
|
||||
(net (code 55) (name "Net-(EPROM1-Pad31)")
|
||||
(node (ref EPROM1) (pin 31))
|
||||
(node (ref HiAddrLatch1) (pin 16))
|
||||
(node (ref HiAddrBuffer1) (pin 12)))
|
||||
(net (code 56) (name "Net-(EPROM1-Pad30)")
|
||||
(node (ref HiAddrBuffer1) (pin 13))
|
||||
(node (ref EPROM1) (pin 30))
|
||||
(node (ref HiAddrLatch1) (pin 15)))
|
||||
(net (code 57) (name "Net-(EPROM1-Pad2)")
|
||||
(node (ref HiAddrLatch1) (pin 12))
|
||||
(node (ref HiAddrBuffer1) (pin 14))
|
||||
(node (ref EPROM1) (pin 2)))
|
||||
(net (code 58) (name "Net-(EPROM1-Pad3)")
|
||||
(node (ref HiAddrLatch1) (pin 9))
|
||||
(node (ref EPROM1) (pin 3))
|
||||
(node (ref HiAddrBuffer1) (pin 15)))
|
||||
(net (code 59) (name "Net-(EPROM1-Pad29)")
|
||||
(node (ref HiAddrLatch1) (pin 6))
|
||||
(node (ref HiAddrBuffer1) (pin 16))
|
||||
(node (ref EPROM1) (pin 29)))
|
||||
(net (code 60) (name "Net-(EPROM1-Pad28)")
|
||||
(node (ref HiAddrBuffer1) (pin 17))
|
||||
(node (ref HiAddrLatch1) (pin 5))
|
||||
(node (ref EPROM1) (pin 28)))
|
||||
(net (code 61) (name "Net-(EPROM1-Pad4)")
|
||||
(node (ref EPROM1) (pin 4))
|
||||
(node (ref HiAddrLatch1) (pin 2))
|
||||
(node (ref HiAddrBuffer1) (pin 18)))
|
||||
(net (code 62) (name "Net-(LowAddrLatch1-Pad11)")
|
||||
(node (ref U2) (pin 8))
|
||||
(node (ref LowAddrLatch1) (pin 11)))
|
||||
(net (code 63) (name "Net-(DataBuffer1-Pad6)")
|
||||
(node (ref LowAddrLatch1) (pin 13))
|
||||
(node (ref HiAddrLatch1) (pin 13))
|
||||
(node (ref J1) (pin 45))
|
||||
(node (ref DataBuffer1) (pin 6)))
|
||||
(net (code 64) (name "Net-(DataBuffer1-Pad7)")
|
||||
(node (ref DataBuffer1) (pin 7))
|
||||
(node (ref HiAddrLatch1) (pin 14))
|
||||
(node (ref J1) (pin 44))
|
||||
(node (ref LowAddrLatch1) (pin 14)))
|
||||
(net (code 65) (name "Net-(DataBuffer1-Pad8)")
|
||||
(node (ref DataBuffer1) (pin 8))
|
||||
(node (ref HiAddrLatch1) (pin 17))
|
||||
(node (ref LowAddrLatch1) (pin 17))
|
||||
(node (ref J1) (pin 43)))
|
||||
(net (code 66) (name "Net-(DataBuffer1-Pad2)")
|
||||
(node (ref DataBuffer1) (pin 2))
|
||||
(node (ref HiAddrLatch1) (pin 3))
|
||||
(node (ref LowAddrLatch1) (pin 3))
|
||||
(node (ref J1) (pin 49)))
|
||||
(net (code 67) (name "Net-(DataBuffer1-Pad3)")
|
||||
(node (ref DataBuffer1) (pin 3))
|
||||
(node (ref J1) (pin 48))
|
||||
(node (ref LowAddrLatch1) (pin 4))
|
||||
(node (ref HiAddrLatch1) (pin 4)))
|
||||
(net (code 68) (name "Net-(DataBuffer1-Pad4)")
|
||||
(node (ref LowAddrLatch1) (pin 7))
|
||||
(node (ref DataBuffer1) (pin 4))
|
||||
(node (ref J1) (pin 47))
|
||||
(node (ref HiAddrLatch1) (pin 7)))
|
||||
(net (code 69) (name "Net-(DataBuffer1-Pad5)")
|
||||
(node (ref HiAddrLatch1) (pin 8))
|
||||
(node (ref J1) (pin 46))
|
||||
(node (ref DataBuffer1) (pin 5))
|
||||
(node (ref LowAddrLatch1) (pin 8)))
|
||||
(net (code 70) (name "Net-(DataBuffer1-Pad12)")
|
||||
(node (ref EPROM1) (pin 20))
|
||||
(node (ref DataBuffer1) (pin 12)))
|
||||
(net (code 71) (name "Net-(EPROM1-Pad22)")
|
||||
(node (ref EPROM1) (pin 24))
|
||||
(node (ref EPROM1) (pin 22))
|
||||
(node (ref U2) (pin 3)))
|
||||
(net (code 72) (name "Net-(DataBuffer1-Pad18)")
|
||||
(node (ref EPROM1) (pin 13))
|
||||
(node (ref DataBuffer1) (pin 18)))
|
||||
(net (code 73) (name "Net-(DataBuffer1-Pad17)")
|
||||
(node (ref EPROM1) (pin 14))
|
||||
(node (ref DataBuffer1) (pin 17)))
|
||||
(net (code 74) (name "Net-(DataBuffer1-Pad16)")
|
||||
(node (ref DataBuffer1) (pin 16))
|
||||
(node (ref EPROM1) (pin 15)))
|
||||
(net (code 75) (name "Net-(DataBuffer1-Pad14)")
|
||||
(node (ref EPROM1) (pin 18))
|
||||
(node (ref DataBuffer1) (pin 14)))
|
||||
(net (code 76) (name "Net-(J1-Pad7)")
|
||||
(node (ref J1) (pin 7))
|
||||
(node (ref LowAddrBuffer1) (pin 3)))
|
||||
(net (code 77) (name "Net-(HiAddrLatch1-Pad1)")
|
||||
(node (ref U2) (pin 5))
|
||||
(node (ref U1) (pin 2))
|
||||
(node (ref J1) (pin 41))
|
||||
(node (ref LowAddrLatch1) (pin 1))
|
||||
(node (ref HiAddrLatch1) (pin 1)))
|
||||
(net (code 78) (name "Net-(DataBuffer1-Pad9)")
|
||||
(node (ref HiAddrLatch1) (pin 18))
|
||||
(node (ref J1) (pin 42))
|
||||
(node (ref DataBuffer1) (pin 9))
|
||||
(node (ref LowAddrLatch1) (pin 18)))
|
||||
(net (code 79) (name GND)
|
||||
(node (ref C4) (pin 2))
|
||||
(node (ref C3) (pin 2))
|
||||
(node (ref C7) (pin 2))
|
||||
(node (ref C6) (pin 2))
|
||||
(node (ref C5) (pin 2))
|
||||
(node (ref C1) (pin 2))
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|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
Loading…
Reference in New Issue