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Documentation update
2026-03-13 16:16:26 +00:00 · 2022-02-05 21:31:00 -05:00 · 2021-09-04 23:58:16 -04:00 · 2021-08-06 02:38:04 -04:00 · 2021-07-13 09:15:01 -04:00 · 2021-07-13 09:11:33 -04:00
37 changed files with 329669 additions and 1 deletions
--- a/.gitignore
+++ b/.gitignore
@@ -14,6 +14,7 @@ _autosave-*
 *-save.pro
 *-save.kicad_pcb
 fp-info-cache
+RAM128-backups/*

 # Netlist files (exported from Eeschema)
 *.net
@@ -24,6 +25,6 @@ fp-info-cache

 # Exported BOM files
 *.xml
-*.csv

 *.DS_Store
+Documentation/~$4208BManual.docx
--- a/Documentation/BackIsom.png
+++ b/Documentation/BackIsom.png
--- a/Documentation/FrontIsom.png
+++ b/Documentation/FrontIsom.png
--- a/Documentation/FrontIsomTransparent.png
+++ b/Documentation/FrontIsomTransparent.png
--- a/Documentation/FrontPicture.jpeg
+++ b/Documentation/FrontPicture.jpeg
--- a/Documentation/FrontPictureOrig.jpeg
+++ b/Documentation/FrontPictureOrig.jpeg
--- a/Documentation/GW4208BManual.docx
+++ b/Documentation/GW4208BManual.docx
--- a/Documentation/GW4208BManual.pdf
+++ b/Documentation/GW4208BManual.pdf
--- a/Documentation/Placement.pdf
+++ b/Documentation/Placement.pdf
--- a/Documentation/SW1
+++ b/Documentation/SW1
--- a/Documentation/Schematic.pdf
+++ b/Documentation/Schematic.pdf
--- a/GW4208.pds
+++ b/GW4208.pds
@@ -0,0 +1,74 @@
+;PALASM Design Description
+
+;---------------------------------- Declaration Segment ------------
+TITLE    GW4208
+PATTERN  
+REVISION Zane Kaminski
+AUTHOR   Garrett's Workshop
+COMPANY  02/18/20
+DATE     02/18/20
+
+CHIP  _GW4208  PAL22V10
+
+;---------------------------------- PIN Declarations ---------------
+NODE 1          GLOBAL                                           ;       
+PIN  1          /DEVSEL                                          ;       
+PIN  2          PHI1                                             ;       
+PIN  3          A0                                               ;       
+PIN  4          A1                                               ;       
+PIN  5          A2                                               ;       
+PIN  6          A3                                               ;       
+PIN  7          A12                                              ;       
+PIN  8          A13                                              ;       
+PIN  9          A14                                              ;       
+PIN  10         A15                                              ;       
+PIN  11         /WE                                              ;       
+PIN  13         /RES                                             ;       
+PIN  14         RA16                                  REGISTERED ;       
+PIN  15         RA15                                  REGISTERED ;       
+PIN  16         RA14                                  REGISTERED ;       
+PIN  18         RA12                                  COMBINATORIAL ;       
+PIN  19         /INH                                  COMBINATORIAL ;       
+PIN  23         /RCS                                  COMBINATORIAL ;       
+PIN  20         BankAB                                REGISTERED ;       
+PIN  21         ENRD                                  REGISTERED ;       
+PIN  22         ENWR                                  REGISTERED ;       
+PIN  17         PREWR                                 REGISTERED ;       
+
+;----------------------------------- Boolean Equation Segment ------
+EQUATIONS
+
+; Registered
+GLOBAL.RSTF = RES
+
+; if A2...
+RA16 = (A2 * A3) + (/A2 * RA16)
+RA15 = (A2 * A1) + (/A2 * RA15)
+RA14 = (A2 * A0) + (/A2 * RA14)
+
+; if /A2...
+BankAB = 	( A2 * BankAB) + 
+			(/A2 * A3)
+
+ENRD =		( A2 * ENRD) + 
+			(/A2 * /A0 * /A1) + 
+			(/A2 * A0 * A1)
+
+PREWR = 	( A2 * PREWR) + 
+			(/A2 * A0)
+
+ENWR = 		( A2 * ENWR) + 
+			(/A2 * A0 * PREWR)
+
+; Combinational
+INH = 	A15 * A14 * A12 * ENRD * /WE + 
+		A15 * A14 * A13 * ENRD * /WE + 
+		A15 * A14 * A12 * ENWR *  WE + 
+		A15 * A14 * A13 * ENWR *  WE
+
+RCS = 	/PHI1 * A15 * A14 * A12 * ENRD * /WE + 
+		/PHI1 * A15 * A14 * A13 * ENRD * /WE + 
+		/PHI1 * A15 * A14 * A12 * ENWR *  WE + 
+		/PHI1 * A15 * A14 * A13 * ENWR *  WE
+
+RA12 = 	/A13 * BankAB + A13 * A12
--- a/RAM128-cache.lib
+++ b/RAM128-cache.lib
@@ -0,0 +1,578 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# 74xx_74LS08
+#
+DEF 74xx_74LS08 U 0 40 Y Y 5 L N
+F0 "U" 0 50 50 H V C CNN
+F1 "74xx_74LS08" 0 -50 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS 74LS09
+$FPLIST
+ DIP*W7.62mm*
+$ENDFPLIST
+DRAW
+A 0 0 150 -899 899 1 1 10 f 0 -150 0 150
+A 0 0 150 -899 899 2 1 10 f 0 -150 0 150
+A 0 0 150 -899 899 3 1 10 f 0 -150 0 150
+A 0 0 150 -899 899 4 1 10 f 0 -150 0 150
+A -360 0 258 354 -354 1 2 10 N -150 150 -150 -150
+A -47 -52 204 150 837 1 2 10 f 150 0 -24 150
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+A -360 0 258 354 -354 2 2 10 N -150 150 -150 -150
+A -47 -52 204 150 837 2 2 10 f 150 0 -24 150
+A -47 52 204 -150 -837 2 2 10 f 150 0 -24 -150
+A -360 0 258 354 -354 3 2 10 N -150 150 -150 -150
+A -47 -52 204 150 837 3 2 10 f 150 0 -24 150
+A -47 52 204 -150 -837 3 2 10 f 150 0 -24 -150
+A -360 0 258 354 -354 4 2 10 N -150 150 -150 -150
+A -47 -52 204 150 837 4 2 10 f 150 0 -24 150
+A -47 52 204 -150 -837 4 2 10 f 150 0 -24 -150
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+P 2 3 2 10 -150 150 -25 150 f
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+P 2 4 2 10 -150 -150 -25 -150 f
+P 2 4 2 10 -150 150 -25 150 f
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+X GND 7 0 -500 200 U 50 50 5 0 W
+X ~ 1 -300 100 150 R 50 50 1 1 I
+X ~ 2 -300 -100 150 R 50 50 1 1 I
+X ~ 3 300 0 150 L 50 50 1 1 O
+X ~ 4 -300 100 150 R 50 50 2 1 I
+X ~ 5 -300 -100 150 R 50 50 2 1 I
+X ~ 6 300 0 150 L 50 50 2 1 O
+X ~ 10 -300 -100 150 R 50 50 3 1 I
+X ~ 8 300 0 150 L 50 50 3 1 O
+X ~ 9 -300 100 150 R 50 50 3 1 I
+X ~ 11 300 0 150 L 50 50 4 1 O
+X ~ 12 -300 100 150 R 50 50 4 1 I
+X ~ 13 -300 -100 150 R 50 50 4 1 I
+X ~ 1 -300 100 170 R 50 50 1 2 I I
+X ~ 2 -300 -100 170 R 50 50 1 2 I I
+X ~ 3 300 0 150 L 50 50 1 2 O I
+X ~ 4 -300 100 170 R 50 50 2 2 I I
+X ~ 5 -300 -100 170 R 50 50 2 2 I I
+X ~ 6 300 0 150 L 50 50 2 2 O I
+X ~ 10 -300 -100 170 R 50 50 3 2 I I
+X ~ 8 300 0 150 L 50 50 3 2 O I
+X ~ 9 -300 100 170 R 50 50 3 2 I I
+X ~ 11 300 0 150 L 50 50 4 2 O I
+X ~ 12 -300 100 170 R 50 50 4 2 I I
+X ~ 13 -300 -100 170 R 50 50 4 2 I I
+ENDDRAW
+ENDDEF
+#
+# 74xx_74LS273
+#
+DEF 74xx_74LS273 U 0 20 Y Y 1 F N
+F0 "U" -300 650 50 H V C CNN
+F1 "74xx_74LS273" -300 -650 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS 74HC273 74HCT273 74AHC273 74AHCT273
+$FPLIST
+ DIP?20*
+ SO?20*
+ SOIC?20*
+$ENDFPLIST
+DRAW
+S -300 600 300 -600 1 1 10 f
+X ~Mr 1 -500 -500 200 R 50 50 1 0 I
+X GND 10 0 -800 200 U 50 50 1 0 W
+X Cp 11 -500 -400 200 R 50 50 1 0 I C
+X Q4 12 500 100 200 L 50 50 1 0 O
+X D4 13 -500 100 200 R 50 50 1 0 I
+X D5 14 -500 0 200 R 50 50 1 0 I
+X Q5 15 500 0 200 L 50 50 1 0 O
+X Q6 16 500 -100 200 L 50 50 1 0 O
+X D6 17 -500 -100 200 R 50 50 1 0 I
+X D7 18 -500 -200 200 R 50 50 1 0 I
+X Q7 19 500 -200 200 L 50 50 1 0 O
+X Q0 2 500 500 200 L 50 50 1 0 O
+X VCC 20 0 800 200 D 50 50 1 0 W
+X D0 3 -500 500 200 R 50 50 1 0 I
+X D1 4 -500 400 200 R 50 50 1 0 I
+X Q1 5 500 400 200 L 50 50 1 0 O
+X Q2 6 500 300 200 L 50 50 1 0 O
+X D2 7 -500 300 200 R 50 50 1 0 I
+X D3 8 -500 200 200 R 50 50 1 0 I
+X Q3 9 500 200 200 L 50 50 1 0 O
+ENDDRAW
+ENDDEF
+#
+# 74xx_74LS32
+#
+DEF 74xx_74LS32 U 0 40 Y Y 5 L N
+F0 "U" 0 50 50 H V C CNN
+F1 "74xx_74LS32" 0 -50 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ DIP?14*
+$ENDFPLIST
+DRAW
+A -360 0 258 354 -354 1 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 1 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 1 1 10 f 150 0 -24 -150
+A -360 0 258 354 -354 2 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 2 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 2 1 10 f 150 0 -24 -150
+A -360 0 258 354 -354 3 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 3 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 3 1 10 f 150 0 -24 -150
+A -360 0 258 354 -354 4 1 10 N -150 150 -150 -150
+A -47 -52 204 150 837 4 1 10 f 150 0 -24 150
+A -47 52 204 -150 -837 4 1 10 f 150 0 -24 -150
+A 0 0 150 -899 899 1 2 10 f 0 -150 0 150
+A 0 0 150 -899 899 2 2 10 f 0 -150 0 150
+A 0 0 150 -899 899 3 2 10 f 0 -150 0 150
+A 0 0 150 -899 899 4 2 10 f 0 -150 0 150
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+P 2 2 1 10 -150 -150 -25 -150 f
+P 2 2 1 10 -150 150 -25 150 f
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+P 2 3 1 10 -150 -150 -25 -150 f
+P 2 3 1 10 -150 150 -25 150 f
+P 12 3 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
+P 2 4 1 10 -150 -150 -25 -150 f
+P 2 4 1 10 -150 150 -25 150 f
+P 12 4 1 -1000 -25 150 -150 150 -150 150 -140 134 -119 89 -106 41 -103 -10 -109 -59 -125 -107 -150 -150 -150 -150 -25 -150 f
+P 4 1 2 10 0 150 -150 150 -150 -150 0 -150 f
+P 4 2 2 10 0 150 -150 150 -150 -150 0 -150 f
+P 4 3 2 10 0 150 -150 150 -150 -150 0 -150 f
+P 4 4 2 10 0 150 -150 150 -150 -150 0 -150 f
+X VCC 14 0 500 200 D 50 50 5 0 W
+X GND 7 0 -500 200 U 50 50 5 0 W
+X ~ 1 -300 100 170 R 50 50 1 1 I
+X ~ 2 -300 -100 170 R 50 50 1 1 I
+X ~ 3 300 0 150 L 50 50 1 1 O
+X ~ 4 -300 100 170 R 50 50 2 1 I
+X ~ 5 -300 -100 170 R 50 50 2 1 I
+X ~ 6 300 0 150 L 50 50 2 1 O
+X ~ 10 -300 -100 170 R 50 50 3 1 I
+X ~ 8 300 0 150 L 50 50 3 1 O
+X ~ 9 -300 100 170 R 50 50 3 1 I
+X ~ 11 300 0 150 L 50 50 4 1 O
+X ~ 12 -300 100 170 R 50 50 4 1 I
+X ~ 13 -300 -100 170 R 50 50 4 1 I
+X ~ 1 -300 100 150 R 50 50 1 2 I I
+X ~ 2 -300 -100 150 R 50 50 1 2 I I
+X ~ 3 300 0 150 L 50 50 1 2 O I
+X ~ 4 -300 100 150 R 50 50 2 2 I I
+X ~ 5 -300 -100 150 R 50 50 2 2 I I
+X ~ 6 300 0 150 L 50 50 2 2 O I
+X ~ 10 -300 -100 150 R 50 50 3 2 I I
+X ~ 8 300 0 150 L 50 50 3 2 O I
+X ~ 9 -300 100 150 R 50 50 3 2 I I
+X ~ 11 300 0 150 L 50 50 4 2 O I
+X ~ 12 -300 100 150 R 50 50 4 2 I I
+X ~ 13 -300 -100 150 R 50 50 4 2 I I
+ENDDRAW
+ENDDEF
+#
+# Connector_Generic_Conn_02x25_Counter_Clockwise
+#
+DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
+F0 "J" 50 1300 50 H V C CNN
+F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Connector*:*_2x??_*
+$ENDFPLIST
+DRAW
+S -50 -1195 0 -1205 1 1 6 N
+S -50 -1095 0 -1105 1 1 6 N
+S -50 -995 0 -1005 1 1 6 N
+S -50 -895 0 -905 1 1 6 N
+S -50 -795 0 -805 1 1 6 N
+S -50 -695 0 -705 1 1 6 N
+S -50 -595 0 -605 1 1 6 N
+S -50 -495 0 -505 1 1 6 N
+S -50 -395 0 -405 1 1 6 N
+S -50 -295 0 -305 1 1 6 N
+S -50 -195 0 -205 1 1 6 N
+S -50 -95 0 -105 1 1 6 N
+S -50 5 0 -5 1 1 6 N
+S -50 105 0 95 1 1 6 N
+S -50 205 0 195 1 1 6 N
+S -50 305 0 295 1 1 6 N
+S -50 405 0 395 1 1 6 N
+S -50 505 0 495 1 1 6 N
+S -50 605 0 595 1 1 6 N
+S -50 705 0 695 1 1 6 N
+S -50 805 0 795 1 1 6 N
+S -50 905 0 895 1 1 6 N
+S -50 1005 0 995 1 1 6 N
+S -50 1105 0 1095 1 1 6 N
+S -50 1205 0 1195 1 1 6 N
+S -50 1250 150 -1250 1 1 10 f
+S 150 -1195 100 -1205 1 1 6 N
+S 150 -1095 100 -1105 1 1 6 N
+S 150 -995 100 -1005 1 1 6 N
+S 150 -895 100 -905 1 1 6 N
+S 150 -795 100 -805 1 1 6 N
+S 150 -695 100 -705 1 1 6 N
+S 150 -595 100 -605 1 1 6 N
+S 150 -495 100 -505 1 1 6 N
+S 150 -395 100 -405 1 1 6 N
+S 150 -295 100 -305 1 1 6 N
+S 150 -195 100 -205 1 1 6 N
+S 150 -95 100 -105 1 1 6 N
+S 150 5 100 -5 1 1 6 N
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+S 150 705 100 695 1 1 6 N
+S 150 805 100 795 1 1 6 N
+S 150 905 100 895 1 1 6 N
+S 150 1005 100 995 1 1 6 N
+S 150 1105 100 1095 1 1 6 N
+S 150 1205 100 1195 1 1 6 N
+X Pin_1 1 -200 1200 150 R 50 50 1 1 P
+X Pin_10 10 -200 300 150 R 50 50 1 1 P
+X Pin_11 11 -200 200 150 R 50 50 1 1 P
+X Pin_12 12 -200 100 150 R 50 50 1 1 P
+X Pin_13 13 -200 0 150 R 50 50 1 1 P
+X Pin_14 14 -200 -100 150 R 50 50 1 1 P
+X Pin_15 15 -200 -200 150 R 50 50 1 1 P
+X Pin_16 16 -200 -300 150 R 50 50 1 1 P
+X Pin_17 17 -200 -400 150 R 50 50 1 1 P
+X Pin_18 18 -200 -500 150 R 50 50 1 1 P
+X Pin_19 19 -200 -600 150 R 50 50 1 1 P
+X Pin_2 2 -200 1100 150 R 50 50 1 1 P
+X Pin_20 20 -200 -700 150 R 50 50 1 1 P
+X Pin_21 21 -200 -800 150 R 50 50 1 1 P
+X Pin_22 22 -200 -900 150 R 50 50 1 1 P
+X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
+X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
+X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
+X Pin_26 26 300 -1200 150 L 50 50 1 1 P
+X Pin_27 27 300 -1100 150 L 50 50 1 1 P
+X Pin_28 28 300 -1000 150 L 50 50 1 1 P
+X Pin_29 29 300 -900 150 L 50 50 1 1 P
+X Pin_3 3 -200 1000 150 R 50 50 1 1 P
+X Pin_30 30 300 -800 150 L 50 50 1 1 P
+X Pin_31 31 300 -700 150 L 50 50 1 1 P
+X Pin_32 32 300 -600 150 L 50 50 1 1 P
+X Pin_33 33 300 -500 150 L 50 50 1 1 P
+X Pin_34 34 300 -400 150 L 50 50 1 1 P
+X Pin_35 35 300 -300 150 L 50 50 1 1 P
+X Pin_36 36 300 -200 150 L 50 50 1 1 P
+X Pin_37 37 300 -100 150 L 50 50 1 1 P
+X Pin_38 38 300 0 150 L 50 50 1 1 P
+X Pin_39 39 300 100 150 L 50 50 1 1 P
+X Pin_4 4 -200 900 150 R 50 50 1 1 P
+X Pin_40 40 300 200 150 L 50 50 1 1 P
+X Pin_41 41 300 300 150 L 50 50 1 1 P
+X Pin_42 42 300 400 150 L 50 50 1 1 P
+X Pin_43 43 300 500 150 L 50 50 1 1 P
+X Pin_44 44 300 600 150 L 50 50 1 1 P
+X Pin_45 45 300 700 150 L 50 50 1 1 P
+X Pin_46 46 300 800 150 L 50 50 1 1 P
+X Pin_47 47 300 900 150 L 50 50 1 1 P
+X Pin_48 48 300 1000 150 L 50 50 1 1 P
+X Pin_49 49 300 1100 150 L 50 50 1 1 P
+X Pin_5 5 -200 800 150 R 50 50 1 1 P
+X Pin_50 50 300 1200 150 L 50 50 1 1 P
+X Pin_6 6 -200 700 150 R 50 50 1 1 P
+X Pin_7 7 -200 600 150 R 50 50 1 1 P
+X Pin_8 8 -200 500 150 R 50 50 1 1 P
+X Pin_9 9 -200 400 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_C_Small
+#
+DEF Device_C_Small C 0 10 N N 1 F N
+F0 "C" 10 70 50 H V L CNN
+F1 "Device_C_Small" 10 -80 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 13 -60 -20 60 -20 N
+P 2 0 1 12 -60 20 60 20 N
+X ~ 1 0 100 80 D 50 50 1 1 P
+X ~ 2 0 -100 80 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Device_R_Small
+#
+DEF Device_R_Small R 0 10 N N 1 F N
+F0 "R" 30 20 50 H V L CNN
+F1 "Device_R_Small" 30 -40 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ R_*
+$ENDFPLIST
+DRAW
+S -30 70 30 -70 0 1 8 N
+X ~ 1 0 100 30 D 50 50 1 1 P
+X ~ 2 0 -100 30 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GW_Logic_741G04GW
+#
+DEF GW_Logic_741G04GW U 0 40 Y Y 1 F N
+F0 "U" 0 250 50 H V C CNN
+F1 "GW_Logic_741G04GW" 0 -250 50 H V C CNN
+F2 "stdpads:SOT-353" 0 -300 50 H I C TNN
+F3 "" 0 -200 60 H I C CNN
+DRAW
+S 200 -200 -200 200 0 1 10 f
+X NC 1 -350 100 150 R 50 50 1 1 N
+X A 2 -400 0 200 R 50 50 1 1 I
+X GND 3 -400 -100 200 R 50 50 1 1 W
+X Y 4 400 -100 200 L 50 50 1 1 O
+X Vcc 5 400 100 200 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# GW_Logic_741G126GW
+#
+DEF GW_Logic_741G126GW U 0 40 Y Y 1 F N
+F0 "U" 0 250 50 H V C CNN
+F1 "GW_Logic_741G126GW" 0 -250 50 H V C CNN
+F2 "stdpads:SOT-353" 0 -300 50 H I C TNN
+F3 "" 0 -200 60 H I C CNN
+DRAW
+S 200 -200 -200 200 0 1 10 f
+X OE 1 -400 100 200 R 50 50 1 1 I
+X A 2 -400 0 200 R 50 50 1 1 I
+X GND 3 -400 -100 200 R 50 50 1 1 W
+X Y 4 400 -100 200 L 50 50 1 1 O
+X Vcc 5 400 100 200 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# GW_Logic_74245
+#
+DEF GW_Logic_74245 U 0 40 Y Y 1 F N
+F0 "U" 0 600 50 H V C CNN
+F1 "GW_Logic_74245" 0 -600 50 H V C CNN
+F2 "" 0 -650 50 H I C TNN
+F3 "" 0 100 60 H I C CNN
+DRAW
+S -200 550 200 -550 0 1 10 f
+X AtoB 1 -400 450 200 R 50 50 1 1 I
+X GND 10 -400 -450 200 R 50 50 1 1 W
+X B7 11 400 -450 200 L 50 50 1 1 B
+X B6 12 400 -350 200 L 50 50 1 1 B
+X B5 13 400 -250 200 L 50 50 1 1 B
+X B4 14 400 -150 200 L 50 50 1 1 B
+X B3 15 400 -50 200 L 50 50 1 1 B
+X B2 16 400 50 200 L 50 50 1 1 B
+X B1 17 400 150 200 L 50 50 1 1 B
+X B0 18 400 250 200 L 50 50 1 1 B
+X ~OE~ 19 400 350 200 L 50 50 1 1 I
+X A0 2 -400 350 200 R 50 50 1 1 B
+X Vcc 20 400 450 200 L 50 50 1 1 W
+X A1 3 -400 250 200 R 50 50 1 1 B
+X A2 4 -400 150 200 R 50 50 1 1 B
+X A3 5 -400 50 200 R 50 50 1 1 B
+X A4 6 -400 -50 200 R 50 50 1 1 B
+X A5 7 -400 -150 200 R 50 50 1 1 B
+X A6 8 -400 -250 200 R 50 50 1 1 B
+X A7 9 -400 -350 200 R 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# GW_RAM_SRAM-128Kx8-SOP-32
+#
+DEF GW_RAM_SRAM-128Kx8-SOP-32 U? 0 20 Y Y 1 F N
+F0 "U?" 0 950 50 H V C CNN
+F1 "GW_RAM_SRAM-128Kx8-SOP-32" 0 0 50 V V C CNN
+F2 "stdpads:SOP-32_P1.27mm" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ TSOP?I*11.8x8mm*P0.5mm*
+ TSOP?I*18.4x8mm*P0.5mm*
+$ENDFPLIST
+DRAW
+S -300 900 300 -900 1 1 10 f
+X NC 1 400 -200 100 L 50 50 1 1 N N
+X A2 10 -400 600 100 R 50 50 1 1 I
+X A1 11 -400 700 100 R 50 50 1 1 I
+X A0 12 -400 800 100 R 50 50 1 1 I
+X D0 13 400 600 100 L 50 50 1 1 B
+X D1 14 400 500 100 L 50 50 1 1 B
+X D2 15 400 400 100 L 50 50 1 1 B
+X GND 16 400 -800 100 L 50 50 1 1 W
+X D3 17 400 300 100 L 50 50 1 1 B
+X D4 18 400 200 100 L 50 50 1 1 B
+X D5 19 400 100 100 L 50 50 1 1 B
+X A16 2 -400 -800 100 R 50 50 1 1 I
+X D6 20 400 0 100 L 50 50 1 1 B
+X D7 21 400 -100 100 L 50 50 1 1 B
+X ~CS~ 22 400 -300 100 L 50 50 1 1 I
+X A10 23 -400 -200 100 R 50 50 1 1 I
+X ~OE 24 400 -600 100 L 50 50 1 1 I
+X A11 25 -400 -300 100 R 50 50 1 1 I
+X A9 26 -400 -100 100 R 50 50 1 1 I
+X A8 27 -400 0 100 R 50 50 1 1 I
+X A13 28 -400 -500 100 R 50 50 1 1 I
+X ~WE 29 400 -500 100 L 50 50 1 1 I
+X A14 3 -400 -600 100 R 50 50 1 1 I
+X CS 30 400 -400 100 L 50 50 1 1 I
+X A15 31 -400 -700 100 R 50 50 1 1 I
+X VCC 32 400 800 100 L 50 50 1 1 W
+X A12 4 -400 -400 100 R 50 50 1 1 I
+X A7 5 -400 100 100 R 50 50 1 1 I
+X A6 6 -400 200 100 R 50 50 1 1 I
+X A5 7 -400 300 100 R 50 50 1 1 I
+X A4 8 -400 400 100 R 50 50 1 1 I
+X A3 9 -400 500 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# Mechanical_Fiducial
+#
+DEF Mechanical_Fiducial FID 0 20 Y Y 1 F N
+F0 "FID" 0 200 50 H V C CNN
+F1 "Mechanical_Fiducial" 0 125 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Fiducial*
+$ENDFPLIST
+DRAW
+C 0 0 50 0 1 20 f
+ENDDRAW
+ENDDEF
+#
+# Mechanical_MountingHole_Pad
+#
+DEF Mechanical_MountingHole_Pad H 0 40 N N 1 F N
+F0 "H" 0 250 50 H V C CNN
+F1 "Mechanical_MountingHole_Pad" 0 175 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ MountingHole*Pad*
+$ENDFPLIST
+DRAW
+C 0 50 50 0 1 50 N
+X 1 1 0 -100 100 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# Switch_SW_DIP_x02
+#
+DEF Switch_SW_DIP_x02 SW 0 0 Y N 1 F N
+F0 "SW" 0 250 50 H V C CNN
+F1 "Switch_SW_DIP_x02" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ SW?DIP?x2*
+$ENDFPLIST
+DRAW
+C -80 0 20 0 0 0 N
+C -80 100 20 0 0 0 N
+C 80 0 20 0 0 0 N
+C 80 100 20 0 0 0 N
+S -150 200 150 -100 0 1 10 f
+P 2 0 0 0 -60 5 93 46 N
+P 2 0 0 0 -60 105 93 146 N
+X ~ 1 -300 100 200 R 50 50 1 1 P
+X ~ 2 -300 0 200 R 50 50 1 1 P
+X ~ 3 300 0 200 L 50 50 1 1 P
+X ~ 4 300 100 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# power_+12V
+#
+DEF power_+12V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "power_+12V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +12V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_+5V
+#
+DEF power_+5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "power_+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_-12V
+#
+DEF power_-12V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 100 50 H I C CNN
+F1 "power_-12V" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F
+X -12V 1 0 0 0 U 50 50 0 0 W N
+ENDDRAW
+ENDDEF
+#
+# power_-5V
+#
+DEF power_-5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 100 50 H I C CNN
+F1 "power_-5V" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F
+X -5V 1 0 0 0 U 50 50 0 0 W N
+ENDDRAW
+ENDDEF
+#
+# power_GND
+#
+DEF power_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "power_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
--- a/RAM128.4208B-gerber.zip
+++ b/RAM128.4208B-gerber.zip
--- a/RAM128.kicad_pcb
+++ b/RAM128.kicad_pcb
--- a/RAM128.kicad_prl
+++ b/RAM128.kicad_prl
@@ -0,0 +1,75 @@
+{
+  "board": {
+    "active_layer": 37,
+    "active_layer_preset": "",
+    "auto_track_width": true,
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "pads": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "ratsnest_display_mode": 0,
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": true,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      0,
+      1,
+      2,
+      3,
+      4,
+      5,
+      8,
+      9,
+      10,
+      11,
+      12,
+      13,
+      14,
+      15,
+      16,
+      17,
+      18,
+      19,
+      20,
+      21,
+      22,
+      23,
+      24,
+      25,
+      26,
+      27,
+      28,
+      29,
+      30,
+      32,
+      33,
+      34,
+      35,
+      36
+    ],
+    "visible_layers": "003ff75_80000007",
+    "zone_display_mode": 0
+  },
+  "meta": {
+    "filename": "RAM128.kicad_prl",
+    "version": 3
+  },
+  "project": {
+    "files": []
+  }
+}
--- a/RAM128.kicad_pro
+++ b/RAM128.kicad_pro
@@ -0,0 +1,457 @@
+{
+  "board": {
+    "design_settings": {
+      "defaults": {
+        "board_outline_line_width": 0.15,
+        "copper_line_width": 0.15239999999999998,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.049999999999999996,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": false,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.09999999999999999,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.09999999999999999,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.0,
+          "height": 0.6,
+          "width": 1.85
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "45_degree_only": false,
+          "min_clearance": 0.15239999999999998
+        }
+      },
+      "diff_pair_dimensions": [],
+      "drc_exclusions": [],
+      "meta": {
+        "filename": "board_design_settings.json",
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "copper_edge_clearance": "error",
+        "courtyards_overlap": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint_type_mismatch": "error",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "error",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_over_copper": "warning",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zone_has_empty_net": "error",
+        "zones_intersect": "error"
+      },
+      "rule_severitieslegacy_courtyards_overlap": true,
+      "rule_severitieslegacy_no_courtyard_defined": false,
+      "rules": {
+        "allow_blind_buried_vias": false,
+        "allow_microvias": false,
+        "max_error": 0.005,
+        "min_clearance": 0.0,
+        "min_copper_edge_clearance": 0.075,
+        "min_hole_clearance": 0.25,
+        "min_hole_to_hole": 0.25,
+        "min_microvia_diameter": 0.19999999999999998,
+        "min_microvia_drill": 0.09999999999999999,
+        "min_silk_clearance": 0.0,
+        "min_through_hole_diameter": 0.19999999999999998,
+        "min_track_width": 0.15,
+        "min_via_annular_width": 0.049999999999999996,
+        "min_via_diameter": 0.5,
+        "use_height_for_length_calcs": true
+      },
+      "track_widths": [
+        0.0,
+        0.15,
+        0.2,
+        0.25,
+        0.3,
+        0.35,
+        0.4,
+        0.45,
+        0.5,
+        0.6,
+        0.8,
+        1.0,
+        1.27,
+        1.524
+      ],
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        },
+        {
+          "diameter": 0.6,
+          "drill": 0.3
+        },
+        {
+          "diameter": 0.8,
+          "drill": 0.4
+        },
+        {
+          "diameter": 1.0,
+          "drill": 0.5
+        },
+        {
+          "diameter": 1.524,
+          "drill": 0.762
+        }
+      ],
+      "zones_allow_external_fillets": false,
+      "zones_use_no_outline": true
+    },
+    "layer_presets": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        1,
+        1,
+        2,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
+        1,
+        0,
+        1,
+        1,
+        1,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        2,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_label_syntax": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "extra_units": "error",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "lib_symbol_issues": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "similar_labels": "warning",
+      "unannotated": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "RAM128.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12.0,
+        "clearance": 0.15,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.15,
+        "via_diameter": 0.5,
+        "via_drill": 0.2,
+        "wire_width": 6.0
+      }
+    ],
+    "meta": {
+      "version": 2
+    },
+    "net_colors": null
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "RAM128.net",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "drawing": {
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.25,
+      "pin_symbol_size": 0.0,
+      "text_offset_ratio": 0.08
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "Pcbnew",
+    "ngspice": {
+      "fix_include_paths": true,
+      "fix_passive_vals": false,
+      "meta": {
+        "version": 0
+      },
+      "model_mode": 0,
+      "workbook_filename": ""
+    },
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_adjust_passive_values": false,
+    "spice_external_command": "spice \"%I\"",
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "b0906e10-2fbc-4309-a8b4-6fc4cd1a5490",
+      ""
+    ]
+  ],
+  "text_variables": {}
+}
--- a/RAM128.kicad_sch
+++ b/RAM128.kicad_sch
--- a/3
+++ b/3
@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name stdpads)(type KiCad)(uri "$(KIPRJMOD)/../stdpads.pretty")(options "")(descr ""))
+)
--- a/gerber/RAM128-BOM.csv
+++ b/gerber/RAM128-BOM.csv
@@ -0,0 +1,18 @@
+Reference, Quantity, Value, Footprint, Datasheet, LCSC Part
+C16 C1 ,2,"10u","stdpads:C_0805","~","C15850"
+C6 C2 C3 C4 C8 C9 C10 C7 C5 C11 C13 C12 C14 C15 ,14,"2u2","stdpads:C_0603","~","C23630"
+FID4 FID3 FID2 FID1 ,4,"Fiducial","stdpads:Fiducial","~"
+H1 H2 H3 H4 H5 ,5," ","stdpads:PasteHole_1.152mm_NPTH","~"
+J1 ,1,"AppleIIBus","stdpads:AppleIIBus_Edge","~"
+R1 ,1,"3k3","stdpads:R_0805","~","C26010"
+R2 R4 ,2,"22k","stdpads:R_0805","~","C17560"
+R3 ,1,"10k","stdpads:R_0805","~","C17414"
+R5 ,1,"33","stdpads:R_0805","~","C17634"
+SW1 ,1,"DMA/ROM","stdpads:SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm","~","C319052"
+U1 ,1,"621024","stdpads:SOP-32_P1.27mm","http://www.futurlec.com/Datasheet/Memory/628128.pdf","C397875"
+U11 ,1,"74LVC1G126GW","stdpads:SOT-353","","C88039"
+U15 U13 U20 U12 U16 U14 U17 U19 ,8,"74AHCT1G04GW","stdpads:SOT-353","","C148199"
+U2 ,1,"74HCT245PW","stdpads:TSSOP-20_4.4x6.5mm_P0.65mm","","C5980"
+U3 U4 ,2,"74HCT273PW","stdpads:TSSOP-20_4.4x6.5mm_P0.65mm","http://www.ti.com/lit/gpn/sn74LS273","C5983"
+U6 U8 U9 ,3,"74AHCT08PW","stdpads:TSSOP-14_4.4x5mm_P0.65mm","http://www.ti.com/lit/gpn/sn74LS08","C155175"
+U7 U10 ,2,"74AHCT32PW","stdpads:TSSOP-14_4.4x5mm_P0.65mm","http://www.ti.com/lit/gpn/sn74LS32","C129435"
--- a/gerber/RAM128-B_Cu.gbl
+++ b/gerber/RAM128-B_Cu.gbl
--- a/gerber/RAM128-B_Mask.gbs
+++ b/gerber/RAM128-B_Mask.gbs
--- a/gerber/RAM128-B_SilkS.gbo
+++ b/gerber/RAM128-B_SilkS.gbo
--- a/gerber/RAM128-Edge_Cuts.gm1
+++ b/gerber/RAM128-Edge_Cuts.gm1
@@ -0,0 +1,55 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)*
+G04 #@! TF.CreationDate,2021-02-24T21:24:28-05:00*
+G04 #@! TF.ProjectId,RAM128,52414d31-3238-42e6-9b69-6361645f7063,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Profile,NP*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2021-02-24 21:24:28*
+%MOMM*%
+%LPD*%
+G04 APERTURE LIST*
+%ADD10C,0.150000*%
+G04 APERTURE END LIST*
+D10*
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+M02*
--- a/gerber/RAM128-F_Cu.gtl
+++ b/gerber/RAM128-F_Cu.gtl
--- a/gerber/RAM128-F_Mask.gts
+++ b/gerber/RAM128-F_Mask.gts
--- a/gerber/RAM128-F_Paste.gtp
+++ b/gerber/RAM128-F_Paste.gtp
--- a/gerber/RAM128-F_SilkS.gto
+++ b/gerber/RAM128-F_SilkS.gto
--- a/gerber/RAM128-In1_Cu.g2
+++ b/gerber/RAM128-In1_Cu.g2
--- a/gerber/RAM128-In2_Cu.g3
+++ b/gerber/RAM128-In2_Cu.g3
--- a/gerber/RAM128-bottom-pos.csv
+++ b/gerber/RAM128-bottom-pos.csv
@@ -0,0 +1 @@
+Ref,Val,Package,MidX,MidY,Rot,Side
--- a/gerber/RAM128-bottom.pos
+++ b/gerber/RAM128-bottom.pos
@@ -0,0 +1,6 @@
+### Module positions - created on Wednesday, February 24, 2021 at 09:24:17 PM ###
+### Printed by Pcbnew version kicad (5.1.5-0-10_14)
+## Unit = mm, Angle = deg.
+## Side : bottom
+# Ref     Val       Package                PosX       PosY       Rot  Side
+## End
--- a/gerber/RAM128-drl_map.ps
+++ b/gerber/RAM128-drl_map.ps
--- a/gerber/RAM128-top-pos.csv
+++ b/gerber/RAM128-top-pos.csv
@@ -0,0 +1,45 @@
+Ref,Val,Package,MidX,MidY,Rot,Side
+"C1","10u","C_0805",136.310000,-127.889000,180.000000,top
+"C2","2u2","C_0603",75.900000,-126.800000,180.000000,top
+"C3","2u2","C_0603",86.050000,-127.550000,270.000000,top
+"C4","2u2","C_0603",109.600000,-127.750000,270.000000,top
+"C5","2u2","C_0603",117.250000,-127.750000,270.000000,top
+"C6","2u2","C_0603",125.000000,-127.750000,270.000000,top
+"C7","2u2","C_0603",87.500000,-123.050000,90.000000,top
+"C8","2u2","C_0603",94.400000,-118.650000,270.000000,top
+"C9","2u2","C_0603",101.700000,-118.650000,270.000000,top
+"C10","2u2","C_0603",109.000000,-118.650000,270.000000,top
+"C11","2u2","C_0603",116.300000,-118.650000,270.000000,top
+"C12","2u2","C_0603",123.600000,-118.650000,270.000000,top
+"C13","2u2","C_0603",116.250000,-106.900000,270.000000,top
+"C14","2u2","C_0603",130.850000,-106.900000,270.000000,top
+"C15","2u2","C_0603",131.050000,-117.600000,270.000000,top
+"C16","10u","C_0805",73.300000,-130.300000,180.000000,top
+"FID1","Fiducial","Fiducial",67.818000,-129.540000,0.000000,top
+"FID2","Fiducial","Fiducial",75.438000,-100.711000,90.000000,top
+"FID3","Fiducial","Fiducial",136.906000,-103.886000,270.000000,top
+"FID4","Fiducial","Fiducial",136.906000,-124.841000,0.000000,top
+"R1","3k3","R_0805",133.200000,-123.500000,180.000000,top
+"R2","22k","R_0805",100.150000,-115.450000,0.000000,top
+"R3","10k","R_0805",133.200000,-125.700000,180.000000,top
+"R4","22k","R_0805",104.850000,-115.450000,180.000000,top
+"R5","33","R_0805",133.200000,-121.500000,0.000000,top
+"SW1","DMA/ROM","SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm",71.120000,-115.062000,0.000000,top
+"U1","621024","SOP-32_P1.27mm",87.249000,-107.442000,270.000000,top
+"U2","74HCT245PW","TSSOP-20_4.4x6.5mm_P0.65mm",83.125000,-120.850000,180.000000,top
+"U3","74HCT273PW","TSSOP-20_4.4x6.5mm_P0.65mm",125.950000,-109.075000,270.000000,top
+"U4","74HCT273PW","TSSOP-20_4.4x6.5mm_P0.65mm",111.350000,-109.075000,270.000000,top
+"U6","74AHCT08PW","TSSOP-14_4.4x5mm_P0.65mm",105.200000,-120.850000,0.000000,top
+"U7","74AHCT32PW","TSSOP-14_4.4x5mm_P0.65mm",97.900000,-120.850000,0.000000,top
+"U8","74AHCT08PW","TSSOP-14_4.4x5mm_P0.65mm",112.500000,-120.850000,0.000000,top
+"U9","74AHCT08PW","TSSOP-14_4.4x5mm_P0.65mm",119.800000,-120.850000,0.000000,top
+"U10","74AHCT32PW","TSSOP-14_4.4x5mm_P0.65mm",127.100000,-120.850000,0.000000,top
+"U11","74LVC1G126GW","SOT-353",122.550000,-127.850000,90.000000,top
+"U12","74AHCT1G04GW","SOT-353",83.900000,-127.650000,270.000000,top
+"U13","74AHCT1G04GW","SOT-353",78.700000,-127.650000,270.000000,top
+"U14","74AHCT1G04GW","SOT-353",81.300000,-127.650000,270.000000,top
+"U15","74AHCT1G04GW","SOT-353",111.750000,-127.850000,270.000000,top
+"U16","74AHCT1G04GW","SOT-353",119.400000,-127.850000,270.000000,top
+"U17","74AHCT1G04GW","SOT-353",133.200000,-117.700000,270.000000,top
+"U19","74AHCT1G04GW","SOT-353",127.150000,-127.850000,270.000000,top
+"U20","74AHCT1G04GW","SOT-353",129.750000,-127.850000,270.000000,top
--- a/gerber/RAM128-top.pos
+++ b/gerber/RAM128-top.pos
@@ -0,0 +1,50 @@
+### Module positions - created on Wednesday, February 24, 2021 at 09:24:17 PM ###
+### Printed by Pcbnew version kicad (5.1.5-0-10_14)
+## Unit = mm, Angle = deg.
+## Side : top
+# Ref     Val           Package                                     PosX       PosY       Rot  Side
+C1        10u           C_0805                                  136.3100  -127.8890  180.0000  top
+C2        2u2           C_0603                                   75.9000  -126.8000  180.0000  top
+C3        2u2           C_0603                                   86.0500  -127.5500  270.0000  top
+C4        2u2           C_0603                                  109.6000  -127.7500  270.0000  top
+C5        2u2           C_0603                                  117.2500  -127.7500  270.0000  top
+C6        2u2           C_0603                                  125.0000  -127.7500  270.0000  top
+C7        2u2           C_0603                                   87.5000  -123.0500   90.0000  top
+C8        2u2           C_0603                                   94.4000  -118.6500  270.0000  top
+C9        2u2           C_0603                                  101.7000  -118.6500  270.0000  top
+C10       2u2           C_0603                                  109.0000  -118.6500  270.0000  top
+C11       2u2           C_0603                                  116.3000  -118.6500  270.0000  top
+C12       2u2           C_0603                                  123.6000  -118.6500  270.0000  top
+C13       2u2           C_0603                                  116.2500  -106.9000  270.0000  top
+C14       2u2           C_0603                                  130.8500  -106.9000  270.0000  top
+C15       2u2           C_0603                                  131.0500  -117.6000  270.0000  top
+C16       10u           C_0805                                   73.3000  -130.3000  180.0000  top
+FID1      Fiducial      Fiducial                                 67.8180  -129.5400    0.0000  top
+FID2      Fiducial      Fiducial                                 75.4380  -100.7110   90.0000  top
+FID3      Fiducial      Fiducial                                136.9060  -103.8860  270.0000  top
+FID4      Fiducial      Fiducial                                136.9060  -124.8410    0.0000  top
+R1        3k3           R_0805                                  133.2000  -123.5000  180.0000  top
+R2        22k           R_0805                                  100.1500  -115.4500    0.0000  top
+R3        10k           R_0805                                  133.2000  -125.7000  180.0000  top
+R4        22k           R_0805                                  104.8500  -115.4500  180.0000  top
+R5        33            R_0805                                  133.2000  -121.5000    0.0000  top
+SW1       DMA/ROM       SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm    71.1200  -115.0620    0.0000  top
+U1        621024        SOP-32_P1.27mm                           87.2490  -107.4420  270.0000  top
+U2        74HCT245PW    TSSOP-20_4.4x6.5mm_P0.65mm               83.1250  -120.8500  180.0000  top
+U3        74HCT273PW    TSSOP-20_4.4x6.5mm_P0.65mm              125.9500  -109.0750  270.0000  top
+U4        74HCT273PW    TSSOP-20_4.4x6.5mm_P0.65mm              111.3500  -109.0750  270.0000  top
+U6        74AHCT08PW    TSSOP-14_4.4x5mm_P0.65mm                105.2000  -120.8500    0.0000  top
+U7        74AHCT32PW    TSSOP-14_4.4x5mm_P0.65mm                 97.9000  -120.8500    0.0000  top
+U8        74AHCT08PW    TSSOP-14_4.4x5mm_P0.65mm                112.5000  -120.8500    0.0000  top
+U9        74AHCT08PW    TSSOP-14_4.4x5mm_P0.65mm                119.8000  -120.8500    0.0000  top
+U10       74AHCT32PW    TSSOP-14_4.4x5mm_P0.65mm                127.1000  -120.8500    0.0000  top
+U11       74LVC1G126GW  SOT-353                                 122.5500  -127.8500   90.0000  top
+U12       74AHCT1G04GW  SOT-353                                  83.9000  -127.6500  270.0000  top
+U13       74AHCT1G04GW  SOT-353                                  78.7000  -127.6500  270.0000  top
+U14       74AHCT1G04GW  SOT-353                                  81.3000  -127.6500  270.0000  top
+U15       74AHCT1G04GW  SOT-353                                 111.7500  -127.8500  270.0000  top
+U16       74AHCT1G04GW  SOT-353                                 119.4000  -127.8500  270.0000  top
+U17       74AHCT1G04GW  SOT-353                                 133.2000  -117.7000  270.0000  top
+U19       74AHCT1G04GW  SOT-353                                 127.1500  -127.8500  270.0000  top
+U20       74AHCT1G04GW  SOT-353                                 129.7500  -127.8500  270.0000  top
+## End
--- a/gerber/RAM128.drl
+++ b/gerber/RAM128.drl
@@ -0,0 +1,406 @@
+M48
+; DRILL file {KiCad (5.1.5-0-10_14)} date Wednesday, February 24, 2021 at 09:24:30 PM
+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2021-02-24T21:24:30-05:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14)
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+M30
--- a/5
+++ b/5
@@ -0,0 +1,5 @@
+(sym_lib_table
+  (lib (name GW_RAM)(type Legacy)(uri ${KIPRJMOD}/../GW_Parts/GW_RAM.lib)(options "")(descr ""))
+  (lib (name GW_PLD)(type Legacy)(uri ${KIPRJMOD}/../GW_Parts/GW_PLD.lib)(options "")(descr ""))
+  (lib (name GW_Logic)(type Legacy)(uri ${KIPRJMOD}/../GW_Parts/GW_Logic.lib)(options "")(descr ""))
+)
Author	SHA1	Message	Date
Zane Kaminski	77e279f9b6	Migrate to KiCAD 6	2022-02-05 21:31:00 -05:00
Zane Kaminski	19c353e115	Documentation update	2021-09-04 23:58:16 -04:00
Zane Kaminski	5e75e45cfa	Documentation update	2021-08-06 02:38:04 -04:00
Zane Kaminski	032beada78	Documentation update	2021-07-13 09:15:01 -04:00
Zane Kaminski	aba80d1007	Documentation update	2021-07-13 09:11:33 -04:00
Zane Kaminski	8c1cb36967	Documentation update	2021-05-26 17:23:31 -04:00
Zane Kaminski	d279a46f99	Update GW4208BManual.docx	2021-05-22 17:39:03 -04:00
Zane Kaminski	15ab04ee01	Documentation for GW4208B	2021-04-13 03:37:11 -04:00
Zane Kaminski	4657a7b17e	Fabbed	2021-02-24 22:17:43 -05:00
Zane Kaminski	57841f608b	Documentation update for -B revision	2021-02-15 03:34:25 -05:00
Zane Kaminski	9a20587571	Fabbed	2021-01-05 22:49:28 -05:00
Zane Kaminski	9fb477b63d	Good but ugly	2020-12-04 06:59:41 -05:00
Zane Kaminski	7b68e21821	Revert "done with little logic" This reverts commit `34a57e67db`.	2020-10-23 23:59:13 -04:00
Zane Kaminski	8af01efc87	Revert "little logic done" This reverts commit `c8f7fd6b28`.	2020-10-23 23:59:11 -04:00
Zane Kaminski	c8f7fd6b28	little logic done	2020-10-22 22:38:03 -04:00
Zane Kaminski	34a57e67db	done with little logic	2020-10-22 05:01:44 -04:00
Zane Kaminski	6d1ec35437	DMA_OUT change	2020-10-14 13:56:21 -04:00
Zane Kaminski	507eede00c	Fabbed?	2020-10-09 12:50:44 -04:00
Zane Kaminski	1e87576db1	Fixed clock bug	2020-09-29 19:46:57 -04:00
Zane Kaminski	c982ddd702	More stitching	2020-09-19 21:05:45 -04:00
Zane Kaminski	5f476115ac	Update docs	2020-09-12 00:06:36 -04:00
Zane Kaminski	fb81a6c70b	Add renders	2020-09-12 00:06:29 -04:00
Zane Kaminski	0ffe9993c8	Change file names, delete old pictures, documentation, and geber files	2020-09-11 22:45:39 -04:00
Zane Kaminski	aadb0f84ab	Routing done, needs made pretty	2020-09-11 18:39:27 -04:00
Zane Kaminski	02293c72a7	Remove PAL stuff but keep equations to reference	2020-09-10 12:09:07 -04:00
Zane Kaminski	0336ce5003	Board done but ugly	2020-09-10 12:08:51 -04:00
Zane Kaminski	c1eb210e8a	Update .gitignore	2020-08-11 14:50:13 -04:00
Zane Kaminski	2074b674ca	Add GW4208A files	2020-07-25 04:49:31 -04:00