mirror of
https://github.com/garrettsworkshop/RAM2E.git
synced 2024-11-24 15:31:38 +00:00
486 lines
21 KiB
HTML
486 lines
21 KiB
HTML
|
<HTML>
|
||
|
|
<HEAD><TITLE>Project Summary</TITLE>
|
||
|
|
<STYLE TYPE="text/css">
|
||
|
|
<!--
|
||
|
|
body,pre{
font-family:'Courier New', monospace;
color: #000000;
font-size:88%;
background-color: #ffffff;
}
h1 {
font-weight: bold;
margin-top: 24px;
margin-bottom: 10px;
border-bottom: 3px solid #000; font-size: 1em;
}
h2 {
font-weight: bold;
margin-top: 18px;
margin-bottom: 5px;
font-size: 0.90em;
}
h3 {
font-weight: bold;
margin-top: 12px;
margin-bottom: 5px;
font-size: 0.80em;
}
p {
font-size:78%;
}
P.Table {
margin-top: 4px;
margin-bottom: 4px;
margin-right: 4px;
margin-left: 4px;
}
table
{
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
border-collapse: collapse;
}
th {
font-weight:bold;
padding: 4px;
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
vertical-align:top;
text-align:left;
font-size:78%;
}
td {
padding: 4px;
border-width: 1px 1px 1px 1px;
border-style: solid solid solid solid;
border-color: black black black black;
vertical-align:top;
font-size:78%;
}
a {
color:#013C9A;
text-decoration:none;
}
a:visited {
color:#013C9A;
}
a:hover, a:active {
text-decoration:underline;
color:#5BAFD4;
}
.pass
{
background-color: #00ff00;
}
.fail
{
background-color: #ff0000;
}
.comment
{
font-size: 90%;
font-style: italic;
}
|
||
|
|
-->
|
||
|
|
</STYLE>
|
||
|
|
</HEAD>
|
||
|
|
<PRE><A name="Mrp"></A>
|
||
|
|
Lattice Mapping Report File for Design Module 'RAM2E'
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_di"></A><B><U><big>Design Information</big></U></B>
|
||
|
|
|
||
|
|
Command line: map -a MachXO2 -p LCMXO2-1200HC -t TQFP100 -s 4 -oc Commercial
|
||
|
|
RAM2E_LCMXO2_1200HC_impl1.ngd -o RAM2E_LCMXO2_1200HC_impl1_map.ncd -pr
|
||
|
|
RAM2E_LCMXO2_1200HC_impl1.prf -mp RAM2E_LCMXO2_1200HC_impl1.mrp -lpf //Mac/
|
||
|
|
iCloud/Repos/RAM2E/CPLD/LCMXO2-1200HC/impl1/RAM2E_LCMXO2_1200HC_impl1_synpl
|
||
|
|
ify.lpf -lpf //Mac/iCloud/Repos/RAM2E/CPLD/RAM2E-LCMXO2.lpf -c 0 -gui
|
||
|
|
-msgset //Mac/iCloud/Repos/RAM2E/CPLD/LCMXO2-1200HC/promote.xml
|
||
|
|
Target Vendor: LATTICE
|
||
|
|
Target Device: LCMXO2-1200HCTQFP100
|
||
|
|
Target Performance: 4
|
||
|
|
Mapper: xo2c00, version: Diamond (64-bit) 3.12.1.454
|
||
|
|
Mapped on: 09/21/23 05:34:46
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_ds"></A><B><U><big>Design Summary</big></U></B>
|
||
|
|
Number of registers: 111 out of 1520 (7%)
|
||
|
|
PFU registers: 75 out of 1280 (6%)
|
||
|
|
PIO registers: 36 out of 240 (15%)
|
||
|
|
Number of SLICEs: 120 out of 640 (19%)
|
||
|
|
SLICEs as Logic/ROM: 120 out of 640 (19%)
|
||
|
|
SLICEs as RAM: 0 out of 480 (0%)
|
||
|
|
SLICEs as Carry: 9 out of 640 (1%)
|
||
|
|
Number of LUT4s: 239 out of 1280 (19%)
|
||
|
|
Number used as logic LUTs: 221
|
||
|
|
Number used as distributed RAM: 0
|
||
|
|
Number used as ripple logic: 18
|
||
|
|
Number used as shift registers: 0
|
||
|
|
Number of PIO sites used: 70 + 4(JTAG) out of 80 (93%)
|
||
|
|
Number of block RAMs: 0 out of 7 (0%)
|
||
|
|
Number of GSRs: 0 out of 1 (0%)
|
||
|
|
EFB used : Yes
|
||
|
|
JTAG used : No
|
||
|
|
Readback used : No
|
||
|
|
Oscillator used : No
|
||
|
|
Startup used : No
|
||
|
|
POR : On
|
||
|
|
Bandgap : On
|
||
|
|
Number of Power Controller: 0 out of 1 (0%)
|
||
|
|
Number of Dynamic Bank Controller (BCINRD): 0 out of 4 (0%)
|
||
|
|
Number of Dynamic Bank Controller (BCLVDSO): 0 out of 1 (0%)
|
||
|
|
Number of DCCA: 0 out of 8 (0%)
|
||
|
|
Number of DCMA: 0 out of 2 (0%)
|
||
|
|
Number of PLLs: 0 out of 1 (0%)
|
||
|
|
Number of DQSDLLs: 0 out of 2 (0%)
|
||
|
|
Number of CLKDIVC: 0 out of 4 (0%)
|
||
|
|
Number of ECLKSYNCA: 0 out of 4 (0%)
|
||
|
|
Number of ECLKBRIDGECS: 0 out of 2 (0%)
|
||
|
|
Notes:-
|
||
|
|
1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
|
||
|
|
distributed RAMs) + 2*(Number of ripple logic)
|
||
|
|
2. Number of logic LUT4s does not include count of distributed RAM and
|
||
|
|
ripple logic.
|
||
|
|
Number of clocks: 1
|
||
|
|
Net C14M_c: 84 loads, 68 rising, 16 falling (Driver: PIO C14M )
|
||
|
|
Number of Clock Enables: 11
|
||
|
|
|
||
|
|
Net wb_adr_0_sqmuxa_i: 1 loads, 1 LSLICEs
|
||
|
|
Net N_576_i: 17 loads, 9 LSLICEs
|
||
|
|
Net LEDEN13: 4 loads, 4 LSLICEs
|
||
|
|
Net nCS61: 1 loads, 1 LSLICEs
|
||
|
|
Net Vout3: 8 loads, 0 LSLICEs
|
||
|
|
Net S_RNII9DO1_1[1]: 7 loads, 1 LSLICEs
|
||
|
|
Net un1_wb_cyc_stb_0_sqmuxa_1_i[0]: 1 loads, 1 LSLICEs
|
||
|
|
Net un1_wb_adr_0_sqmuxa_2_i[0]: 8 loads, 8 LSLICEs
|
||
|
|
Net N_104: 1 loads, 1 LSLICEs
|
||
|
|
Net N_88: 4 loads, 4 LSLICEs
|
||
|
|
Net un1_LEDEN_0_sqmuxa_1_i_0[0]: 1 loads, 1 LSLICEs
|
||
|
|
Number of LSRs: 5
|
||
|
|
Net un1_CS_0_sqmuxa_i: 2 loads, 2 LSLICEs
|
||
|
|
Net S[2]: 1 loads, 1 LSLICEs
|
||
|
|
Net N_566_i: 2 loads, 0 LSLICEs
|
||
|
|
Net wb_rst: 1 loads, 0 LSLICEs
|
||
|
|
Net S_RNII9DO1[1]: 1 loads, 1 LSLICEs
|
||
|
|
Number of nets driven by tri-state buffers: 0
|
||
|
|
Top 10 highest fanout non-clock nets:
|
||
|
|
Net S[2]: 48 loads
|
||
|
|
Net S[3]: 48 loads
|
||
|
|
Net S[0]: 30 loads
|
||
|
|
Net FS[12]: 22 loads
|
||
|
|
Net FS[9]: 21 loads
|
||
|
|
Net S[1]: 21 loads
|
||
|
|
Net FS[10]: 20 loads
|
||
|
|
Net FS[11]: 19 loads
|
||
|
|
Net RWSel: 19 loads
|
||
|
|
Net FS[13]: 17 loads
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
Number of warnings: 1
|
||
|
|
Number of errors: 0
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_dwe"></A><B><U><big>Design Errors/Warnings</big></U></B>
|
||
|
|
|
||
|
|
WARNING - map: UFM was enabled in EFB: Enabling the configuration interface will
|
||
|
|
temporarily disable certain features of the device including Power
|
||
|
|
Controller, GSR, Hardened User SPI Port, Hardened Primary User I2C Port.
|
||
|
|
Functionality is restored after the Flash Memory (UFM/Configuration)
|
||
|
|
Interface is disabled using Disable Configuration Interface command 0x26
|
||
|
|
followed by Bypass command 0xFF.
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_ioa"></A><B><U><big>IO (PIO) Attributes</big></U></B>
|
||
|
|
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| IO Name | Direction | Levelmode | IO |
|
||
|
|
| | | IO_TYPE | Register |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[0] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
|
||
|
|
| LED | OUTPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| C14M | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| DQMH | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| DQML | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[7] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[6] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[5] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[4] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[3] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[2] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RD[1] | BIDIR | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[11] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[10] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[9] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[8] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[7] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[6] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[5] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[4] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[3] | OUTPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[2] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[1] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| RA[0] | OUTPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| BA[1] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| BA[0] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nRWE | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nCAS | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nRAS | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
|
||
|
|
| nCS | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| CKE | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nVOE | OUTPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[7] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[6] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[5] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[4] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[3] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[2] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[1] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Vout[0] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nDOE | OUTPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[7] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[6] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[5] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[4] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[3] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[2] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[1] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Dout[0] | OUTPUT | LVCMOS33 | OUT |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[7] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[6] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[5] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[4] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[3] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[2] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[1] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Din[0] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
|
||
|
|
| Ain[7] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Ain[6] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Ain[5] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Ain[4] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Ain[3] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Ain[2] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Ain[1] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| Ain[0] | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nC07X | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nEN80 | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nWE80 | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| nWE | INPUT | LVCMOS33 | |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
| PHI1 | INPUT | LVCMOS33 | IN |
|
||
|
|
+---------------------+-----------+-----------+------------+
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_rm"></A><B><U><big>Removed logic</big></U></B>
|
||
|
|
|
||
|
|
Block GSR_INST undriven or does not drive anything - clipped.
|
||
|
|
Signal Dout_0_.CN was merged into signal C14M_c
|
||
|
|
Signal GND undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/VCC undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/GND undriven or does not drive anything - clipped.
|
||
|
|
Signal FS_s_0_S1[15] undriven or does not drive anything - clipped.
|
||
|
|
Signal FS_s_0_COUT[15] undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/CFGSTDBY undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/CFGWAKE undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/wbc_ufm_irq undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/TCOC undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/TCINT undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIIRQO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPICSNEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN7 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN6 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN5 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN4 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN3 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN2 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN1 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMCSN0 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMOSIEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMOSIO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMISOEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPIMISOO undriven or does not drive anything - clipped.
|
||
|
|
|
||
|
|
Signal ufmefb/SPISCKEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/SPISCKO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C2IRQO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C1IRQO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C2SDAOEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C2SDAO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C2SCLOEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C2SCLO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C1SDAOEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C1SDAO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C1SCLOEN undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/I2C1SCLO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO0 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO1 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO2 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO3 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO4 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO5 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO6 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLDATO7 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLADRO0 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLADRO1 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLADRO2 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLADRO3 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLADRO4 undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLWEO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLL1STBO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLL0STBO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLRSTO undriven or does not drive anything - clipped.
|
||
|
|
Signal ufmefb/PLLCLKO undriven or does not drive anything - clipped.
|
||
|
|
Signal FS_cry_0_S0[0] undriven or does not drive anything - clipped.
|
||
|
|
Signal N_1 undriven or does not drive anything - clipped.
|
||
|
|
Block Vout_0_.CN was optimized away.
|
||
|
|
Block GND was optimized away.
|
||
|
|
Block ufmefb/VCC was optimized away.
|
||
|
|
Block ufmefb/GND was optimized away.
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_efb"></A><B><U><big>Embedded Functional Block Connection Summary</big></U></B>
|
||
|
|
|
||
|
|
Desired WISHBONE clock frequency: 14.4 MHz
|
||
|
|
Clock source: C14M_c
|
||
|
|
Reset source: wb_rst
|
||
|
|
Functions mode:
|
||
|
|
I2C #1 (Primary) Function: DISABLED
|
||
|
|
I2C #2 (Secondary) Function: DISABLED
|
||
|
|
SPI Function: DISABLED
|
||
|
|
Timer/Counter Function: DISABLED
|
||
|
|
Timer/Counter Mode: WB
|
||
|
|
UFM Connection: ENABLED
|
||
|
|
PLL0 Connection: DISABLED
|
||
|
|
PLL1 Connection: DISABLED
|
||
|
|
I2C Function Summary:
|
||
|
|
--------------------
|
||
|
|
|
||
|
|
None
|
||
|
|
SPI Function Summary:
|
||
|
|
--------------------
|
||
|
|
None
|
||
|
|
Timer/Counter Function Summary:
|
||
|
|
------------------------------
|
||
|
|
None
|
||
|
|
UFM Function Summary:
|
||
|
|
--------------------
|
||
|
|
UFM Utilization: General Purpose Flash Memory
|
||
|
|
Initialized UFM Pages: 321 Pages (321*128 Bits)
|
||
|
|
Available General
|
||
|
|
Purpose Flash Memory: 511 Pages (511*128 Bits)
|
||
|
|
|
||
|
|
EBR Blocks with Unique
|
||
|
|
Initialization Data: 0
|
||
|
|
|
||
|
|
WID EBR Instance
|
||
|
|
--- ------------
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_asic"></A><B><U><big>ASIC Components</big></U></B>
|
||
|
|
---------------
|
||
|
|
|
||
|
|
Instance Name: ufmefb/EFBInst_0
|
||
|
|
Type: EFB
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<A name="mrp_runtime"></A><B><U><big>Run Time and Memory Usage</big></U></B>
|
||
|
|
-------------------------
|
||
|
|
|
||
|
|
Total CPU Time: 1 secs
|
||
|
|
Total REAL Time: 0 secs
|
||
|
|
Peak Memory Usage: 63 MB
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
|
||
|
|
Copyright (c) 1995 AT&T Corp. All rights reserved.
|
||
|
|
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
|
||
|
|
Copyright (c) 2001 Agere Systems All rights reserved.
|
||
|
|
Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights
|
||
|
|
reserved.
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
<BR>
|
||
|
|
</PRE></FONT>
|
||
|
|
</BODY>
|
||
|
|
</HTML>
|