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RAM2E/CPLD/LCMXO2-1200HC/impl1/RAM2E_LCMXO2_1200HC_impl1_iotiming.html
Zane Kaminski 1bbca43cfd RC
2023-12-28 23:24:48 -05:00

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<HEAD><TITLE>I/O Timing Report</TITLE>
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<PRE><A name="Top"></A><B><U><big>I/O Timing Report</big></U></B>
Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
Design name: RAM2E
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-1200HC
Package: TQFP100
Performance: 5
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
Design name: RAM2E
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-1200HC
Package: TQFP100
Performance: 6
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
Design name: RAM2E
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-1200HC
Package: TQFP100
Performance: M
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
// Design: RAM2E
// Package: TQFP100
// ncd File: ram2e_lcmxo2_1200hc_impl1.ncd
// Version: Diamond (64-bit) 3.12.1.454
// Written on Thu Dec 28 23:23:48 2023
// M: Minimum Performance Grade
// iotiming RAM2E_LCMXO2_1200HC_impl1.ncd RAM2E_LCMXO2_1200HC_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2E/CPLD/LCMXO2-1200HC/promote.xml
I/O Timing Report (All units are in ns)
Worst Case Results across Performance Grades (M, 6, 5, 4):
// Input Setup and Hold Times
Port Clock Edge Setup Performance_Grade Hold Performance_Grade
----------------------------------------------------------------------
Ain[0] C14M R 0.163 4 1.694 4
Ain[1] C14M R -0.150 M 2.217 4
Ain[2] C14M R -0.080 M 2.156 4
Ain[3] C14M R 0.466 4 1.338 4
Ain[4] C14M R 0.215 4 1.597 4
Ain[5] C14M R -0.331 M 2.651 4
Ain[6] C14M R 0.065 M 1.882 4
Ain[7] C14M R 0.284 4 1.683 4
Din[0] C14M R 6.887 4 2.257 4
Din[1] C14M R 8.753 4 2.907 4
Din[2] C14M R 6.379 4 2.740 4
Din[3] C14M R 7.129 4 1.402 4
Din[4] C14M R 6.869 4 2.791 4
Din[5] C14M R 6.514 4 2.334 4
Din[6] C14M R 6.735 4 1.914 4
Din[7] C14M R 8.094 4 1.968 4
PHI1 C14M R 1.557 4 4.842 4
RD[0] C14M R -0.266 M 2.342 4
RD[1] C14M R -0.248 M 2.283 4
RD[2] C14M R -0.407 M 2.610 4
RD[3] C14M R -0.243 M 2.193 4
RD[4] C14M R -0.246 M 2.201 4
RD[5] C14M R -0.243 M 2.193 4
RD[6] C14M R -0.087 M 1.756 4
RD[7] C14M R -0.092 M 1.769 4
nC07X C14M R -0.320 M 2.703 4
nEN80 C14M R 4.607 4 1.925 4
nWE C14M R 4.609 4 2.010 4
// Clock to Output Delay
Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
------------------------------------------------------------------------
BA[0] C14M R 10.424 4 3.355 M
BA[1] C14M R 10.424 4 3.355 M
CKEout C14M F 10.424 4 3.355 M
DQMH C14M R 10.404 4 3.362 M
DQML C14M R 10.404 4 3.362 M
LED C14M R 22.936 4 8.890 M
RAout[0] C14M F 10.490 4 3.360 M
RAout[10] C14M F 10.490 4 3.360 M
RAout[11] C14M F 10.424 4 3.355 M
RAout[1] C14M F 10.490 4 3.360 M
RAout[2] C14M F 10.490 4 3.360 M
RAout[3] C14M F 10.490 4 3.360 M
RAout[4] C14M F 10.490 4 3.360 M
RAout[5] C14M F 10.490 4 3.360 M
RAout[6] C14M F 10.490 4 3.360 M
RAout[7] C14M F 10.490 4 3.360 M
RAout[8] C14M F 10.490 4 3.360 M
RAout[9] C14M F 10.490 4 3.360 M
RD[0] C14M R 13.733 4 3.707 M
RD[1] C14M R 13.745 4 3.707 M
RD[2] C14M R 14.285 4 3.790 M
RD[3] C14M R 13.348 4 3.790 M
RD[4] C14M R 14.450 4 3.952 M
RD[5] C14M R 14.480 4 3.952 M
RD[6] C14M R 14.784 4 3.952 M
RD[7] C14M R 14.247 4 3.952 M
Vout[0] C14M R 11.348 4 3.872 M
Vout[1] C14M R 11.434 4 3.871 M
Vout[2] C14M R 11.348 4 3.872 M
Vout[3] C14M R 11.434 4 3.871 M
Vout[4] C14M R 11.348 4 3.872 M
Vout[5] C14M R 11.348 4 3.872 M
Vout[6] C14M R 11.434 4 3.871 M
Vout[7] C14M R 11.434 4 3.871 M
nCASout C14M F 10.424 4 3.355 M
nDOE C14M R 13.929 4 4.309 M
nRASout C14M F 10.424 4 3.355 M
nRWEout C14M F 10.424 4 3.355 M
nVOE C14M R 13.926 4 4.281 M
WARNING: you must also run trce with hold speed: 4
WARNING: you must also run trce with setup speed: M
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