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https://github.com/garrettsworkshop/RAM2E.git
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119 lines
5.7 KiB
Plaintext
119 lines
5.7 KiB
Plaintext
Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
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Design name: RAM2E
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-1200HC
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Package: TQFP100
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Performance: 5
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Package Status: Final Version 1.44.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
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Design name: RAM2E
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-1200HC
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Package: TQFP100
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Performance: 6
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Package Status: Final Version 1.44.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
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Design name: RAM2E
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-1200HC
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Package: TQFP100
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Performance: M
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Package Status: Final Version 1.44.
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Performance Hardware Data Status: Final Version 34.4.
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// Design: RAM2E
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// Package: TQFP100
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// ncd File: ram2e_lcmxo2_1200hc_impl1.ncd
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// Version: Diamond (64-bit) 3.12.1.454
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// Written on Thu Dec 28 23:23:48 2023
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// M: Minimum Performance Grade
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// iotiming RAM2E_LCMXO2_1200HC_impl1.ncd RAM2E_LCMXO2_1200HC_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2E/CPLD/LCMXO2-1200HC/promote.xml
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I/O Timing Report (All units are in ns)
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Worst Case Results across Performance Grades (M, 6, 5, 4):
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// Input Setup and Hold Times
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Port Clock Edge Setup Performance_Grade Hold Performance_Grade
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----------------------------------------------------------------------
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Ain[0] C14M R 0.163 4 1.694 4
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Ain[1] C14M R -0.150 M 2.217 4
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Ain[2] C14M R -0.080 M 2.156 4
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Ain[3] C14M R 0.466 4 1.338 4
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Ain[4] C14M R 0.215 4 1.597 4
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Ain[5] C14M R -0.331 M 2.651 4
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Ain[6] C14M R 0.065 M 1.882 4
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Ain[7] C14M R 0.284 4 1.683 4
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Din[0] C14M R 6.887 4 2.257 4
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Din[1] C14M R 8.753 4 2.907 4
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Din[2] C14M R 6.379 4 2.740 4
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Din[3] C14M R 7.129 4 1.402 4
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Din[4] C14M R 6.869 4 2.791 4
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Din[5] C14M R 6.514 4 2.334 4
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Din[6] C14M R 6.735 4 1.914 4
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Din[7] C14M R 8.094 4 1.968 4
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PHI1 C14M R 1.557 4 4.842 4
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RD[0] C14M R -0.266 M 2.342 4
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RD[1] C14M R -0.248 M 2.283 4
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RD[2] C14M R -0.407 M 2.610 4
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RD[3] C14M R -0.243 M 2.193 4
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RD[4] C14M R -0.246 M 2.201 4
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RD[5] C14M R -0.243 M 2.193 4
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RD[6] C14M R -0.087 M 1.756 4
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RD[7] C14M R -0.092 M 1.769 4
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nC07X C14M R -0.320 M 2.703 4
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nEN80 C14M R 4.607 4 1.925 4
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nWE C14M R 4.609 4 2.010 4
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// Clock to Output Delay
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Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
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------------------------------------------------------------------------
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BA[0] C14M R 10.424 4 3.355 M
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BA[1] C14M R 10.424 4 3.355 M
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CKEout C14M F 10.424 4 3.355 M
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DQMH C14M R 10.404 4 3.362 M
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DQML C14M R 10.404 4 3.362 M
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LED C14M R 22.936 4 8.890 M
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RAout[0] C14M F 10.490 4 3.360 M
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RAout[10] C14M F 10.490 4 3.360 M
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RAout[11] C14M F 10.424 4 3.355 M
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RAout[1] C14M F 10.490 4 3.360 M
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RAout[2] C14M F 10.490 4 3.360 M
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RAout[3] C14M F 10.490 4 3.360 M
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RAout[4] C14M F 10.490 4 3.360 M
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RAout[5] C14M F 10.490 4 3.360 M
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RAout[6] C14M F 10.490 4 3.360 M
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RAout[7] C14M F 10.490 4 3.360 M
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RAout[8] C14M F 10.490 4 3.360 M
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RAout[9] C14M F 10.490 4 3.360 M
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RD[0] C14M R 13.733 4 3.707 M
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RD[1] C14M R 13.745 4 3.707 M
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RD[2] C14M R 14.285 4 3.790 M
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RD[3] C14M R 13.348 4 3.790 M
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RD[4] C14M R 14.450 4 3.952 M
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RD[5] C14M R 14.480 4 3.952 M
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RD[6] C14M R 14.784 4 3.952 M
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RD[7] C14M R 14.247 4 3.952 M
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Vout[0] C14M R 11.348 4 3.872 M
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Vout[1] C14M R 11.434 4 3.871 M
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Vout[2] C14M R 11.348 4 3.872 M
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Vout[3] C14M R 11.434 4 3.871 M
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Vout[4] C14M R 11.348 4 3.872 M
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Vout[5] C14M R 11.348 4 3.872 M
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Vout[6] C14M R 11.434 4 3.871 M
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Vout[7] C14M R 11.434 4 3.871 M
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nCASout C14M F 10.424 4 3.355 M
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nDOE C14M R 13.929 4 4.309 M
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nRASout C14M F 10.424 4 3.355 M
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nRWEout C14M F 10.424 4 3.355 M
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nVOE C14M R 13.926 4 4.281 M
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WARNING: you must also run trce with hold speed: 4
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WARNING: you must also run trce with setup speed: M
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