mirror of
https://github.com/garrettsworkshop/RAM2E.git
synced 2024-11-25 06:31:29 +00:00
127 lines
4.8 KiB
Plaintext
127 lines
4.8 KiB
Plaintext
SCHEMATIC START ;
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# map: version Diamond (64-bit) 3.12.1.454 -- WARNING: Map write only section -- Thu Dec 28 23:23:28 2023
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SYSCONFIG SDM_PORT=DISABLE SLAVE_SPI_PORT=DISABLE I2C_PORT=DISABLE MASTER_SPI_PORT=DISABLE COMPRESS_CONFIG=ON CONFIGURATION=CFG MY_ASSP=OFF ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF MCCLK_FREQ=2.08 JTAG_PORT=ENABLE ENABLE_TRANSFR=DISABLE SHAREDEBRINIT=DISABLE MUX_CONFIGURATION_PORTS=DISABLE BACKGROUND_RECONFIG=OFF INBUF=ON ;
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LOCATE COMP "RD[0]" SITE "36" ;
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LOCATE COMP "LED" SITE "35" ;
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LOCATE COMP "C14M" SITE "62" ;
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LOCATE COMP "RD[7]" SITE "43" ;
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LOCATE COMP "RD[6]" SITE "42" ;
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LOCATE COMP "RD[5]" SITE "41" ;
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LOCATE COMP "RD[4]" SITE "40" ;
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LOCATE COMP "RD[3]" SITE "39" ;
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LOCATE COMP "RD[2]" SITE "38" ;
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LOCATE COMP "RD[1]" SITE "37" ;
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LOCATE COMP "DQMH" SITE "49" ;
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LOCATE COMP "DQML" SITE "48" ;
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LOCATE COMP "RAout[11]" SITE "59" ;
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LOCATE COMP "RAout[10]" SITE "64" ;
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LOCATE COMP "RAout[9]" SITE "63" ;
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LOCATE COMP "RAout[8]" SITE "65" ;
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LOCATE COMP "RAout[7]" SITE "67" ;
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LOCATE COMP "RAout[6]" SITE "69" ;
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LOCATE COMP "RAout[5]" SITE "71" ;
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LOCATE COMP "RAout[4]" SITE "75" ;
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LOCATE COMP "RAout[3]" SITE "74" ;
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LOCATE COMP "RAout[2]" SITE "70" ;
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LOCATE COMP "RAout[1]" SITE "68" ;
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LOCATE COMP "RAout[0]" SITE "66" ;
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LOCATE COMP "BA[1]" SITE "60" ;
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LOCATE COMP "BA[0]" SITE "58" ;
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LOCATE COMP "nRWEout" SITE "51" ;
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LOCATE COMP "nCASout" SITE "52" ;
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LOCATE COMP "nRASout" SITE "54" ;
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LOCATE COMP "nCSout" SITE "57" ;
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LOCATE COMP "CKEout" SITE "53" ;
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LOCATE COMP "nVOE" SITE "10" ;
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LOCATE COMP "Vout[7]" SITE "12" ;
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LOCATE COMP "Vout[6]" SITE "14" ;
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LOCATE COMP "Vout[5]" SITE "16" ;
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LOCATE COMP "Vout[4]" SITE "19" ;
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LOCATE COMP "Vout[3]" SITE "13" ;
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LOCATE COMP "Vout[2]" SITE "17" ;
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LOCATE COMP "Vout[1]" SITE "15" ;
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LOCATE COMP "Vout[0]" SITE "18" ;
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LOCATE COMP "nDOE" SITE "20" ;
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LOCATE COMP "Dout[7]" SITE "32" ;
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LOCATE COMP "Dout[6]" SITE "31" ;
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LOCATE COMP "Dout[5]" SITE "21" ;
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LOCATE COMP "Dout[4]" SITE "24" ;
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LOCATE COMP "Dout[3]" SITE "28" ;
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LOCATE COMP "Dout[2]" SITE "25" ;
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LOCATE COMP "Dout[1]" SITE "27" ;
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LOCATE COMP "Dout[0]" SITE "30" ;
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LOCATE COMP "Din[7]" SITE "87" ;
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LOCATE COMP "Din[6]" SITE "88" ;
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LOCATE COMP "Din[5]" SITE "99" ;
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LOCATE COMP "Din[4]" SITE "1" ;
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LOCATE COMP "Din[3]" SITE "9" ;
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LOCATE COMP "Din[2]" SITE "98" ;
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LOCATE COMP "Din[1]" SITE "97" ;
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LOCATE COMP "Din[0]" SITE "96" ;
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LOCATE COMP "Ain[7]" SITE "8" ;
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LOCATE COMP "Ain[6]" SITE "86" ;
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LOCATE COMP "Ain[5]" SITE "84" ;
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LOCATE COMP "Ain[4]" SITE "78" ;
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LOCATE COMP "Ain[3]" SITE "4" ;
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LOCATE COMP "Ain[2]" SITE "7" ;
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LOCATE COMP "Ain[1]" SITE "2" ;
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LOCATE COMP "Ain[0]" SITE "3" ;
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LOCATE COMP "nC07X" SITE "34" ;
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LOCATE COMP "nEN80" SITE "82" ;
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LOCATE COMP "nWE" SITE "29" ;
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LOCATE COMP "PHI1" SITE "85" ;
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FREQUENCY PORT "C14M" 14.300000 MHz ;
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SCHEMATIC END ;
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BLOCK RESETPATHS ;
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BLOCK ASYNCPATHS ;
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OUTPUT PORT "LED" LOAD 100.000000 pF ;
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OUTPUT PORT "BA[1]" LOAD 5.000000 pF ;
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OUTPUT PORT "BA[0]" LOAD 5.000000 pF ;
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OUTPUT PORT "CKEout" LOAD 5.000000 pF ;
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OUTPUT PORT "DQMH" LOAD 5.000000 pF ;
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OUTPUT PORT "DQML" LOAD 5.000000 pF ;
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OUTPUT PORT "Dout[0]" LOAD 15.000000 pF ;
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OUTPUT PORT "Dout[1]" LOAD 15.000000 pF ;
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OUTPUT PORT "Dout[2]" LOAD 15.000000 pF ;
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OUTPUT PORT "Dout[3]" LOAD 15.000000 pF ;
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OUTPUT PORT "Dout[4]" LOAD 15.000000 pF ;
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OUTPUT PORT "Dout[5]" LOAD 15.000000 pF ;
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OUTPUT PORT "Dout[6]" LOAD 15.000000 pF ;
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OUTPUT PORT "Dout[7]" LOAD 15.000000 pF ;
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OUTPUT PORT "RAout[0]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[1]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[2]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[3]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[4]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[5]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[6]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[7]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[8]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[9]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[10]" LOAD 5.000000 pF ;
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OUTPUT PORT "RAout[11]" LOAD 5.000000 pF ;
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OUTPUT PORT "Vout[0]" LOAD 15.000000 pF ;
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OUTPUT PORT "Vout[1]" LOAD 15.000000 pF ;
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OUTPUT PORT "Vout[2]" LOAD 15.000000 pF ;
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OUTPUT PORT "Vout[3]" LOAD 15.000000 pF ;
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OUTPUT PORT "Vout[4]" LOAD 15.000000 pF ;
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OUTPUT PORT "Vout[5]" LOAD 15.000000 pF ;
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OUTPUT PORT "Vout[6]" LOAD 15.000000 pF ;
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OUTPUT PORT "Vout[7]" LOAD 15.000000 pF ;
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OUTPUT PORT "nCASout" LOAD 5.000000 pF ;
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OUTPUT PORT "nCSout" LOAD 5.000000 pF ;
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OUTPUT PORT "nDOE" LOAD 10.000000 pF ;
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OUTPUT PORT "nRASout" LOAD 5.000000 pF ;
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OUTPUT PORT "nRWEout" LOAD 5.000000 pF ;
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OUTPUT PORT "nVOE" LOAD 10.000000 pF ;
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OUTPUT PORT "RD[0]" LOAD 9.000000 pF ;
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OUTPUT PORT "RD[1]" LOAD 9.000000 pF ;
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OUTPUT PORT "RD[2]" LOAD 9.000000 pF ;
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OUTPUT PORT "RD[3]" LOAD 9.000000 pF ;
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OUTPUT PORT "RD[4]" LOAD 9.000000 pF ;
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OUTPUT PORT "RD[5]" LOAD 9.000000 pF ;
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OUTPUT PORT "RD[6]" LOAD 9.000000 pF ;
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OUTPUT PORT "RD[7]" LOAD 9.000000 pF ;
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COMMERCIAL ;
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