mirror of
https://github.com/garrettsworkshop/RAM2E.git
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8eb7ead8ee
Gated RAM access during PHI0, squeezed video access and MPU access together, gated data bus output buffer OE to only output at end of PHI0
9 lines
216 B
Plaintext
Executable File
9 lines
216 B
Plaintext
Executable File
<sld_project_info>
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<project>
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<hash md5_digest_80b="652565839ecfc53317c4"/>
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</project>
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<file_info>
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<file device="5M240ZT100C5" path="RAM2E.sof" usercode="0xFFFFFFFF"/>
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</file_info>
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</sld_project_info>
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