RAM2GS/CPLD/MAXV/output_files/RAM2GS.map.summary

Analysis & Synthesis Status : Successful - Sun Aug 13 04:49:59 2023
Quartus Prime Version : 19.1.0 Build 670 09/22/2019 SJ Lite Edition
Revision Name : RAM2GS
Top-level Entity Name : RAM2GS
Family : MAX V
Total logic elements : 184
Total pins : 63
Total virtual pins : 0
UFM blocks : 1 / 1 ( 100 % )
Led done? 2023-08-13 05:16:51 -04:00			`Analysis & Synthesis Status : Successful - Sun Aug 13 04:49:59 2023`
import 2023-08-12 18:41:26 -04:00			`Quartus Prime Version : 19.1.0 Build 670 09/22/2019 SJ Lite Edition`
			`Revision Name : RAM2GS`
			`Top-level Entity Name : RAM2GS`
			`Family : MAX V`
LED stuff 2023-08-13 04:35:35 -04:00			`Total logic elements : 184`
so far so good 2023-08-12 23:53:25 -04:00			`Total pins : 63`
			`Total virtual pins : 0`
			`UFM blocks : 1 / 1 ( 100 % )`