2023-08-20 11:10:11 +00:00
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[Device]
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Family=machxo2
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PartType=LCMXO2-640HC
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PartName=LCMXO2-640HC-4TG100C
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SpeedGrade=4
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Package=TQFP100
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OperatingCondition=COM
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Status=S
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[IP]
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VendorName=Lattice Semiconductor Corporation
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CoreType=LPM
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CoreStatus=Demo
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CoreName=EFB
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CoreRevision=1.2
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ModuleName=REFB
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SourceFormat=Verilog HDL
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ParameterFileVersion=1.0
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Date=08/19/2023
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Time=07:25:04
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[Parameters]
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Verilog=1
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VHDL=0
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EDIF=1
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Destination=Synplicity
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Expression=BusA(0 to 7)
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Order=Big Endian [MSB:LSB]
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IO=0
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freq=
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i2c1=0
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i2c1config=0
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i2c1_addr=7-Bit Addressing
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i2c1_ce=0
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i2c1_freq=100
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i2c1_sa=10000
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i2c1_we=0
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i2c2=0
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i2c2_addr=7-Bit Addressing
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i2c2_ce=0
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i2c2_freq=100
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i2c2_sa=10000
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i2c2_we=0
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ufm_addr=7-Bit Addressing
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ufm_sa=10000
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pll=0
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pll_cnt=1
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spi=0
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spi_clkinv=0
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spi_cs=1
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spi_en=0
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spi_freq=1
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spi_lsb=0
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spi_mode=Slave
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spi_ib=0
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spi_ph=0
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spi_hs=0
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spi_rxo=0
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spi_rxr=0
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spi_txo=0
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spi_txr=0
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spi_we=0
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static_tc=Static
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tc=0
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tc_clkinv=Positive
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tc_ctr=1
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tc_div=1
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tc_ipcap=0
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tc_mode=CTCM
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tc_ocr=32767
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tc_oflow=1
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tc_o=TOGGLE
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tc_opcomp=0
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tc_osc=0
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tc_sa_oflow=0
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tc_top=65535
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ufm=1
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ufm0=0
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ufm1=0
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ufm2=0
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ufm3=0
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ufm_cfg0=0
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ufm_cfg1=0
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wb_clk_freq=66.7
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ufm_usage=SHARED_EBR_TAG
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ufm_ebr=190
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ufm_remain=
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mem_size=1
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ufm_start=
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ufm_init=mem
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memfile=../RAM2GS-LCMXO2.mem
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ufm_dt=hex
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ufm0_ebr=
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mem_size0=1
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ufm0_init=0
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memfile0=
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ufm0_dt=hex
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ufm1_ebr=
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mem_size1=1
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ufm1_init=0
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memfile1=
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ufm1_dt=hex
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ufm2_ebr=
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mem_size2=1
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ufm2_init=0
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memfile2=
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ufm2_dt=hex
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ufm3_ebr=
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mem_size3=1
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ufm3_init=0
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memfile3=
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ufm3_dt=hex
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ufm_cfg0_ebr=
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mem_size_cfg0=1
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ufm_cfg0_init=0
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memfile_cfg0=
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ufm_cfg0_dt=hex
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ufm_cfg1_ebr=
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mem_size_cfg1=1
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ufm_cfg1_init=0
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memfile_cfg1=
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ufm_cfg1_dt=hex
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wb=1
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boot_option=Internal
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efb_ufm=0
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boot_option_internal=Single Boot
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internal_ufm0=0
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internal_ufm1=0
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efb_ufm_boot=
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tamperdr=0
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t_pwd=0
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t_lockflash=0
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t_manmode=0
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t_jtagport=0
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t_sspiport=0
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t_sic2port=0
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t_wbport=0
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t_portlock=0
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[Command]
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cmd_line= -w -n REFB -lang verilog -synth synplify -bus_exp 7 -bb -type efb -arch xo2c00 -freq 66.7 -ufm -ufm_ebr 190 -mem_size 1 -memfile ../RAM2GS-LCMXO2.mem -memformat hex -wb -dev 640
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