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CPLD/MAXII/RAM4GS.mif
Executable file
27
CPLD/MAXII/RAM4GS.mif
Executable file
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-- Copyright (C) 1991-2013 Altera Corporation
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-- Your use of Altera Corporation's design tools, logic functions
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-- and other software and tools, and its AMPP partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Altera Program License
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-- Subscription Agreement, Altera MegaCore Function License
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-- Agreement, or other applicable license agreement, including,
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-- without limitation, that your use is for the sole purpose of
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-- programming logic devices manufactured by Altera and sold by
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-- Altera or its authorized distributors. Please refer to the
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-- applicable agreement for further details.
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-- Quartus II generated Memory Initialization File (.mif)
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WIDTH=16;
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DEPTH=512;
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ADDRESS_RADIX=HEX;
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DATA_RADIX=HEX;
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CONTENT BEGIN
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[000..0FD] : 0000;
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0FE : 7FFF;
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[0FF..1FF] : FFFF;
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END;
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3
CPLD/MAXII/UFM.qip
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3
CPLD/MAXII/UFM.qip
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set_global_assignment -name IP_TOOL_NAME "ALTUFM_NONE"
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set_global_assignment -name IP_TOOL_VERSION "13.0"
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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "UFM.v"]
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268
CPLD/MAXII/UFM.v
Executable file
268
CPLD/MAXII/UFM.v
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// megafunction wizard: %ALTUFM_NONE%
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// GENERATION: STANDARD
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// VERSION: WM1.0
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// MODULE: ALTUFM_NONE
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// ============================================================
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// File Name: UFM.v
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// Megafunction Name(s):
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// ALTUFM_NONE
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//
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// Simulation Library Files(s):
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// maxii
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// ============================================================
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// ************************************************************
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// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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//
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// 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition
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// ************************************************************
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//Copyright (C) 1991-2013 Altera Corporation
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//Your use of Altera Corporation's design tools, logic functions
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//and other software and tools, and its AMPP partner logic
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//functions, and any output files from any of the foregoing
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//(including device programming or simulation files), and any
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//associated documentation or information are expressly subject
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//to the terms and conditions of the Altera Program License
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//Subscription Agreement, Altera MegaCore Function License
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//Agreement, or other applicable license agreement, including,
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//without limitation, that your use is for the sole purpose of
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//programming logic devices manufactured by Altera and sold by
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//Altera or its authorized distributors. Please refer to the
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//applicable agreement for further details.
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//altufm_none CBX_AUTO_BLACKBOX="ALL" DEVICE_FAMILY="MAX II" ERASE_TIME=500000000 LPM_FILE="RAM4GS.mif" OSC_FREQUENCY=180000 PORT_ARCLKENA="PORT_UNUSED" PORT_DRCLKENA="PORT_UNUSED" PROGRAM_TIME=1600000 WIDTH_UFM_ADDRESS=9 arclk ardin arshft busy drclk drdin drdout drshft erase osc oscena program rtpbusy
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//VERSION_BEGIN 13.0 cbx_a_gray2bin 2013:06:12:18:03:39:SJ cbx_a_graycounter 2013:06:12:18:03:39:SJ cbx_altufm_none 2013:06:12:18:03:40:SJ cbx_cycloneii 2013:06:12:18:03:40:SJ cbx_lpm_add_sub 2013:06:12:18:03:40:SJ cbx_lpm_compare 2013:06:12:18:03:40:SJ cbx_lpm_counter 2013:06:12:18:03:40:SJ cbx_lpm_decode 2013:06:12:18:03:40:SJ cbx_lpm_mux 2013:06:12:18:03:40:SJ cbx_maxii 2013:06:12:18:03:40:SJ cbx_mgl 2013:06:12:18:04:42:SJ cbx_stratix 2013:06:12:18:03:40:SJ cbx_stratixii 2013:06:12:18:03:40:SJ cbx_util_mgl 2013:06:12:18:03:40:SJ VERSION_END
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// synthesis VERILOG_INPUT_VERSION VERILOG_2001
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// altera message_off 10463
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//synthesis_resources = maxii_ufm 1
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//synopsys translate_off
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`timescale 1 ps / 1 ps
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//synopsys translate_on
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module UFM_altufm_none_1br
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(
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arclk,
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ardin,
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arshft,
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busy,
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drclk,
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drdin,
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drdout,
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drshft,
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erase,
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osc,
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oscena,
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program,
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rtpbusy) ;
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input arclk;
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input ardin;
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input arshft;
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output busy;
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input drclk;
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input drdin;
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output drdout;
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input drshft;
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input erase;
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output osc;
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input oscena;
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input program;
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output rtpbusy;
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wire wire_maxii_ufm_block1_bgpbusy;
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wire wire_maxii_ufm_block1_busy;
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wire wire_maxii_ufm_block1_drdout;
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wire wire_maxii_ufm_block1_osc;
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wire ufm_arclk;
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wire ufm_ardin;
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wire ufm_arshft;
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wire ufm_bgpbusy;
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wire ufm_busy;
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wire ufm_drclk;
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wire ufm_drdin;
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wire ufm_drdout;
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wire ufm_drshft;
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wire ufm_erase;
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wire ufm_osc;
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wire ufm_oscena;
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wire ufm_program;
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maxii_ufm maxii_ufm_block1
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(
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.arclk(ufm_arclk),
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.ardin(ufm_ardin),
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.arshft(ufm_arshft),
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.bgpbusy(wire_maxii_ufm_block1_bgpbusy),
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.busy(wire_maxii_ufm_block1_busy),
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.drclk(ufm_drclk),
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.drdin(ufm_drdin),
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.drdout(wire_maxii_ufm_block1_drdout),
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.drshft(ufm_drshft),
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.erase(ufm_erase),
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.osc(wire_maxii_ufm_block1_osc),
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.oscena(ufm_oscena),
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.program(ufm_program)
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// synopsys translate_off
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,
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.ctrl_bgpbusy(1'b0),
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.devclrn(1'b1),
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.devpor(1'b1),
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.sbdin(1'b0),
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.sbdout()
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// synopsys translate_on
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);
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defparam
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maxii_ufm_block1.address_width = 9,
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maxii_ufm_block1.erase_time = 500000000,
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maxii_ufm_block1.init_file = "RAM4GS.mif",
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maxii_ufm_block1.mem1 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem10 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem11 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem12 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem13 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem14 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem15 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem16 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem2 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem3 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem4 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem5 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem6 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem7 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem8 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.mem9 = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000,
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maxii_ufm_block1.osc_sim_setting = 180000,
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maxii_ufm_block1.program_time = 1600000,
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maxii_ufm_block1.lpm_type = "maxii_ufm";
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assign
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busy = ufm_busy,
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drdout = ufm_drdout,
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osc = ufm_osc,
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rtpbusy = ufm_bgpbusy,
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ufm_arclk = arclk,
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ufm_ardin = ardin,
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ufm_arshft = arshft,
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ufm_bgpbusy = wire_maxii_ufm_block1_bgpbusy,
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ufm_busy = wire_maxii_ufm_block1_busy,
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ufm_drclk = drclk,
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ufm_drdin = drdin,
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ufm_drdout = wire_maxii_ufm_block1_drdout,
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ufm_drshft = drshft,
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ufm_erase = erase,
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ufm_osc = wire_maxii_ufm_block1_osc,
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ufm_oscena = oscena,
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ufm_program = program;
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endmodule //UFM_altufm_none_1br
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//VALID FILE
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// synopsys translate_off
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`timescale 1 ps / 1 ps
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// synopsys translate_on
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module UFM (
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arclk,
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ardin,
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arshft,
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drclk,
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drdin,
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drshft,
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erase,
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oscena,
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program,
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busy,
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drdout,
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osc,
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rtpbusy);
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input arclk;
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input ardin;
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input arshft;
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input drclk;
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input drdin;
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input drshft;
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input erase;
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input oscena;
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input program;
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output busy;
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output drdout;
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output osc;
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output rtpbusy;
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wire sub_wire0;
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wire sub_wire1;
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wire sub_wire2;
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wire sub_wire3;
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wire osc = sub_wire0;
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wire rtpbusy = sub_wire1;
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wire drdout = sub_wire2;
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wire busy = sub_wire3;
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UFM_altufm_none_1br UFM_altufm_none_1br_component (
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.arshft (arshft),
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.drclk (drclk),
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.erase (erase),
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.program (program),
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.arclk (arclk),
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.drdin (drdin),
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.oscena (oscena),
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.ardin (ardin),
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.drshft (drshft),
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.osc (sub_wire0),
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.rtpbusy (sub_wire1),
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.drdout (sub_wire2),
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.busy (sub_wire3));
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endmodule
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// ============================================================
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// CNX file retrieval info
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// ============================================================
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// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "MAX II"
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// Retrieval info: CONSTANT: ERASE_TIME NUMERIC "500000000"
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// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "MAX II"
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// Retrieval info: CONSTANT: LPM_FILE STRING "RAM4GS.mif"
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// Retrieval info: CONSTANT: LPM_HINT STRING "UNUSED"
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// Retrieval info: CONSTANT: LPM_TYPE STRING "altufm_none"
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// Retrieval info: CONSTANT: OSC_FREQUENCY NUMERIC "180000"
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// Retrieval info: CONSTANT: PORT_ARCLKENA STRING "PORT_UNUSED"
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// Retrieval info: CONSTANT: PORT_DRCLKENA STRING "PORT_UNUSED"
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// Retrieval info: CONSTANT: PROGRAM_TIME NUMERIC "1600000"
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// Retrieval info: CONSTANT: WIDTH_UFM_ADDRESS NUMERIC "9"
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// Retrieval info: USED_PORT: arclk 0 0 0 0 INPUT NODEFVAL "arclk"
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// Retrieval info: CONNECT: @arclk 0 0 0 0 arclk 0 0 0 0
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// Retrieval info: USED_PORT: ardin 0 0 0 0 INPUT NODEFVAL "ardin"
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// Retrieval info: CONNECT: @ardin 0 0 0 0 ardin 0 0 0 0
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// Retrieval info: USED_PORT: arshft 0 0 0 0 INPUT NODEFVAL "arshft"
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// Retrieval info: CONNECT: @arshft 0 0 0 0 arshft 0 0 0 0
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// Retrieval info: USED_PORT: busy 0 0 0 0 OUTPUT NODEFVAL "busy"
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// Retrieval info: CONNECT: busy 0 0 0 0 @busy 0 0 0 0
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// Retrieval info: USED_PORT: drclk 0 0 0 0 INPUT NODEFVAL "drclk"
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// Retrieval info: CONNECT: @drclk 0 0 0 0 drclk 0 0 0 0
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// Retrieval info: USED_PORT: drdin 0 0 0 0 INPUT NODEFVAL "drdin"
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// Retrieval info: CONNECT: @drdin 0 0 0 0 drdin 0 0 0 0
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// Retrieval info: USED_PORT: drdout 0 0 0 0 OUTPUT NODEFVAL "drdout"
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// Retrieval info: CONNECT: drdout 0 0 0 0 @drdout 0 0 0 0
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// Retrieval info: USED_PORT: drshft 0 0 0 0 INPUT NODEFVAL "drshft"
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// Retrieval info: CONNECT: @drshft 0 0 0 0 drshft 0 0 0 0
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// Retrieval info: USED_PORT: erase 0 0 0 0 INPUT NODEFVAL "erase"
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// Retrieval info: CONNECT: @erase 0 0 0 0 erase 0 0 0 0
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// Retrieval info: USED_PORT: osc 0 0 0 0 OUTPUT NODEFVAL "osc"
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// Retrieval info: CONNECT: osc 0 0 0 0 @osc 0 0 0 0
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// Retrieval info: USED_PORT: oscena 0 0 0 0 INPUT NODEFVAL "oscena"
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// Retrieval info: CONNECT: @oscena 0 0 0 0 oscena 0 0 0 0
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// Retrieval info: USED_PORT: program 0 0 0 0 INPUT NODEFVAL "program"
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// Retrieval info: CONNECT: @program 0 0 0 0 program 0 0 0 0
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// Retrieval info: USED_PORT: rtpbusy 0 0 0 0 OUTPUT NODEFVAL "rtpbusy"
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// Retrieval info: CONNECT: rtpbusy 0 0 0 0 @rtpbusy 0 0 0 0
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// Retrieval info: GEN_FILE: TYPE_NORMAL UFM.v TRUE FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL UFM.qip TRUE FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL UFM.bsf FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL UFM_inst.v FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL UFM_bb.v FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL UFM.inc FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL UFM.cmp FALSE TRUE
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// Retrieval info: LIB_FILE: maxii
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