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7 lines
216 B
Verilog
7 lines
216 B
Verilog
/* Verilog module instantiation template generated by SCUBA Diamond (64-bit) 3.11.3.469 */
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/* Module Version: 5.7 */
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/* Sun Jul 14 22:23:22 2024 */
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/* parameterized module instance */
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RPLL __ (.CLKI( ), .CLKOP( ));
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