mirror of
https://github.com/garrettsworkshop/RAM2GS.git
synced 2024-11-28 21:49:21 +00:00
59 lines
2.9 KiB
Plaintext
59 lines
2.9 KiB
Plaintext
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Report for cell RAM2GS.verilog
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Register bits: 106 of 1280 (8%)
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PIC Latch: 0
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I/O cells: 63
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Cell usage:
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cell count Res Usage(%)
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BB 8 100.0
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CCU2D 10 100.0
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EFB 1 100.0
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EHXPLLJ 1 100.0
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FD1P3AX 28 100.0
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FD1P3IX 3 100.0
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FD1S3AX 37 100.0
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FD1S3IX 3 100.0
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GSR 1 100.0
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IB 24 100.0
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IFS1P3DX 9 100.0
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IFS1P3IX 10 100.0
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IFS1P3JX 2 100.0
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INV 7 100.0
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OB 31 100.0
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ODDRXE 1 100.0
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OFS1P3BX 4 100.0
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OFS1P3DX 8 100.0
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OFS1P3IX 1 100.0
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OFS1P3JX 1 100.0
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ORCALUT4 186 100.0
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OSCH 1 100.0
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PFUMX 2 100.0
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PUR 1 100.0
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VHI 2 100.0
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VLO 3 100.0
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SUB MODULES
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REFB 1 100.0
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RPLL 1 100.0
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TOTAL 387
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Report for cell REFB.netlist
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Instance path: ufmefb
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Cell usage:
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cell count Res Usage(%)
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EFB 1 100.0
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VHI 1 50.0
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VLO 1 33.3
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TOTAL 3
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Report for cell RPLL.netlist
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Instance path: rpll
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Cell usage:
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cell count Res Usage(%)
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EHXPLLJ 1 100.0
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VLO 1 33.3
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TOTAL 2
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