201 lines
8.3 KiB
HTML
201 lines
8.3 KiB
HTML
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<HEAD><TITLE>I/O Timing Report</TITLE>
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<PRE><A name="Top"></A><B><U><big>I/O Timing Report</big></U></B>
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Loading design for application iotiming from file lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: 5
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: 6
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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Loading design for application iotiming from file lcmxo2_640hc_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO2-640HC
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Package: TQFP100
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Performance: M
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Package Status: Final Version 1.39.
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Performance Hardware Data Status: Final Version 34.4.
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// Design: RAM2GS
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// Package: TQFP100
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// ncd File: lcmxo2_640hc_impl1.ncd
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// Version: Diamond (64-bit) 3.12.1.454
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// Written on Sat Aug 19 21:55:13 2023
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// M: Minimum Performance Grade
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// iotiming LCMXO2_640HC_impl1.ncd LCMXO2_640HC_impl1.prf -gui -msgset Y:/Repos/RAM2GS/CPLD/LCMXO2-640HC/promote.xml
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I/O Timing Report (All units are in ns)
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Worst Case Results across Performance Grades (M, 6, 5, 4):
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// Input Setup and Hold Times
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Port Clock Edge Setup Performance_Grade Hold Performance_Grade
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----------------------------------------------------------------------
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CROW[0] nCRAS F 2.553 4 -0.117 M
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CROW[1] nCRAS F 2.019 4 0.001 M
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Din[0] PHI2 F 4.715 4 3.636 4
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Din[0] nCCAS F 0.790 4 0.535 4
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Din[1] PHI2 F 5.021 4 3.516 4
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Din[1] nCCAS F 1.086 4 0.264 4
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Din[2] PHI2 F 3.385 4 3.516 4
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Din[2] nCCAS F 0.282 4 0.948 4
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Din[3] PHI2 F 4.644 4 3.516 4
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Din[3] nCCAS F 1.278 4 0.095 4
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Din[4] PHI2 F 4.335 4 3.516 4
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Din[4] nCCAS F 2.446 4 -0.199 M
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Din[5] PHI2 F 3.662 4 3.516 4
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Din[5] nCCAS F 0.907 4 0.402 4
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Din[6] PHI2 F 4.869 4 3.636 4
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Din[6] nCCAS F 1.378 4 0.023 M
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Din[7] PHI2 F 4.138 4 3.636 4
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Din[7] nCCAS F 2.072 4 -0.120 M
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MAin[0] PHI2 F 5.613 4 0.006 M
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MAin[0] nCRAS F 0.244 4 1.146 4
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MAin[1] PHI2 F 3.409 4 0.354 6
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MAin[1] nCRAS F 0.244 4 1.146 4
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MAin[2] PHI2 F 5.391 4 0.132 M
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MAin[2] nCRAS F 0.250 4 1.141 4
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MAin[3] PHI2 F 4.627 4 0.087 M
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MAin[3] nCRAS F 0.507 4 0.910 4
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MAin[4] PHI2 F 5.665 4 -0.133 M
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MAin[4] nCRAS F 0.675 4 0.777 4
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MAin[5] PHI2 F 5.569 4 0.129 M
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MAin[5] nCRAS F 0.050 4 1.238 4
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MAin[6] PHI2 F 5.717 4 -0.141 M
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MAin[6] nCRAS F 0.242 4 1.146 4
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MAin[7] PHI2 F 5.943 4 -0.173 M
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MAin[7] nCRAS F 0.170 4 1.228 4
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MAin[8] nCRAS F 0.759 4 0.696 4
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MAin[9] nCRAS F 0.516 4 0.891 4
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PHI2 RCLK R -0.312 M 3.167 4
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nCCAS RCLK R 2.600 4 -0.176 M
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nCCAS nCRAS F 3.106 4 -0.235 M
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nCRAS RCLK R 1.803 4 -0.055 M
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nFWE PHI2 F 4.680 4 0.261 M
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nFWE nCRAS F 2.234 4 1.143 4
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// Clock to Output Delay
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Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
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------------------------------------------------------------------------
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LED RCLK R 9.922 4 2.878 M
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LED nCRAS F 10.555 4 3.057 M
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RA[0] RCLK R 11.638 4 3.406 M
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RA[0] nCRAS F 11.771 4 3.430 M
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RA[10] RCLK R 8.141 4 2.620 M
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RA[11] PHI2 R 8.610 4 2.756 M
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RA[1] RCLK R 11.674 4 3.407 M
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RA[1] nCRAS F 10.635 4 3.155 M
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RA[2] RCLK R 12.933 4 3.729 M
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RA[2] nCRAS F 11.858 4 3.449 M
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RA[3] RCLK R 12.587 4 3.664 M
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RA[3] nCRAS F 11.255 4 3.298 M
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RA[4] RCLK R 11.721 4 3.433 M
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RA[4] nCRAS F 11.153 4 3.297 M
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RA[5] RCLK R 12.544 4 3.620 M
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RA[5] nCRAS F 11.480 4 3.360 M
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RA[6] RCLK R 12.984 4 3.775 M
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RA[6] nCRAS F 11.528 4 3.407 M
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RA[7] RCLK R 12.553 4 3.625 M
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RA[7] nCRAS F 11.610 4 3.368 M
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RA[8] RCLK R 11.836 4 3.453 M
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RA[8] nCRAS F 10.797 4 3.201 M
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RA[9] RCLK R 11.182 4 3.271 M
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RA[9] nCRAS F 11.135 4 3.279 M
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RBA[0] nCRAS F 8.439 4 2.703 M
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RBA[1] nCRAS F 8.439 4 2.703 M
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RCKE RCLK R 10.083 4 3.081 M
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RDQMH RCLK R 11.381 4 3.325 M
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RDQML RCLK R 10.735 4 3.173 M
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RD[0] nCCAS F 8.223 4 2.594 M
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RD[1] nCCAS F 8.223 4 2.594 M
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RD[2] nCCAS F 8.223 4 2.594 M
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RD[3] nCCAS F 8.223 4 2.594 M
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RD[4] nCCAS F 8.223 4 2.594 M
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RD[5] nCCAS F 8.223 4 2.594 M
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RD[6] nCCAS F 8.223 4 2.594 M
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RD[7] nCCAS F 8.223 4 2.594 M
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nRCAS RCLK R 8.141 4 2.620 M
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nRCS RCLK R 8.141 4 2.620 M
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nRRAS RCLK R 8.141 4 2.620 M
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nRWE RCLK R 8.121 4 2.627 M
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WARNING: you must also run trce with hold speed: 4
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WARNING: you must also run trce with hold speed: 6
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WARNING: you must also run trce with setup speed: M
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