mirror of
https://github.com/garrettsworkshop/RAM2GS.git
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139 lines
6.6 KiB
Plaintext
139 lines
6.6 KiB
Plaintext
Loading design for application iotiming from file ram2gs_lcmxo256c_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO256C
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Package: TQFP100
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Performance: 4
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Package Status: Final Version 1.19.
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Performance Hardware Data Status: Version 1.124.
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Loading design for application iotiming from file ram2gs_lcmxo256c_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO256C
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Package: TQFP100
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Performance: 5
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Package Status: Final Version 1.19.
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Performance Hardware Data Status: Version 1.124.
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Loading design for application iotiming from file ram2gs_lcmxo256c_impl1.ncd.
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Design name: RAM2GS
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NCD version: 3.3
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Vendor: LATTICE
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Device: LCMXO256C
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Package: TQFP100
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Performance: M
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Package Status: Final Version 1.19.
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Performance Hardware Data Status: Version 1.124.
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// Design: RAM2GS
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// Package: TQFP100
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// ncd File: ram2gs_lcmxo256c_impl1.ncd
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// Version: Diamond (64-bit) 3.12.1.454
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// Written on Sat Aug 19 20:53:32 2023
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// M: Minimum Performance Grade
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// iotiming RAM2GS_LCMXO256C_impl1.ncd RAM2GS_LCMXO256C_impl1.prf -gui -msgset Y:/Repos/RAM2GS/CPLD/LCMXO256C/promote.xml
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I/O Timing Report (All units are in ns)
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Worst Case Results across Performance Grades (M, 5, 4, 3):
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// Input Setup and Hold Times
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Port Clock Edge Setup Performance_Grade Hold Performance_Grade
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----------------------------------------------------------------------
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CROW[0] nCRAS F -0.006 M 1.904 3
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CROW[1] nCRAS F -0.006 M 1.904 3
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Din[0] PHI2 F 4.101 3 2.207 3
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Din[0] nCCAS F 1.552 3 -0.018 M
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Din[1] PHI2 F 2.668 3 3.026 3
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Din[1] nCCAS F 0.606 3 0.745 3
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Din[2] PHI2 F 2.073 3 2.917 3
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Din[2] nCCAS F 0.500 3 0.619 3
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Din[3] PHI2 F 2.620 3 3.334 3
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Din[3] nCCAS F -0.089 M 1.336 3
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Din[4] PHI2 F 5.116 3 2.411 3
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Din[4] nCCAS F 0.293 3 1.125 3
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Din[5] PHI2 F 5.590 3 2.084 3
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Din[5] nCCAS F 0.435 3 0.979 3
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Din[6] PHI2 F 5.951 3 1.726 3
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Din[6] nCCAS F 1.305 3 0.253 3
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Din[7] PHI2 F 4.412 3 1.404 3
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Din[7] nCCAS F 0.195 3 1.215 3
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MAin[0] PHI2 F 3.306 3 1.176 3
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MAin[0] nCRAS F -0.132 M 2.336 3
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MAin[1] PHI2 F 2.656 3 2.511 3
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MAin[1] nCRAS F -0.034 M 2.014 3
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MAin[2] PHI2 F 6.839 3 -0.310 M
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MAin[2] nCRAS F -0.154 M 2.424 3
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MAin[3] PHI2 F 6.871 3 -0.311 M
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MAin[3] nCRAS F -0.015 M 1.928 3
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MAin[4] PHI2 F 7.111 3 -0.361 M
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MAin[4] nCRAS F 0.370 3 1.590 3
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MAin[5] PHI2 F 7.075 3 -0.353 M
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MAin[5] nCRAS F -0.126 M 2.320 3
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MAin[6] PHI2 F 6.794 3 -0.295 M
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MAin[6] nCRAS F 0.010 3 1.885 3
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MAin[7] PHI2 F 6.926 3 -0.324 M
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MAin[7] nCRAS F 0.319 3 1.622 3
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MAin[8] nCRAS F -0.038 M 2.031 3
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MAin[9] nCRAS F 0.366 3 1.596 3
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PHI2 RCLK R 2.295 3 -0.174 M
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UFMSDO RCLK R 1.364 3 0.511 3
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nCCAS RCLK R 2.300 3 -0.185 M
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nCCAS nCRAS F 0.216 3 1.721 3
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nCRAS RCLK R 4.548 3 -0.507 M
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nFWE PHI2 F 6.729 3 -0.281 M
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nFWE nCRAS F -0.037 M 2.025 3
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// Clock to Output Delay
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Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
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------------------------------------------------------------------------
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LED RCLK R 7.842 3 1.620 M
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LED nCRAS F 10.578 3 2.158 M
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RA[0] RCLK R 9.531 3 1.954 M
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RA[0] nCRAS F 11.210 3 2.276 M
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RA[10] RCLK R 7.998 3 1.636 M
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RA[11] PHI2 R 8.837 3 1.781 M
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RA[1] RCLK R 11.134 3 2.285 M
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RA[1] nCRAS F 11.588 3 2.348 M
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RA[2] RCLK R 8.931 3 1.827 M
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RA[2] nCRAS F 10.718 3 2.175 M
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RA[3] RCLK R 9.942 3 2.025 M
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RA[3] nCRAS F 11.459 3 2.315 M
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RA[4] RCLK R 10.804 3 2.199 M
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RA[4] nCRAS F 11.949 3 2.399 M
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RA[5] RCLK R 9.531 3 1.954 M
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RA[5] nCRAS F 10.353 3 2.098 M
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RA[6] RCLK R 8.931 3 1.827 M
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RA[6] nCRAS F 9.961 3 2.021 M
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RA[7] RCLK R 10.350 3 2.117 M
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RA[7] nCRAS F 10.579 3 2.124 M
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RA[8] RCLK R 10.008 3 2.034 M
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RA[8] nCRAS F 11.368 3 2.282 M
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RA[9] RCLK R 9.085 3 1.845 M
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RA[9] nCRAS F 10.306 3 2.065 M
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RBA[0] nCRAS F 8.339 3 1.684 M
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RBA[1] nCRAS F 10.066 3 2.033 M
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RCKE RCLK R 7.910 3 1.616 M
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RDQMH RCLK R 9.081 3 1.846 M
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RDQML RCLK R 10.003 3 2.044 M
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RD[0] nCCAS F 8.482 3 1.831 M
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RD[1] nCCAS F 7.771 3 1.703 M
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RD[2] nCCAS F 8.472 3 1.830 M
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RD[3] nCCAS F 8.468 3 1.830 M
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RD[4] nCCAS F 8.240 3 1.804 M
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RD[5] nCCAS F 10.703 3 2.293 M
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RD[6] nCCAS F 8.240 3 1.804 M
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RD[7] nCCAS F 9.407 3 2.023 M
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UFMCLK RCLK R 7.454 3 1.510 M
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UFMSDI RCLK R 6.271 3 1.287 M
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nRCAS RCLK R 7.626 3 1.553 M
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nRCS RCLK R 6.271 3 1.287 M
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nRRAS RCLK R 7.438 3 1.506 M
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nRWE RCLK R 6.271 3 1.287 M
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nUFMCS RCLK R 7.914 3 1.619 M
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WARNING: you must also run trce with hold speed: 3
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WARNING: you must also run trce with setup speed: M
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