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more normalization and commenting
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Jorj Bauer
parent
fe46c4ab52
commit
0468bf43c5
@ -61,8 +61,15 @@ Current write page table [512 bytes] in real ram
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*/
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// This has a split memory model so more often addressed pages can be
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// in internal memory, and an external memory can hold others.
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// All the pages. Because we don't have enough RAM for both the
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// display's DMA and the Apple's 148k (128k + ROM space), we're using
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// an external SRAM for some of this. Anything that's accessed very
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// often should be in the *low* pages, b/c those are in internal
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// Teensy RAM. When we run out of preallocated RAM (cf. vmram.h), we
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// fall over to an external 256kB SRAM (which is much slower).
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//
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// Zero page (and its alts) are the most used pages (the stack is in
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// page 1).
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//
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// We want the video display pages in real RAM as much as possible,
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// since blits wind up touching so much of it. If we can keep that in
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@ -79,12 +86,12 @@ enum {
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MP_ZP = 0, // page 0/1 * 2 page variants = 4; 0..3
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MP_4 = 4, // 0x04 - 0x07 (text display pages) * 2 variants = 8; 4..11
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MP_20 = 12, // 0x20 - 0x5F * 2 variants = 128; 12..139
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// Pages that can go to external RAM if needed:
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// Pages that can go to external SRAM:
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MP_2 = 140, // 0x02 - 0x03 * 2 variants = 4; 140..143
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MP_8 = 144, // 0x08 - 0x1F * 2 = 48; 144..191
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MP_60 = 192, // 0x60 - 0xBF * 2 = 192; 192..383
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MP_C1 = 384, // start of 0xC1-0xCF * 2 page variants = 30; 384-413
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MP_C1 = 384, // start of 0xC1-0xC7 * 2 page variants = 14; 384-397
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MP_C8 = 398, // 0xc8 - 0xcf, 3 page variants = 24; 398 - 421
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MP_D0 = 422, // start of 0xD0-0xDF * 5 page variants = 80; 422 - 501
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MP_E0 = 502, // start of 0xE0-0xFF * 3 page variants = 96; 502 - 597
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@ -92,7 +99,6 @@ enum {
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// = 599 pages in all (149.75k)
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};
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static uint16_t _pageNumberForRam(uint8_t highByte, uint8_t variant)
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{
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if (highByte <= 1) {
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@ -118,14 +124,13 @@ static uint16_t _pageNumberForRam(uint8_t highByte, uint8_t variant)
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return MP_C0;
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}
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if (highByte <= 0xC7) {
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// 0xC1 - 0xC7
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// 0xC1-0xC7
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return ((highByte - 0xC1) * 2 + variant + MP_C1);
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}
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if (highByte <= 0xCF) {
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// bank-switched ROM. 0 = built-in; 1 = 80-column (slot 3); 2 = mouse (slot 4)
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return ((highByte - 0xC8) * 3 + variant + MP_C8);
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}
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if (highByte <= 0xDF) {
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// 0xD0 - 0xDF 16 * 5 pages = 80 pages (20k)
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return ((highByte - 0xD0) * 5 + variant + MP_D0);
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@ -229,6 +234,8 @@ bool AppleMMU::Deserialize(int8_t fd)
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return true;
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}
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void AppleMMU::Reset()
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{
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resetRAM();
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@ -925,6 +932,7 @@ void AppleMMU::resetRAM()
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for (uint16_t i=0x80; i<=0xFF; i++) {
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uint16_t page0 = _pageNumberForRam(i, 0);
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uint16_t page1 = _pageNumberForRam(i, 1);
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for (uint16_t k=0; k<0x100; k++) {
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uint16_t idx = ((i-0x80) << 8) | k;
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#ifdef TEENSYDUINO
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@ -932,22 +940,25 @@ void AppleMMU::resetRAM()
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#else
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uint8_t v = romData[idx];
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#endif
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// The space from 0xC1 through 0xCF is ROM image territory. We
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// load the C3 ROM in to page 0, but not in page 1; and then we
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// load C800.CFFF to both the main ROM (page 0) and the C3 aux ROM
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// The space from 0xc1 through 0xcf is ROM image territory. We
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// load the C3 ROM in to page 0, but not page 1; and then we
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// load c800.CFFF to both main ROM (page 0) and the C3 aux ROM
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// (page 1) to convince the VM that we've got 128k of RAM and an
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// 80-column card.
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if (i >= 0xc1 && i <= 0xcf) {
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if (i == 0xc3) {
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// C300..C3FF => built-in ROM
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g_ram.writeByte((page0 << 8) | (k & 0xFF), v);
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} else if (i >= 0xc8) {
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}
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else if (i >= 0xc8) {
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// C800..CFFF => built-in ROM and slot 3 extended ROM
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if (i >= 0xc1 && i <= 0xcf) {
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g_ram.writeByte((page0 << 8) | (k & 0xFF), v);
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g_ram.writeByte((page1 << 8) | (k & 0xFF), v);
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} else {
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// C000..C2FF and C400..C7FF are main ROM
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}
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else {
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// C000..C2FF and C400..c7FF are main ROM
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g_ram.writeByte((page1 << 8) | (k & 0xFF), v);
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}
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} else {
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@ -956,7 +967,6 @@ void AppleMMU::resetRAM()
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}
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}
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}
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}
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// have each slot load its ROM
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for (uint8_t slotnum = 1; slotnum <= 7; slotnum++) {
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@ -1088,14 +1098,14 @@ void AppleMMU::updateMemoryPages()
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// for a given peripheral to C800..CFFF.
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if (slotLatch != -1) {
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// FIXME: this is a hacky mess. Slot 3 (the 80-col card) is
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// supported as "page 1"; and Slot 4 (the mouse card) is
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// supported as "page 2".
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// supported, as page "1"; and Slot 4 (the mouse card) is
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// supported as page "2".
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if (slotLatch == 3) {
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for (int i=0xc8; i <= 0xcf; i++) {
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readPages[i] = _pageNumberForRam(i, 1);
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}
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} else if (slotLatch == 4) {
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for (int i=0xc8; i<=0xcf; i++) {
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for (int i=0xc8; i <= 0xcf; i++) {
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readPages[i] = _pageNumberForRam(i, 2);
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}
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}
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181
apple/mouse.cpp
181
apple/mouse.cpp
@ -36,6 +36,187 @@ void Mouse::writeSwitches(uint8_t s, uint8_t v)
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void Mouse::loadROM(uint8_t *toWhere)
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{
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/* ROM Disassembly:
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C400- 2C 58 FF BIT $FF58 ; test bits in FF58 w/ A
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C403- 70 1B BVS $C420 ; V will contain bit 6 from $FF58, which should be $20 on boot-up
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C405- 38 SEC
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C406- 90 18 BCC $C420 ; no-op; unless called @ $C406 directly?
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C408- B8 CLV ; clear overflow
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C409- 50 15 BVC $C420 ; always branches
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; unused... ? more lookup table... ?
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C40B- 01 20 ORA ($20,X)
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C40D- AE AE AE LDX $AEAE
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; This is the lookup table for entry addresses
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C410- AE
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C411- 00
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C412- 6D ;(setmouse @ c46d)
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C413- 75 ;(servemouse @ C475)
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C414- 8E ;(readmouse @ C48E)
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C415- 9F ;(clearmouse @ C49F)
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C416- A4 ;(posmouse @ C4A4)
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C417- 86 ;(clampmouse @ C486)
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C418- A9 ;(homemouse @ C4A9)
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C419- 97 ;(initmouse @ C497)
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C41A- AE
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C41B- AE
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C41C- AE ;(semi-documented: sets mouse frequency handler to 60 or 50 hz)
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C41D- AE
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C41E- AE
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C41F- AE
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; Main
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C420- 48 PHA ; push accumulator to stack
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C421- 98 TYA
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C422- 48 PHA ; push Y to stack
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C423- 8A TXA
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C424- 48 PHA ; push X to stack
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C424- 48 PHA
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C425- 08 PHP ; push status to stack
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C426- 78 SEI ; disable interrupts
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; This JSR $FF58 is a trick to get the address we're calling from. By
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; default, $FF58 contains a RTS (until patched as the DOS '&' vector,
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; or ProDOS does something similar). As long as this executes before
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; the DOS takes over, it's safe; but if we're doing this after ProDOS
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; loads, a 64k machine might have garbage after the language card RAM
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; is loaded here. A safer alternative would be something like
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; LDA #$60 ; Write an RTS ($60) to a temporary memory
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; STA WORK ; address, and then
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; JSR WORK ; jump to it
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; TSX
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; LDA $100, X ; grab the return address off the stack
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C427- 20 58 FF JSR $FF58
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C42A- BA TSX
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C42B- BD 00 01 LDA $0100,X
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C42E- AA TAX
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C42F- 0A ASL
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C430- 0A ASL
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C431- 0A ASL
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C432- 0A ASL
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C433- A8 TAY
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C434- 28 PLP ; restore status from stack
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C435- 50 0F BVC $C446 ; overflow is clear if ... ?
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C437- A5 38 LDA $38 ; >> what's in $38?
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C439- D0 0D BNE $C448 ; restore stack & return
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C43B- 8A TXA
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C43C- 45 39 EOR $39 ; >> what's in $39?
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C43E- D0 08 BNE $C448 ; restore stack & return
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C440- A9 05 LDA #$05
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C442- 85 38 STA $38 ; ($38) = $05
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C442- 85 38 STA $38
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C444- D0 0B BNE $C451
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C446- B0 09 BCS $C451 ; carry set if ... ?
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C448- 68 PLA ; pull X from stack
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C449- AA TAX
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C44A- 68 PLA ; pull Y from stack, but
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C44B- EA NOP ; throw it away
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C44C- 68 PLA ; pull A from stack
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C44D- 99 80 C0 STA $C080,Y ; LC RAM bank2, read and wr-protect
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C450- 60 RTS
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C451- 99 81 C0 STA $C081,Y ; LC RAM bank 2, read ROM
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C454- 68 PLA ;
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C455- BD 38 06 LDA $0638,X
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C458- AA TAX
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C459- 68 PLA
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C45A- A8 TAY
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C45B- 68 PLA
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C45C- BD 00 02 LDA $0200,X ; keyboard character buffer?
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C45F- 60 RTS
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C460- 00 BRK
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C461- 00 BRK
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C462- 00 BRK
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C463- 00 BRK
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C464- 00 BRK
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C465- 00 BRK
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C466- 00 BRK
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C467- 00 BRK
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C468- 00 BRK
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C469- 00 BRK
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C46A- 00 BRK
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C46B- 00 BRK
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C46C- 00 BRK
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; SetMouse
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C46D- C9 10 CMP #$10 ; interrupt on VBL + interrupt on mouse move?
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C46F- B0 3F BCS $C4B0 ; RTS if A >= 0x10
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C471- 99 82 C0 STA $C082,Y ; LC RAM bank 2, read ROM, wr-protect RAM
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C474- 60 RTS
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; ServeMouse
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C475- 48 PHA
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C476- 18 CLC
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C477- 90 39 BCC $C4B2 ; always branches
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; ServeMouse cleanup and exit
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C479- 99 83 C0 STA $C083,Y ; LC RAM bank 2, read RAM
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C47C- BD B8 06 LDA $06B8,X
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C47F- 29 0E AND #$0E
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C481- D0 01 BNE $C484
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C483- 38 SEC
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C484- 68 PLA
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C485- 60 RTS
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; ClampMouse
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C486- C9 02 CMP #$02
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C488- B0 26 BCS $C4B0 ; RTS if 2 <= the A register
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C48A- 99 83 C0 STA $C083,Y ; LC RAM bank 2, read RAM
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C48D- 60 RTS
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; ReadMouse
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C48E- A9 04 LDA #$04
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C490- 99 83 C0 STA $C083,Y ; LC RAM bank 2, read RAM
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C493- 18 CLC
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C494- EA NOP
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C495- EA NOP
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C496- 60 RTS
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; InitMouse
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C497- EA NOP
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C498- A9 02 LDA #$02
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C49A- 99 83 C0 STA $C083,Y ; LC RAM bank 2, read RAM
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C49D- 18 CLC
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C49E- 60 RTS
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; ClearMouse
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C49F- EA NOP
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C4A0- A9 05 LDA #$05
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C4A2- D0 F6 BNE $C49A
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; PosMouse
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C4A4- EA NOP
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C4A5- A9 06 LDA #$06
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C4A7- D0 F1 BNE $C49A
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; HomeMouse
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C4A9- EA NOP
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C4AA- A9 07 LDA #$07
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C4AC- D0 EC BNE $C49A
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C4AE- A2 03 LDX #$03
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C4B0- 38 SEC
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C4B1- 60 RTS
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; ServeMouse main worker
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C4B2- 08 PHP
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C4B3- A5 00 LDA $00
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C4B5- 48 PHA
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C4B6- A9 60 LDA #$60
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C4B8- 85 00 STA $00
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C4BA- 78 SEI
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C4BB- 20 00 00 JSR $0000
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C4BE- BA TSX
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C4BF- 68 PLA
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C4C0- 85 00 STA $00
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C4C2- BD 00 01 LDA $0100,X
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C4C5- 28 PLP
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C4C6- AA TAX
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C4C7- 0A ASL
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C4C8- 0A ASL
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C4C9- 0A ASL
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C4CA- 0A ASL
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C4CB- A8 TAY
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C4CC- A9 03 LDA #$03
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C4CE- 18 CLC
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C4CF- 90 A8 BCC $C479 ; always branches
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*/
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uint8_t rom[256] = { 0x2c, 0x58, 0xff, 0x70, 0x1B, 0x38, 0x90, 0x18,
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0xb8, 0x50, 0x15, 0x01, 0x20, 0xae, 0xae, 0xae,
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0xae, 0x00, 0x6d, 0x75, 0x8e, 0x9f, 0xa4, 0x86,
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