playing with PLL, pixel clock, and SPI bus speed: up to 17 fps

This commit is contained in:
Jorj Bauer 2022-01-21 08:03:40 -05:00
parent fac84b53b0
commit 18356b92fe
2 changed files with 5 additions and 5 deletions

View File

@ -217,11 +217,11 @@ void RA8875_t4::_initializeTFT()
delay(10);
// Update the sysclock
_writeRegister(RA8875_PLLC1, 0x0B); // %0000 1011 == pre-drive /1; input /11
_writeRegister(RA8875_PLLC1, 0x1D);
delay(1);
_writeRegister(RA8875_PLLC1+1, 0x02); // %0000 0010 == PLL output /4
_writeRegister(RA8875_PLLC1+1, 0x02);
delay(1);
_writeRegister(RA8875_PCSR, 0x81); // %1000 0001 == PDAT at PCLK falling edge; PCLK period is 2* system clock period
_writeRegister(RA8875_PCSR, 0x82);
delay(1);
_clock = _spi_clock; // speed up to full speed now
@ -241,7 +241,7 @@ void RA8875_t4::_initializeTFT()
fillWindow(); // defaults to black
// turn on backlight
_writeRegister(RA8875_P1CR, (RA8875_PxCR_ENABLE | (RA8875_PWM_CLK_DIV1024 & 0xF)));
_writeRegister(RA8875_P1CR, (RA8875_PxCR_ENABLE | (RA8875_PWM_CLK_DIV2048 & 0xF)));
_writeRegister(RA8875_P1DCR, 255); // brightness
// set graphics mode & default memory write order/behavior

View File

@ -24,7 +24,7 @@ extern const unsigned char interface_glyphs[256];
DMAMEM uint8_t dmaBuffer[RA8875_HEIGHT][RA8875_WIDTH] /*__attribute__((aligned(32))*/;
#include <SPI.h>
#define _clock 20000000u // FIXME bring this up - it's under the default now
#define _clock 79500000u
#define PIN_RST 8
#define PIN_DC 9