triploid catchup
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(kicad_pcb (version 20171130) (host pcbnew 5.1.10-88a1d61d58~88~ubuntu18.04.1)
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(general
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(thickness 1.6)
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(drawings 13)
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(tracks 1)
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(zones 0)
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(modules 4)
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(nets 100)
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)
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(page A4)
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(title_block
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(title "Apple II Breadboard Card")
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(date 2021-02-08)
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(rev 1.1)
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(company "Renee Harke")
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(comment 1 "MIT license; see LICENSE file")
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)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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||||
(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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||||
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||||
(setup
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||||
(last_trace_width 0.25)
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||||
(user_trace_width 0.4)
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||||
(user_trace_width 1)
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||||
(trace_clearance 0.2)
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||||
(zone_clearance 0.508)
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||||
(zone_45_only no)
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||||
(trace_min 0.2)
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||||
(via_size 0.8)
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(via_drill 0.4)
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||||
(via_min_size 0.4)
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||||
(via_min_drill 0.3)
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||||
(uvia_size 0.3)
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||||
(uvia_drill 0.1)
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||||
(uvias_allowed no)
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||||
(uvia_min_size 0.2)
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||||
(uvia_min_drill 0.1)
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||||
(edge_width 0.05)
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||||
(segment_width 0.2)
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||||
(pcb_text_width 0.3)
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||||
(pcb_text_size 1.5 1.5)
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||||
(mod_edge_width 0.12)
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||||
(mod_text_size 1 1)
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||||
(mod_text_width 0.15)
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||||
(pad_size 1.524 1.524)
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||||
(pad_drill 0.762)
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||||
(pad_to_mask_clearance 0.051)
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||||
(solder_mask_min_width 0.25)
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||||
(aux_axis_origin 0 0)
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||||
(visible_elements FFFFFF7F)
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||||
(pcbplotparams
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||||
(layerselection 0x3ffff_ffffffff)
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||||
(usegerberextensions false)
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||||
(usegerberattributes false)
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||||
(usegerberadvancedattributes false)
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||||
(creategerberjobfile false)
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||||
(excludeedgelayer true)
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||||
(linewidth 0.100000)
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||||
(plotframeref false)
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||||
(viasonmask false)
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||||
(mode 1)
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||||
(useauxorigin false)
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||||
(hpglpennumber 1)
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||||
(hpglpenspeed 20)
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||||
(hpglpendiameter 15.000000)
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||||
(psnegative false)
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||||
(psa4output false)
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||||
(plotreference true)
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||||
(plotvalue true)
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||||
(plotinvisibletext false)
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||||
(padsonsilk false)
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||||
(subtractmaskfromsilk false)
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||||
(outputformat 1)
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||||
(mirror false)
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||||
(drillshape 0)
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||||
(scaleselection 1)
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(outputdirectory "gerber"))
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)
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(net 0 "")
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(net 1 /+12V)
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(net 2 /D0)
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(net 3 /D1)
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(net 4 /D2)
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(net 5 /D3)
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(net 6 /D4)
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(net 7 /D5)
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(net 8 /D6)
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(net 9 /D7)
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(net 10 /~DEVSEL)
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(net 11 /PHI0)
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(net 12 /USER1)
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(net 13 /PHI1)
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(net 14 /Q3)
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(net 15 /7M)
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(net 16 /COLORREF)
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(net 17 /-5V)
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(net 18 /-12V)
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(net 19 /~INH)
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(net 20 /~RES)
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(net 21 /~IRQ)
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(net 22 /~NMI)
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||||
(net 23 /INTIN)
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(net 24 /DMAIN)
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(net 25 /~IOSEL)
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||||
(net 26 /A0)
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||||
(net 27 /A1)
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||||
(net 28 /A2)
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(net 29 /A3)
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||||
(net 30 /A4)
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(net 31 /A5)
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(net 32 /A6)
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(net 33 /A7)
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(net 34 /A8)
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(net 35 /A9)
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(net 36 /A10)
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(net 37 /A11)
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(net 38 /A12)
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(net 39 /A13)
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(net 40 /A14)
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(net 41 /A15)
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(net 42 /R~W)
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(net 43 /SYNC)
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(net 44 /~IOSTRB)
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(net 45 /RDY)
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(net 46 /~DMA)
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(net 47 /INTOUT)
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(net 48 /DMAOUT)
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(net 49 GND)
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(net 50 +5V)
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(net 51 "Net-(U1-Pad42)")
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(net 52 "Net-(U2-Pad36)")
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(net 53 "Net-(U2-Pad35)")
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(net 54 "Net-(U2-Pad34)")
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||||
(net 55 "Net-(U2-Pad33)")
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(net 56 "Net-(U2-Pad32)")
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||||
(net 57 "Net-(U2-Pad31)")
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||||
(net 58 "Net-(U2-Pad30)")
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||||
(net 59 "Net-(U1-Pad46)")
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||||
(net 60 "Net-(U2-Pad28)")
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(net 61 "Net-(U2-Pad27)")
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(net 62 "Net-(U1-Pad38)")
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(net 63 "Net-(U2-Pad25)")
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(net 64 "Net-(U2-Pad24)")
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(net 65 "Net-(U2-Pad23)")
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(net 66 "Net-(U2-Pad22)")
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||||
(net 67 "Net-(U2-Pad21)")
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||||
(net 68 "Net-(U2-Pad20)")
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||||
(net 69 "Net-(U2-Pad19)")
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||||
(net 70 "Net-(U2-Pad18)")
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||||
(net 71 "Net-(U2-Pad17)")
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||||
(net 72 "Net-(U2-Pad16)")
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||||
(net 73 "Net-(U2-Pad14)")
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(net 74 "Net-(U2-Pad13)")
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||||
(net 75 "Net-(U1-Pad39)")
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(net 76 "Net-(U1-Pad40)")
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||||
(net 77 "Net-(U1-Pad41)")
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(net 78 "Net-(U2-Pad8)")
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||||
(net 79 "Net-(U1-Pad3)")
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(net 80 "Net-(U1-Pad45)")
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(net 81 "Net-(U2-Pad5)")
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(net 82 "Net-(U2-Pad4)")
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||||
(net 83 "Net-(U2-Pad3)")
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||||
(net 84 "Net-(U2-Pad2)")
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(net 85 VCC)
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(net 86 "Net-(U1-Pad44)")
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(net 87 "Net-(U1-Pad37)")
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(net 88 "Net-(U1-Pad36)")
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(net 89 "Net-(U1-Pad35)")
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(net 90 "Net-(U1-Pad34)")
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(net 91 "Net-(U1-Pad33)")
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(net 92 /D0R)
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(net 93 /D1R)
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(net 94 /D2R)
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(net 95 /D3R)
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(net 96 /D4R)
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(net 97 /D5R)
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(net 98 /D6R)
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(net 99 /D7R)
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(net_class Default "This is the default net class."
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(clearance 0.2)
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||||
(trace_width 0.25)
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||||
(via_dia 0.8)
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||||
(via_drill 0.4)
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||||
(uvia_dia 0.3)
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||||
(uvia_drill 0.1)
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(add_net +5V)
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(add_net /+12V)
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(add_net /-12V)
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(add_net /-5V)
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(add_net /7M)
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(add_net /A0)
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(add_net /A1)
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(add_net /A10)
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(add_net /A11)
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||||
(add_net /A12)
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||||
(add_net /A13)
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(add_net /A14)
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(add_net /A15)
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(add_net /A2)
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(add_net /A3)
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(add_net /A4)
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||||
(add_net /A5)
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||||
(add_net /A6)
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||||
(add_net /A7)
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(add_net /A8)
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||||
(add_net /A9)
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(add_net /COLORREF)
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(add_net /D0)
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(add_net /D0R)
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(add_net /D1)
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(add_net /D1R)
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(add_net /D2)
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(add_net /D2R)
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(add_net /D3)
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(add_net /D3R)
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(add_net /D4)
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(add_net /D4R)
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(add_net /D5)
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||||
(add_net /D5R)
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(add_net /D6)
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(add_net /D6R)
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(add_net /D7)
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||||
(add_net /D7R)
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||||
(add_net /DMAIN)
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||||
(add_net /DMAOUT)
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||||
(add_net /INTIN)
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||||
(add_net /INTOUT)
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||||
(add_net /PHI0)
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||||
(add_net /PHI1)
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||||
(add_net /Q3)
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||||
(add_net /RDY)
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||||
(add_net /R~W)
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||||
(add_net /SYNC)
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||||
(add_net /USER1)
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||||
(add_net /~DEVSEL)
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||||
(add_net /~DMA)
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||||
(add_net /~INH)
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||||
(add_net /~IOSEL)
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||||
(add_net /~IOSTRB)
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(add_net /~IRQ)
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||||
(add_net /~NMI)
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||||
(add_net /~RES)
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||||
(add_net GND)
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||||
(add_net "Net-(U1-Pad3)")
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||||
(add_net "Net-(U1-Pad33)")
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||||
(add_net "Net-(U1-Pad34)")
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||||
(add_net "Net-(U1-Pad35)")
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||||
(add_net "Net-(U1-Pad36)")
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||||
(add_net "Net-(U1-Pad37)")
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||||
(add_net "Net-(U1-Pad38)")
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||||
(add_net "Net-(U1-Pad39)")
|
||||
(add_net "Net-(U1-Pad40)")
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||||
(add_net "Net-(U1-Pad41)")
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||||
(add_net "Net-(U1-Pad42)")
|
||||
(add_net "Net-(U1-Pad44)")
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||||
(add_net "Net-(U1-Pad45)")
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||||
(add_net "Net-(U1-Pad46)")
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||||
(add_net "Net-(U2-Pad13)")
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||||
(add_net "Net-(U2-Pad14)")
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||||
(add_net "Net-(U2-Pad16)")
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||||
(add_net "Net-(U2-Pad17)")
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||||
(add_net "Net-(U2-Pad18)")
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||||
(add_net "Net-(U2-Pad19)")
|
||||
(add_net "Net-(U2-Pad2)")
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||||
(add_net "Net-(U2-Pad20)")
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||||
(add_net "Net-(U2-Pad21)")
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||||
(add_net "Net-(U2-Pad22)")
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||||
(add_net "Net-(U2-Pad23)")
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||||
(add_net "Net-(U2-Pad24)")
|
||||
(add_net "Net-(U2-Pad25)")
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||||
(add_net "Net-(U2-Pad27)")
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||||
(add_net "Net-(U2-Pad28)")
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||||
(add_net "Net-(U2-Pad3)")
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||||
(add_net "Net-(U2-Pad30)")
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||||
(add_net "Net-(U2-Pad31)")
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||||
(add_net "Net-(U2-Pad32)")
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||||
(add_net "Net-(U2-Pad33)")
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||||
(add_net "Net-(U2-Pad34)")
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||||
(add_net "Net-(U2-Pad35)")
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||||
(add_net "Net-(U2-Pad36)")
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||||
(add_net "Net-(U2-Pad4)")
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||||
(add_net "Net-(U2-Pad5)")
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||||
(add_net "Net-(U2-Pad8)")
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(add_net VCC)
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)
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(module pub:AppleIIBus (layer F.Cu) (tedit 5E4F43C2) (tstamp 5E33EA12)
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(at 200.66 128.397)
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(path /5E339C7A)
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(fp_text reference J1 (at 0 -5.08) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value "CARD EDGE" (at 25.4 -5.08) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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||||
)
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(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer B.Mask) (width 0))
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||||
(fp_poly (pts (xy -32.893 -3.81) (xy -32.893 3.81) (xy -31.877 3.81) (xy -31.877 -3.81)) (layer B.Mask) (width 0))
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(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer F.Mask) (width 0))
|
||||
(fp_poly (pts (xy -32.893 -3.81) (xy -32.893 3.81) (xy -31.877 3.81) (xy -31.877 -3.81)) (layer F.Mask) (width 0))
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||||
(pad 26 smd rect (at 30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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||||
(net 49 GND) (solder_mask_margin 0.635) (clearance 0.254))
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||||
(pad 27 smd rect (at 27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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||||
(net 24 /DMAIN) (solder_mask_margin 0.635) (clearance 0.254))
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||||
(pad 28 smd rect (at 25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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||||
(net 23 /INTIN) (solder_mask_margin 0.635) (clearance 0.254))
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||||
(pad 29 smd rect (at 22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 22 /~NMI) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 30 smd rect (at 20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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||||
(net 21 /~IRQ) (solder_mask_margin 0.635) (clearance 0.254))
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||||
(pad 31 smd rect (at 17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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||||
(net 20 /~RES) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 32 smd rect (at 15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 19 /~INH) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 33 smd rect (at 12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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||||
(net 18 /-12V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 34 smd rect (at 10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 17 /-5V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 35 smd rect (at 7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 16 /COLORREF) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 36 smd rect (at 5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 15 /7M) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 37 smd rect (at 2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 14 /Q3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 38 smd rect (at 0 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 13 /PHI1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 39 smd rect (at -2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 12 /USER1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 40 smd rect (at -5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 11 /PHI0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 41 smd rect (at -7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 10 /~DEVSEL) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 42 smd rect (at -10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 9 /D7) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 43 smd rect (at -12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 8 /D6) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 44 smd rect (at -15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 7 /D5) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 45 smd rect (at -17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 6 /D4) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 46 smd rect (at -20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 5 /D3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 47 smd rect (at -22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 4 /D2) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 48 smd rect (at -25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 3 /D1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 49 smd rect (at -27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 2 /D0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 50 smd rect (at -30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 1 /+12V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 25 smd rect (at 30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 50 +5V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 24 smd rect (at 27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 48 /DMAOUT) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 23 smd rect (at 25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 47 /INTOUT) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 22 smd rect (at 22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 46 /~DMA) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 21 smd rect (at 20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 45 /RDY) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 20 smd rect (at 17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 44 /~IOSTRB) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 19 smd rect (at 15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 43 /SYNC) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 18 smd rect (at 12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 42 /R~W) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 17 smd rect (at 10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 41 /A15) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 16 smd rect (at 7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 40 /A14) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 15 smd rect (at 5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 39 /A13) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 14 smd rect (at 2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 38 /A12) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 13 smd rect (at 0 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 37 /A11) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 12 smd rect (at -2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 36 /A10) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 11 smd rect (at -5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 35 /A9) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 10 smd rect (at -7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 34 /A8) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 9 smd rect (at -10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 33 /A7) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 8 smd rect (at -12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 32 /A6) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 7 smd rect (at -15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 31 /A5) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 6 smd rect (at -17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 30 /A4) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 5 smd rect (at -20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 29 /A3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 4 smd rect (at -22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 28 /A2) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 3 smd rect (at -25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 27 /A1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 2 smd rect (at -27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 26 /A0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 1 smd rect (at -30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 25 /~IOSEL) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
)
|
||||
|
||||
(module Capacitor_THT:C_Disc_D8.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 61011EF7)
|
||||
(at 232.41 115.57 180)
|
||||
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
|
||||
(tags "C Disc series Radial pin pitch 5.00mm diameter 8mm width 2.5mm Capacitor")
|
||||
(path /6103513B)
|
||||
(fp_text reference C1 (at 2.5 -2.5) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value C (at 2.5 2.5) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start 6.75 -1.5) (end -1.75 -1.5) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 6.75 1.5) (end 6.75 -1.5) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.75 1.5) (end 6.75 1.5) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.75 -1.5) (end -1.75 1.5) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 6.62 -1.37) (end 6.62 1.37) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -1.62 -1.37) (end -1.62 1.37) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -1.62 1.37) (end 6.62 1.37) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -1.62 -1.37) (end 6.62 -1.37) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 6.5 -1.25) (end -1.5 -1.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 6.5 1.25) (end 6.5 -1.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -1.5 1.25) (end 6.5 1.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -1.5 -1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 2.5 0) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 50 +5V))
|
||||
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D8.0mm_W2.5mm_P5.00mm.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(module Package_DIP:DIP-48_W15.24mm_Socket_LongPads (layer F.Cu) (tedit 5A02E8C5) (tstamp 6100FFF2)
|
||||
(at 134.62 115.57 90)
|
||||
(descr "48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads")
|
||||
(tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads")
|
||||
(path /6102DC5C)
|
||||
(fp_text reference U1 (at 7.62 -2.33 90) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value IDT7132 (at 7.62 60.75 90) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start 16.8 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 16.8 60) (end 16.8 -1.6) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.55 60) (end 16.8 60) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.55 -1.6) (end -1.55 60) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 16.68 -1.39) (end -1.44 -1.39) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 16.68 59.81) (end 16.68 -1.39) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -1.44 59.81) (end 16.68 59.81) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -1.44 -1.39) (end -1.44 59.81) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 13.68 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 13.68 59.75) (end 13.68 -1.33) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 1.56 59.75) (end 13.68 59.75) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 1.56 -1.33) (end 1.56 59.75) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 6.62 -1.33) (end 1.56 -1.33) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 16.51 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 16.51 59.75) (end 16.51 -1.33) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -1.27 59.75) (end 16.51 59.75) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -1.27 -1.33) (end -1.27 59.75) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.255 59.69) (end 0.255 -0.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 14.985 59.69) (end 0.255 59.69) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 14.985 -1.27) (end 14.985 59.69) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 7.62 29.21 90) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
|
||||
(pad 48 thru_hole oval (at 15.24 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 85 VCC))
|
||||
(pad 24 thru_hole oval (at 0 58.42 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 47 thru_hole oval (at 15.24 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 23 thru_hole oval (at 0 55.88 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 9 /D7))
|
||||
(pad 46 thru_hole oval (at 15.24 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 59 "Net-(U1-Pad46)"))
|
||||
(pad 22 thru_hole oval (at 0 53.34 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 8 /D6))
|
||||
(pad 45 thru_hole oval (at 15.24 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 80 "Net-(U1-Pad45)"))
|
||||
(pad 21 thru_hole oval (at 0 50.8 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 7 /D5))
|
||||
(pad 44 thru_hole oval (at 15.24 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 86 "Net-(U1-Pad44)"))
|
||||
(pad 20 thru_hole oval (at 0 48.26 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 6 /D4))
|
||||
(pad 43 thru_hole oval (at 15.24 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 19 thru_hole oval (at 0 45.72 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 5 /D3))
|
||||
(pad 42 thru_hole oval (at 15.24 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 51 "Net-(U1-Pad42)"))
|
||||
(pad 18 thru_hole oval (at 0 43.18 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 4 /D2))
|
||||
(pad 41 thru_hole oval (at 15.24 17.78 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 77 "Net-(U1-Pad41)"))
|
||||
(pad 17 thru_hole oval (at 0 40.64 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 3 /D1))
|
||||
(pad 40 thru_hole oval (at 15.24 20.32 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 76 "Net-(U1-Pad40)"))
|
||||
(pad 16 thru_hole oval (at 0 38.1 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 2 /D0))
|
||||
(pad 39 thru_hole oval (at 15.24 22.86 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 75 "Net-(U1-Pad39)"))
|
||||
(pad 15 thru_hole oval (at 0 35.56 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 38 thru_hole oval (at 15.24 25.4 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 62 "Net-(U1-Pad38)"))
|
||||
(pad 14 thru_hole oval (at 0 33.02 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 37 thru_hole oval (at 15.24 27.94 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 87 "Net-(U1-Pad37)"))
|
||||
(pad 13 thru_hole oval (at 0 30.48 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 33 /A7))
|
||||
(pad 36 thru_hole oval (at 15.24 30.48 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 88 "Net-(U1-Pad36)"))
|
||||
(pad 12 thru_hole oval (at 0 27.94 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 32 /A6))
|
||||
(pad 35 thru_hole oval (at 15.24 33.02 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 89 "Net-(U1-Pad35)"))
|
||||
(pad 11 thru_hole oval (at 0 25.4 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 31 /A5))
|
||||
(pad 34 thru_hole oval (at 15.24 35.56 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 90 "Net-(U1-Pad34)"))
|
||||
(pad 10 thru_hole oval (at 0 22.86 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 30 /A4))
|
||||
(pad 33 thru_hole oval (at 15.24 38.1 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 91 "Net-(U1-Pad33)"))
|
||||
(pad 9 thru_hole oval (at 0 20.32 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 29 /A3))
|
||||
(pad 32 thru_hole oval (at 15.24 40.64 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 92 /D0R))
|
||||
(pad 8 thru_hole oval (at 0 17.78 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 28 /A2))
|
||||
(pad 31 thru_hole oval (at 15.24 43.18 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 93 /D1R))
|
||||
(pad 7 thru_hole oval (at 0 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 27 /A1))
|
||||
(pad 30 thru_hole oval (at 15.24 45.72 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 94 /D2R))
|
||||
(pad 6 thru_hole oval (at 0 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 26 /A0))
|
||||
(pad 29 thru_hole oval (at 15.24 48.26 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 95 /D3R))
|
||||
(pad 5 thru_hole oval (at 0 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 28 thru_hole oval (at 15.24 50.8 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 96 /D4R))
|
||||
(pad 4 thru_hole oval (at 0 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 49 GND))
|
||||
(pad 27 thru_hole oval (at 15.24 53.34 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 97 /D5R))
|
||||
(pad 3 thru_hole oval (at 0 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 79 "Net-(U1-Pad3)"))
|
||||
(pad 26 thru_hole oval (at 15.24 55.88 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 98 /D6R))
|
||||
(pad 2 thru_hole oval (at 0 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 42 /R~W))
|
||||
(pad 25 thru_hole oval (at 15.24 58.42 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 99 /D7R))
|
||||
(pad 1 thru_hole rect (at 0 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
||||
(net 10 /~DEVSEL))
|
||||
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-48_W15.24mm_Socket.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(module RF_Module:ESP32-WROOM-32 (layer F.Cu) (tedit 5B5B4654) (tstamp 6100E62C)
|
||||
(at 146.05 80.01)
|
||||
(descr "Single 2.4 GHz Wi-Fi and Bluetooth combo chip https://www.espressif.com/sites/default/files/documentation/esp32-wroom-32_datasheet_en.pdf")
|
||||
(tags "Single 2.4 GHz Wi-Fi and Bluetooth combo chip")
|
||||
(path /6102A0B5)
|
||||
(attr smd)
|
||||
(fp_text reference U2 (at -10.61 8.43 90) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value ESP32-WROOM-32 (at 0 11.5) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -9.12 -9.445) (end -9.5 -9.445) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -9.12 -15.865) (end -9.12 -9.445) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 9.12 -15.865) (end 9.12 -9.445) (layer F.SilkS) (width 0.12))
|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start 14 -9.97) (end -14 -9.97) (layer Dwgs.User) (width 0.1))
|
||||
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|
||||
(fp_line (start -8.5 -9.52) (end -9 -10.02) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -9 -9.02) (end -9 9.76) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -14.25 -21) (end 14.25 -21) (layer F.CrtYd) (width 0.05))
|
||||
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|
||||
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|
||||
(fp_line (start -9.75 10.5) (end -9.75 -9.72) (layer F.CrtYd) (width 0.05))
|
||||
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|
||||
(fp_line (start -9 -15.745) (end -9 -10.02) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -9 9.76) (end 9 9.76) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 9 9.76) (end 9 -15.745) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -14 -9.97) (end -14 -20.75) (layer Dwgs.User) (width 0.1))
|
||||
(fp_text user "5 mm" (at 7.8 -19.075 90) (layer Cmts.User)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.1)))
|
||||
)
|
||||
(fp_text user "5 mm" (at -11.2 -14.375) (layer Cmts.User)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.1)))
|
||||
)
|
||||
(fp_text user "5 mm" (at 11.8 -14.375) (layer Cmts.User)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.1)))
|
||||
)
|
||||
(fp_text user Antenna (at 0 -13) (layer Cmts.User)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "KEEP-OUT ZONE" (at 0 -19) (layer Cmts.User)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(pad 38 smd rect (at 8.5 -8.255) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 49 GND))
|
||||
(pad 37 smd rect (at 8.5 -6.985) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 51 "Net-(U1-Pad42)"))
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(pad 26 smd rect (at 8.5 6.985) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(pad 15 smd rect (at -5.715 9.255 90) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 49 GND))
|
||||
(pad 14 smd rect (at -8.5 8.255) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
(pad 13 smd rect (at -8.5 6.985) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
(pad 12 smd rect (at -8.5 5.715) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
(pad 11 smd rect (at -8.5 4.445) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
(pad 10 smd rect (at -8.5 3.175) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
(pad 9 smd rect (at -8.5 1.905) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 25 /~IOSEL))
|
||||
(pad 8 smd rect (at -8.5 0.635) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
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|
||||
(net 79 "Net-(U1-Pad3)"))
|
||||
(pad 6 smd rect (at -8.5 -1.905) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 80 "Net-(U1-Pad45)"))
|
||||
(pad 5 smd rect (at -8.5 -3.175) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
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|
||||
(pad 4 smd rect (at -8.5 -4.445) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 82 "Net-(U2-Pad4)"))
|
||||
(pad 3 smd rect (at -8.5 -5.715) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 83 "Net-(U2-Pad3)"))
|
||||
(pad 2 smd rect (at -8.5 -6.985) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 84 "Net-(U2-Pad2)"))
|
||||
(pad 1 smd rect (at -8.5 -8.255) (size 2 0.9) (layers F.Cu F.Paste F.Mask)
|
||||
(net 49 GND))
|
||||
(pad 39 smd rect (at -1 -0.755) (size 5 5) (layers F.Cu F.Paste F.Mask)
|
||||
(net 49 GND))
|
||||
(model ${KISYS3DMOD}/RF_Module.3dshapes/ESP32-WROOM-32.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(gr_line (start 167.767 124.587) (end 73.66 124.587) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 167.767 132.207) (end 167.767 124.587) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 167.767 132.207) (end 233.553 132.207) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_text "design by Nathanial Hendler, Tucson Arizona" (at 76.2 121.92) (layer F.SilkS) (tstamp 6021F06C)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify left))
|
||||
)
|
||||
(gr_text "rev. 1.1 - 2021/02/08" (at 76.2 120.015) (layer F.SilkS) (tstamp 6021F075)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify left))
|
||||
)
|
||||
(gr_text apple2idiot (at 76.2 116.205) (layer F.SilkS) (tstamp 5E341713)
|
||||
(effects (font (size 3 3) (thickness 0.45)) (justify left))
|
||||
)
|
||||
(gr_line (start 240.03 55.88) (end 240.03 111.76) (layer F.SilkS) (width 0.12) (tstamp 5E3416DC))
|
||||
(gr_line (start 74.93 55.88) (end 240.03 55.88) (layer F.SilkS) (width 0.12))
|
||||
(gr_line (start 74.93 111.76) (end 74.93 55.88) (layer F.SilkS) (width 0.12))
|
||||
(gr_line (start 73.66 54.737) (end 73.66 124.587) (layer Edge.Cuts) (width 0.05) (tstamp 5E34057F))
|
||||
(gr_line (start 241.3 54.737) (end 73.66 54.737) (layer Edge.Cuts) (width 0.05))
|
||||
(gr_line (start 241.3 124.587) (end 241.3 54.737) (layer Edge.Cuts) (width 0.05) (tstamp 5E3416F1))
|
||||
(gr_line (start 233.553 124.587) (end 241.3 124.587) (layer Edge.Cuts) (width 0.05))
|
||||
|
||||
(segment (start 170.18 128.397) (end 170.18 124.222) (width 1) (layer B.Cu) (net 1))
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,240 @@
|
|||
update=Thursday, January 30, 2020 at 10:33:18 PM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.4
|
||||
TrackWidth3=1
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
Binary file not shown.
|
|
@ -0,0 +1,252 @@
|
|||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Connector_Generic_Conn_02x25_Counter_Clockwise
|
||||
#
|
||||
DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
|
||||
F0 "J" 50 1300 50 H V C CNN
|
||||
F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Connector*:*_2x??_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -50 -1195 0 -1205 1 1 6 N
|
||||
S -50 -1095 0 -1105 1 1 6 N
|
||||
S -50 -995 0 -1005 1 1 6 N
|
||||
S -50 -895 0 -905 1 1 6 N
|
||||
S -50 -795 0 -805 1 1 6 N
|
||||
S -50 -695 0 -705 1 1 6 N
|
||||
S -50 -595 0 -605 1 1 6 N
|
||||
S -50 -495 0 -505 1 1 6 N
|
||||
S -50 -395 0 -405 1 1 6 N
|
||||
S -50 -295 0 -305 1 1 6 N
|
||||
S -50 -195 0 -205 1 1 6 N
|
||||
S -50 -95 0 -105 1 1 6 N
|
||||
S -50 5 0 -5 1 1 6 N
|
||||
S -50 105 0 95 1 1 6 N
|
||||
S -50 205 0 195 1 1 6 N
|
||||
S -50 305 0 295 1 1 6 N
|
||||
S -50 405 0 395 1 1 6 N
|
||||
S -50 505 0 495 1 1 6 N
|
||||
S -50 605 0 595 1 1 6 N
|
||||
S -50 705 0 695 1 1 6 N
|
||||
S -50 805 0 795 1 1 6 N
|
||||
S -50 905 0 895 1 1 6 N
|
||||
S -50 1005 0 995 1 1 6 N
|
||||
S -50 1105 0 1095 1 1 6 N
|
||||
S -50 1205 0 1195 1 1 6 N
|
||||
S -50 1250 150 -1250 1 1 10 f
|
||||
S 150 -1195 100 -1205 1 1 6 N
|
||||
S 150 -1095 100 -1105 1 1 6 N
|
||||
S 150 -995 100 -1005 1 1 6 N
|
||||
S 150 -895 100 -905 1 1 6 N
|
||||
S 150 -795 100 -805 1 1 6 N
|
||||
S 150 -695 100 -705 1 1 6 N
|
||||
S 150 -595 100 -605 1 1 6 N
|
||||
S 150 -495 100 -505 1 1 6 N
|
||||
S 150 -395 100 -405 1 1 6 N
|
||||
S 150 -295 100 -305 1 1 6 N
|
||||
S 150 -195 100 -205 1 1 6 N
|
||||
S 150 -95 100 -105 1 1 6 N
|
||||
S 150 5 100 -5 1 1 6 N
|
||||
S 150 105 100 95 1 1 6 N
|
||||
S 150 205 100 195 1 1 6 N
|
||||
S 150 305 100 295 1 1 6 N
|
||||
S 150 405 100 395 1 1 6 N
|
||||
S 150 505 100 495 1 1 6 N
|
||||
S 150 605 100 595 1 1 6 N
|
||||
S 150 705 100 695 1 1 6 N
|
||||
S 150 805 100 795 1 1 6 N
|
||||
S 150 905 100 895 1 1 6 N
|
||||
S 150 1005 100 995 1 1 6 N
|
||||
S 150 1105 100 1095 1 1 6 N
|
||||
S 150 1205 100 1195 1 1 6 N
|
||||
X Pin_1 1 -200 1200 150 R 50 50 1 1 P
|
||||
X Pin_10 10 -200 300 150 R 50 50 1 1 P
|
||||
X Pin_11 11 -200 200 150 R 50 50 1 1 P
|
||||
X Pin_12 12 -200 100 150 R 50 50 1 1 P
|
||||
X Pin_13 13 -200 0 150 R 50 50 1 1 P
|
||||
X Pin_14 14 -200 -100 150 R 50 50 1 1 P
|
||||
X Pin_15 15 -200 -200 150 R 50 50 1 1 P
|
||||
X Pin_16 16 -200 -300 150 R 50 50 1 1 P
|
||||
X Pin_17 17 -200 -400 150 R 50 50 1 1 P
|
||||
X Pin_18 18 -200 -500 150 R 50 50 1 1 P
|
||||
X Pin_19 19 -200 -600 150 R 50 50 1 1 P
|
||||
X Pin_2 2 -200 1100 150 R 50 50 1 1 P
|
||||
X Pin_20 20 -200 -700 150 R 50 50 1 1 P
|
||||
X Pin_21 21 -200 -800 150 R 50 50 1 1 P
|
||||
X Pin_22 22 -200 -900 150 R 50 50 1 1 P
|
||||
X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
|
||||
X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
|
||||
X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
|
||||
X Pin_26 26 300 -1200 150 L 50 50 1 1 P
|
||||
X Pin_27 27 300 -1100 150 L 50 50 1 1 P
|
||||
X Pin_28 28 300 -1000 150 L 50 50 1 1 P
|
||||
X Pin_29 29 300 -900 150 L 50 50 1 1 P
|
||||
X Pin_3 3 -200 1000 150 R 50 50 1 1 P
|
||||
X Pin_30 30 300 -800 150 L 50 50 1 1 P
|
||||
X Pin_31 31 300 -700 150 L 50 50 1 1 P
|
||||
X Pin_32 32 300 -600 150 L 50 50 1 1 P
|
||||
X Pin_33 33 300 -500 150 L 50 50 1 1 P
|
||||
X Pin_34 34 300 -400 150 L 50 50 1 1 P
|
||||
X Pin_35 35 300 -300 150 L 50 50 1 1 P
|
||||
X Pin_36 36 300 -200 150 L 50 50 1 1 P
|
||||
X Pin_37 37 300 -100 150 L 50 50 1 1 P
|
||||
X Pin_38 38 300 0 150 L 50 50 1 1 P
|
||||
X Pin_39 39 300 100 150 L 50 50 1 1 P
|
||||
X Pin_4 4 -200 900 150 R 50 50 1 1 P
|
||||
X Pin_40 40 300 200 150 L 50 50 1 1 P
|
||||
X Pin_41 41 300 300 150 L 50 50 1 1 P
|
||||
X Pin_42 42 300 400 150 L 50 50 1 1 P
|
||||
X Pin_43 43 300 500 150 L 50 50 1 1 P
|
||||
X Pin_44 44 300 600 150 L 50 50 1 1 P
|
||||
X Pin_45 45 300 700 150 L 50 50 1 1 P
|
||||
X Pin_46 46 300 800 150 L 50 50 1 1 P
|
||||
X Pin_47 47 300 900 150 L 50 50 1 1 P
|
||||
X Pin_48 48 300 1000 150 L 50 50 1 1 P
|
||||
X Pin_49 49 300 1100 150 L 50 50 1 1 P
|
||||
X Pin_5 5 -200 800 150 R 50 50 1 1 P
|
||||
X Pin_50 50 300 1200 150 L 50 50 1 1 P
|
||||
X Pin_6 6 -200 700 150 R 50 50 1 1 P
|
||||
X Pin_7 7 -200 600 150 R 50 50 1 1 P
|
||||
X Pin_8 8 -200 500 150 R 50 50 1 1 P
|
||||
X Pin_9 9 -200 400 150 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Memory_RAM_IDT7132
|
||||
#
|
||||
DEF Memory_RAM_IDT7132 U 0 20 Y Y 1 F N
|
||||
F0 "U" 0 100 50 H V C CNN
|
||||
F1 "Memory_RAM_IDT7132" 0 -100 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
S -600 -1400 600 1400 0 1 10 f
|
||||
X /CEL 1 -900 1200 300 R 50 50 1 1 I
|
||||
X A4L 10 -900 300 300 R 50 50 1 1 I
|
||||
X A5L 11 -900 200 300 R 50 50 1 1 I
|
||||
X A6L 12 -900 100 300 R 50 50 1 1 I
|
||||
X A7L 13 -900 0 300 R 50 50 1 1 I
|
||||
X A8L 14 -900 -100 300 R 50 50 1 1 I
|
||||
X A9L 15 -900 -200 300 R 50 50 1 1 I
|
||||
X I/O0L 16 -900 -500 300 R 50 50 1 1 I
|
||||
X I/O1L 17 -900 -600 300 R 50 50 1 1 I
|
||||
X I/O2L 18 -900 -700 300 R 50 50 1 1 I
|
||||
X I/O3L 19 -900 -800 300 R 50 50 1 1 I
|
||||
X R/WL 2 -900 1100 300 R 50 50 1 1 I
|
||||
X I/O4L 20 -900 -900 300 R 50 50 1 1 I
|
||||
X I/O5L 21 -900 -1000 300 R 50 50 1 1 I
|
||||
X I/O6L 22 -900 -1100 300 R 50 50 1 1 I
|
||||
X I/O7L 23 -900 -1200 300 R 50 50 1 1 I
|
||||
X GND 24 0 -1400 0 U 50 50 1 1 W N
|
||||
X I/O0R 25 900 -1200 300 L 50 50 1 1 I
|
||||
X I/O1R 26 900 -1100 300 L 50 50 1 1 I
|
||||
X I/O2R 27 900 -1000 300 L 50 50 1 1 I
|
||||
X I/O3R 28 900 -900 300 L 50 50 1 1 I
|
||||
X I/O4R 29 900 -800 300 L 50 50 1 1 I
|
||||
X /BSYL 3 -900 1000 300 R 50 50 1 1 O
|
||||
X I/O5R 30 900 -700 300 L 50 50 1 1 I
|
||||
X I/O6R 31 900 -600 300 L 50 50 1 1 I
|
||||
X I/O7R 32 900 -500 300 L 50 50 1 1 I
|
||||
X A9R 33 900 -200 300 L 50 50 1 1 I
|
||||
X A8R 34 900 -100 300 L 50 50 1 1 I
|
||||
X A7R 35 900 0 300 L 50 50 1 1 I
|
||||
X A6R 36 900 100 300 L 50 50 1 1 I
|
||||
X A5R 37 900 200 300 L 50 50 1 1 I
|
||||
X A4R 38 900 300 300 L 50 50 1 1 I
|
||||
X A3R 39 900 400 300 L 50 50 1 1 I
|
||||
X A10L 4 -900 -300 300 R 50 50 1 1 I
|
||||
X A2R 40 900 500 300 L 50 50 1 1 I
|
||||
X A1R 41 900 600 300 L 50 50 1 1 I
|
||||
X A0R 42 900 700 300 L 50 50 1 1 I
|
||||
X /OER 43 900 900 300 L 50 50 1 1 I
|
||||
X A10R 44 900 -300 300 L 50 50 1 1 I
|
||||
X /BSYR 45 900 1000 300 L 50 50 1 1 O
|
||||
X R/WR 46 900 1100 300 L 50 50 1 1 I
|
||||
X /CER 47 900 1200 300 L 50 50 1 1 I
|
||||
X VCC 48 0 1400 0 U 50 50 1 1 W N
|
||||
X /OEL 5 -900 900 300 R 50 50 1 1 I
|
||||
X A0L 6 -900 700 300 R 50 50 1 1 I
|
||||
X A1L 7 -900 600 300 R 50 50 1 1 I
|
||||
X A2L 8 -900 500 300 R 50 50 1 1 I
|
||||
X A3L 9 -900 400 300 R 50 50 1 1 I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# RF_Module_ESP32-WROOM-32
|
||||
#
|
||||
DEF RF_Module_ESP32-WROOM-32 U 0 20 Y Y 1 F N
|
||||
F0 "U" -500 1350 50 H V L CNN
|
||||
F1 "RF_Module_ESP32-WROOM-32" 50 1350 50 H V L CNN
|
||||
F2 "RF_Module:ESP32-WROOM-32" 0 -1500 50 H I C CNN
|
||||
F3 "" -300 50 50 H I C CNN
|
||||
ALIAS ESP32-WROOM-32D
|
||||
$FPLIST
|
||||
ESP32?WROOM?32*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -500 1300 500 -1300 0 1 10 f
|
||||
X GND 1 0 -1400 100 U 50 50 1 1 W
|
||||
X IO25 10 600 -500 100 L 50 50 1 1 B
|
||||
X IO26 11 600 -600 100 L 50 50 1 1 B
|
||||
X IO27 12 600 -700 100 L 50 50 1 1 B
|
||||
X IO14 13 600 400 100 L 50 50 1 1 B
|
||||
X IO12 14 600 600 100 L 50 50 1 1 B
|
||||
X GND 15 0 -1400 100 U 50 50 1 1 P N
|
||||
X IO13 16 600 500 100 L 50 50 1 1 B
|
||||
X SHD/SD2 17 -600 -200 100 R 50 50 1 1 B
|
||||
X SWP/SD3 18 -600 -300 100 R 50 50 1 1 B
|
||||
X SCS/CMD 19 -600 -500 100 R 50 50 1 1 B
|
||||
X VDD 2 0 1400 100 D 50 50 1 1 W
|
||||
X SCK/CLK 20 -600 -400 100 R 50 50 1 1 B
|
||||
X SDO/SD0 21 -600 0 100 R 50 50 1 1 B
|
||||
X SDI/SD1 22 -600 -100 100 R 50 50 1 1 B
|
||||
X IO15 23 600 300 100 L 50 50 1 1 B
|
||||
X IO2 24 600 1000 100 L 50 50 1 1 B
|
||||
X IO0 25 600 1200 100 L 50 50 1 1 B
|
||||
X IO4 26 600 800 100 L 50 50 1 1 B
|
||||
X IO16 27 600 200 100 L 50 50 1 1 B
|
||||
X IO17 28 600 100 100 L 50 50 1 1 B
|
||||
X IO5 29 600 700 100 L 50 50 1 1 B
|
||||
X EN 3 -600 1200 100 R 50 50 1 1 I
|
||||
X IO18 30 600 0 100 L 50 50 1 1 B
|
||||
X IO19 31 600 -100 100 L 50 50 1 1 B
|
||||
X NC 32 -500 -1100 100 R 50 50 1 1 N N
|
||||
X IO21 33 600 -200 100 L 50 50 1 1 B
|
||||
X RXD0/IO3 34 600 900 100 L 50 50 1 1 B
|
||||
X TXD0/IO1 35 600 1100 100 L 50 50 1 1 B
|
||||
X IO22 36 600 -300 100 L 50 50 1 1 B
|
||||
X IO23 37 600 -400 100 L 50 50 1 1 B
|
||||
X GND 38 0 -1400 100 U 50 50 1 1 P N
|
||||
X GND 39 0 -1400 100 U 50 50 1 1 P N
|
||||
X SENSOR_VP 4 -600 1000 100 R 50 50 1 1 I
|
||||
X SENSOR_VN 5 -600 900 100 R 50 50 1 1 I
|
||||
X IO34 6 600 -1000 100 L 50 50 1 1 I
|
||||
X IO35 7 600 -1100 100 L 50 50 1 1 I
|
||||
X IO32 8 600 -800 100 L 50 50 1 1 B
|
||||
X IO33 9 600 -900 100 L 50 50 1 1 B
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,798 @@
|
|||
(kicad_pcb (version 20171130) (host pcbnew "(5.1.5-0-10_14)")
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
(drawings 70)
|
||||
(tracks 152)
|
||||
(zones 0)
|
||||
(modules 2)
|
||||
(nets 51)
|
||||
)
|
||||
|
||||
(page A4)
|
||||
(title_block
|
||||
(title "Apple II Breadboard Card")
|
||||
(date 2021-02-08)
|
||||
(rev 1.1)
|
||||
(company "Renee Harke")
|
||||
(comment 1 "MIT license; see LICENSE file")
|
||||
)
|
||||
|
||||
(layers
|
||||
(0 F.Cu signal)
|
||||
(31 B.Cu signal)
|
||||
(32 B.Adhes user)
|
||||
(33 F.Adhes user)
|
||||
(34 B.Paste user)
|
||||
(35 F.Paste user)
|
||||
(36 B.SilkS user)
|
||||
(37 F.SilkS user)
|
||||
(38 B.Mask user)
|
||||
(39 F.Mask user)
|
||||
(40 Dwgs.User user)
|
||||
(41 Cmts.User user)
|
||||
(42 Eco1.User user)
|
||||
(43 Eco2.User user)
|
||||
(44 Edge.Cuts user)
|
||||
(45 Margin user)
|
||||
(46 B.CrtYd user)
|
||||
(47 F.CrtYd user)
|
||||
(48 B.Fab user)
|
||||
(49 F.Fab user)
|
||||
)
|
||||
|
||||
(setup
|
||||
(last_trace_width 0.25)
|
||||
(user_trace_width 0.4)
|
||||
(user_trace_width 1)
|
||||
(trace_clearance 0.2)
|
||||
(zone_clearance 0.508)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.2)
|
||||
(via_size 0.8)
|
||||
(via_drill 0.4)
|
||||
(via_min_size 0.4)
|
||||
(via_min_drill 0.3)
|
||||
(uvia_size 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
|
||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(edge_width 0.05)
|
||||
(segment_width 0.2)
|
||||
(pcb_text_width 0.3)
|
||||
(pcb_text_size 1.5 1.5)
|
||||
(mod_edge_width 0.12)
|
||||
(mod_text_size 1 1)
|
||||
(mod_text_width 0.15)
|
||||
(pad_size 1.524 1.524)
|
||||
(pad_drill 0.762)
|
||||
(pad_to_mask_clearance 0.051)
|
||||
(solder_mask_min_width 0.25)
|
||||
(aux_axis_origin 0 0)
|
||||
(visible_elements FFFFFF7F)
|
||||
(pcbplotparams
|
||||
(layerselection 0x3ffff_ffffffff)
|
||||
(usegerberextensions false)
|
||||
(usegerberattributes false)
|
||||
(usegerberadvancedattributes false)
|
||||
(creategerberjobfile false)
|
||||
(excludeedgelayer true)
|
||||
(linewidth 0.100000)
|
||||
(plotframeref false)
|
||||
(viasonmask false)
|
||||
(mode 1)
|
||||
(useauxorigin false)
|
||||
(hpglpennumber 1)
|
||||
(hpglpenspeed 20)
|
||||
(hpglpendiameter 15.000000)
|
||||
(psnegative false)
|
||||
(psa4output false)
|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
(plotinvisibletext false)
|
||||
(padsonsilk false)
|
||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 0)
|
||||
(scaleselection 1)
|
||||
(outputdirectory "gerber"))
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
(net 1 /+12V)
|
||||
(net 2 /D0)
|
||||
(net 3 /D1)
|
||||
(net 4 /D2)
|
||||
(net 5 /D3)
|
||||
(net 6 /D4)
|
||||
(net 7 /D5)
|
||||
(net 8 /D6)
|
||||
(net 9 /D7)
|
||||
(net 10 /~DEVSEL)
|
||||
(net 11 /PHI0)
|
||||
(net 12 /USER1)
|
||||
(net 13 /PHI1)
|
||||
(net 14 /Q3)
|
||||
(net 15 /7M)
|
||||
(net 16 /COLORREF)
|
||||
(net 17 /-5V)
|
||||
(net 18 /-12V)
|
||||
(net 19 /~INH)
|
||||
(net 20 /~RES)
|
||||
(net 21 /~IRQ)
|
||||
(net 22 /~NMI)
|
||||
(net 23 /INTIN)
|
||||
(net 24 /DMAIN)
|
||||
(net 25 /GND)
|
||||
(net 26 /~IOSEL)
|
||||
(net 27 /A0)
|
||||
(net 28 /A1)
|
||||
(net 29 /A2)
|
||||
(net 30 /A3)
|
||||
(net 31 /A4)
|
||||
(net 32 /A5)
|
||||
(net 33 /A6)
|
||||
(net 34 /A7)
|
||||
(net 35 /A8)
|
||||
(net 36 /A9)
|
||||
(net 37 /A10)
|
||||
(net 38 /A11)
|
||||
(net 39 /A12)
|
||||
(net 40 /A13)
|
||||
(net 41 /A14)
|
||||
(net 42 /A15)
|
||||
(net 43 /R~W)
|
||||
(net 44 /SYNC)
|
||||
(net 45 /~IOSTRB)
|
||||
(net 46 /RDY)
|
||||
(net 47 /~DMA)
|
||||
(net 48 /INTOUT)
|
||||
(net 49 /DMAOUT)
|
||||
(net 50 /+5V)
|
||||
|
||||
(net_class Default "This is the default net class."
|
||||
(clearance 0.2)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.8)
|
||||
(via_drill 0.4)
|
||||
(uvia_dia 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(add_net /+12V)
|
||||
(add_net /+5V)
|
||||
(add_net /-12V)
|
||||
(add_net /-5V)
|
||||
(add_net /7M)
|
||||
(add_net /A0)
|
||||
(add_net /A1)
|
||||
(add_net /A10)
|
||||
(add_net /A11)
|
||||
(add_net /A12)
|
||||
(add_net /A13)
|
||||
(add_net /A14)
|
||||
(add_net /A15)
|
||||
(add_net /A2)
|
||||
(add_net /A3)
|
||||
(add_net /A4)
|
||||
(add_net /A5)
|
||||
(add_net /A6)
|
||||
(add_net /A7)
|
||||
(add_net /A8)
|
||||
(add_net /A9)
|
||||
(add_net /COLORREF)
|
||||
(add_net /D0)
|
||||
(add_net /D1)
|
||||
(add_net /D2)
|
||||
(add_net /D3)
|
||||
(add_net /D4)
|
||||
(add_net /D5)
|
||||
(add_net /D6)
|
||||
(add_net /D7)
|
||||
(add_net /DMAIN)
|
||||
(add_net /DMAOUT)
|
||||
(add_net /GND)
|
||||
(add_net /INTIN)
|
||||
(add_net /INTOUT)
|
||||
(add_net /PHI0)
|
||||
(add_net /PHI1)
|
||||
(add_net /Q3)
|
||||
(add_net /RDY)
|
||||
(add_net /R~W)
|
||||
(add_net /SYNC)
|
||||
(add_net /USER1)
|
||||
(add_net /~DEVSEL)
|
||||
(add_net /~DMA)
|
||||
(add_net /~INH)
|
||||
(add_net /~IOSEL)
|
||||
(add_net /~IOSTRB)
|
||||
(add_net /~IRQ)
|
||||
(add_net /~NMI)
|
||||
(add_net /~RES)
|
||||
)
|
||||
|
||||
(module pub:PinSocket_2x25_P2.54mm_Vertical_CCW_Mirrored_NoSilk (layer F.Cu) (tedit 6021F101) (tstamp 5E33EBBE)
|
||||
(at 170.18 116.84 90)
|
||||
(descr "Through hole straight socket strip, 2x25, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated")
|
||||
(tags "Through hole socket strip THT 2x25 2.54mm double row")
|
||||
(path /5E39109E)
|
||||
(fp_text reference J2 (at -1.27 -2.77 90) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "HEADER BLOCK" (at -1.27 63.73 90) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user %R (at -1.27 30.48) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start 1.8 62.7) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -4.3 62.7) (end 1.8 62.7) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -4.3 -1.8) (end -4.3 62.7) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.8 -1.8) (end -4.3 -1.8) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.27 62.23) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -3.81 62.23) (end 1.27 62.23) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -3.81 -1.27) (end -3.81 62.23) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 1.27 -1.27) (end -3.81 -1.27) (layer F.Fab) (width 0.1))
|
||||
(pad 26 thru_hole oval (at 0 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 25 /GND))
|
||||
(pad 25 thru_hole oval (at -2.54 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 50 /+5V))
|
||||
(pad 27 thru_hole oval (at 0 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 24 /DMAIN))
|
||||
(pad 24 thru_hole oval (at -2.54 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 49 /DMAOUT))
|
||||
(pad 28 thru_hole oval (at 0 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 23 /INTIN))
|
||||
(pad 23 thru_hole oval (at -2.54 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 48 /INTOUT))
|
||||
(pad 29 thru_hole oval (at 0 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 22 /~NMI))
|
||||
(pad 22 thru_hole oval (at -2.54 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 47 /~DMA))
|
||||
(pad 30 thru_hole oval (at 0 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 21 /~IRQ))
|
||||
(pad 21 thru_hole oval (at -2.54 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 46 /RDY))
|
||||
(pad 31 thru_hole oval (at 0 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 20 /~RES))
|
||||
(pad 20 thru_hole oval (at -2.54 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 45 /~IOSTRB))
|
||||
(pad 32 thru_hole oval (at 0 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 19 /~INH))
|
||||
(pad 19 thru_hole oval (at -2.54 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 44 /SYNC))
|
||||
(pad 33 thru_hole oval (at 0 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 18 /-12V))
|
||||
(pad 18 thru_hole oval (at -2.54 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 43 /R~W))
|
||||
(pad 34 thru_hole oval (at 0 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 17 /-5V))
|
||||
(pad 17 thru_hole oval (at -2.54 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 42 /A15))
|
||||
(pad 35 thru_hole oval (at 0 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 16 /COLORREF))
|
||||
(pad 16 thru_hole oval (at -2.54 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 41 /A14))
|
||||
(pad 36 thru_hole oval (at 0 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 15 /7M))
|
||||
(pad 15 thru_hole oval (at -2.54 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 40 /A13))
|
||||
(pad 37 thru_hole oval (at 0 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 14 /Q3))
|
||||
(pad 14 thru_hole oval (at -2.54 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 39 /A12))
|
||||
(pad 38 thru_hole oval (at 0 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 13 /PHI1))
|
||||
(pad 13 thru_hole oval (at -2.54 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 38 /A11))
|
||||
(pad 39 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 12 /USER1))
|
||||
(pad 12 thru_hole oval (at -2.54 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 37 /A10))
|
||||
(pad 40 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 11 /PHI0))
|
||||
(pad 11 thru_hole oval (at -2.54 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 36 /A9))
|
||||
(pad 41 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 10 /~DEVSEL))
|
||||
(pad 10 thru_hole oval (at -2.54 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 35 /A8))
|
||||
(pad 42 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 9 /D7))
|
||||
(pad 9 thru_hole oval (at -2.54 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 34 /A7))
|
||||
(pad 43 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 8 /D6))
|
||||
(pad 8 thru_hole oval (at -2.54 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 33 /A6))
|
||||
(pad 44 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 7 /D5))
|
||||
(pad 7 thru_hole oval (at -2.54 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 32 /A5))
|
||||
(pad 45 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 6 /D4))
|
||||
(pad 6 thru_hole oval (at -2.54 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 31 /A4))
|
||||
(pad 46 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 5 /D3))
|
||||
(pad 5 thru_hole oval (at -2.54 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 30 /A3))
|
||||
(pad 47 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 4 /D2))
|
||||
(pad 4 thru_hole oval (at -2.54 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 29 /A2))
|
||||
(pad 48 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 3 /D1))
|
||||
(pad 3 thru_hole oval (at -2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 28 /A1))
|
||||
(pad 49 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 2 /D0))
|
||||
(pad 2 thru_hole oval (at -2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 27 /A0))
|
||||
(pad 50 thru_hole oval (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 1 /+12V))
|
||||
(pad 1 thru_hole oval (at -2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
||||
(net 26 /~IOSEL))
|
||||
(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x25_P2.54mm_Vertical.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(module pub:AppleIIBus (layer F.Cu) (tedit 5E4F43C2) (tstamp 5E33EA12)
|
||||
(at 200.66 128.397)
|
||||
(path /5E339C7A)
|
||||
(fp_text reference J1 (at 0 -5.08) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "CARD EDGE" (at 25.4 -5.08) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer B.Mask) (width 0))
|
||||
(fp_poly (pts (xy -32.893 -3.81) (xy -32.893 3.81) (xy -31.877 3.81) (xy -31.877 -3.81)) (layer B.Mask) (width 0))
|
||||
(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer F.Mask) (width 0))
|
||||
(fp_poly (pts (xy -32.893 -3.81) (xy -32.893 3.81) (xy -31.877 3.81) (xy -31.877 -3.81)) (layer F.Mask) (width 0))
|
||||
(pad 26 smd rect (at 30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 25 /GND) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 27 smd rect (at 27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 24 /DMAIN) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 28 smd rect (at 25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 23 /INTIN) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 29 smd rect (at 22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 22 /~NMI) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 30 smd rect (at 20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 21 /~IRQ) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 31 smd rect (at 17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 20 /~RES) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 32 smd rect (at 15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 19 /~INH) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 33 smd rect (at 12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 18 /-12V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 34 smd rect (at 10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 17 /-5V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 35 smd rect (at 7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 16 /COLORREF) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 36 smd rect (at 5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 15 /7M) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 37 smd rect (at 2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 14 /Q3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 38 smd rect (at 0 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 13 /PHI1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 39 smd rect (at -2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 12 /USER1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 40 smd rect (at -5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 11 /PHI0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 41 smd rect (at -7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 10 /~DEVSEL) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 42 smd rect (at -10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 9 /D7) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 43 smd rect (at -12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 8 /D6) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 44 smd rect (at -15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 7 /D5) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 45 smd rect (at -17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 6 /D4) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 46 smd rect (at -20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 5 /D3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 47 smd rect (at -22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 4 /D2) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 48 smd rect (at -25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 3 /D1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 49 smd rect (at -27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 2 /D0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 50 smd rect (at -30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
|
||||
(net 1 /+12V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 25 smd rect (at 30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 50 /+5V) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 24 smd rect (at 27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 49 /DMAOUT) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 23 smd rect (at 25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 48 /INTOUT) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 22 smd rect (at 22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 47 /~DMA) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 21 smd rect (at 20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 46 /RDY) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 20 smd rect (at 17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 45 /~IOSTRB) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 19 smd rect (at 15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 44 /SYNC) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 18 smd rect (at 12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 43 /R~W) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 17 smd rect (at 10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 42 /A15) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 16 smd rect (at 7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 41 /A14) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 15 smd rect (at 5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 40 /A13) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 14 smd rect (at 2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 39 /A12) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 13 smd rect (at 0 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 38 /A11) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 12 smd rect (at -2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 37 /A10) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 11 smd rect (at -5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 36 /A9) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 10 smd rect (at -7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 35 /A8) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 9 smd rect (at -10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 34 /A7) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 8 smd rect (at -12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 33 /A6) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 7 smd rect (at -15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 32 /A5) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 6 smd rect (at -17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 31 /A4) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 5 smd rect (at -20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 30 /A3) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 4 smd rect (at -22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 29 /A2) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 3 smd rect (at -25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 28 /A1) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 2 smd rect (at -27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 27 /A0) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
(pad 1 smd rect (at -30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
||||
(net 26 /~IOSEL) (solder_mask_margin 0.635) (clearance 0.254))
|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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||||
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|
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||||
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|
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|
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|
||||
)
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
update=22/05/2015 07:44:53
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||||
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|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
|
|
@ -0,0 +1,660 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title "apple2idiot"
|
||||
Date "2021-07-27"
|
||||
Rev "0.0.1"
|
||||
Comp "Nathanial Hendler"
|
||||
Comment1 "MIT license; see LICENSE file"
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L Connector_Generic:Conn_02x25_Counter_Clockwise J1
|
||||
U 1 1 5E339C7A
|
||||
P 2000 3300
|
||||
F 0 "J1" H 2050 4717 50 0000 C CNN
|
||||
F 1 "CARD EDGE" H 2050 4626 50 0000 C CNN
|
||||
F 2 "pub:AppleIIBus" H 2000 3300 50 0001 C CNN
|
||||
F 3 "~" H 2000 3300 50 0001 C CNN
|
||||
1 2000 3300
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Label 1750 2100 2 50 ~ 0
|
||||
~IOSEL
|
||||
Text Label 1750 2200 2 50 ~ 0
|
||||
A0
|
||||
Text Label 1750 2300 2 50 ~ 0
|
||||
A1
|
||||
Text Label 1750 2400 2 50 ~ 0
|
||||
A2
|
||||
Text Label 1750 2500 2 50 ~ 0
|
||||
A3
|
||||
Text Label 1750 2600 2 50 ~ 0
|
||||
A4
|
||||
Text Label 1750 2700 2 50 ~ 0
|
||||
A5
|
||||
Text Label 1750 2800 2 50 ~ 0
|
||||
A6
|
||||
Text Label 1750 2900 2 50 ~ 0
|
||||
A7
|
||||
Text Label 1750 3000 2 50 ~ 0
|
||||
A8
|
||||
Text Label 1750 3100 2 50 ~ 0
|
||||
A9
|
||||
Text Label 1750 3200 2 50 ~ 0
|
||||
A10
|
||||
Text Label 1750 3300 2 50 ~ 0
|
||||
A11
|
||||
Text Label 1750 3400 2 50 ~ 0
|
||||
A12
|
||||
Text Label 1750 3500 2 50 ~ 0
|
||||
A13
|
||||
Text Label 1750 3600 2 50 ~ 0
|
||||
A14
|
||||
Text Label 1750 3700 2 50 ~ 0
|
||||
A15
|
||||
Text Label 1750 3800 2 50 ~ 0
|
||||
R~W
|
||||
Text Label 1750 3900 2 50 ~ 0
|
||||
SYNC
|
||||
Text Label 1750 4000 2 50 ~ 0
|
||||
~IOSTRB
|
||||
Text Label 1750 4100 2 50 ~ 0
|
||||
RDY
|
||||
Text Label 1750 4200 2 50 ~ 0
|
||||
~DMA
|
||||
Text Label 1750 4300 2 50 ~ 0
|
||||
INTOUT
|
||||
Text Label 1750 4400 2 50 ~ 0
|
||||
DMAOUT
|
||||
Text Label 1750 4500 2 50 ~ 0
|
||||
+5V
|
||||
Text Label 2350 4500 0 50 ~ 0
|
||||
GND
|
||||
Text Label 2350 4400 0 50 ~ 0
|
||||
DMAIN
|
||||
Text Label 2350 4300 0 50 ~ 0
|
||||
INTIN
|
||||
Text Label 2350 4200 0 50 ~ 0
|
||||
~NMI
|
||||
Text Label 2350 4100 0 50 ~ 0
|
||||
~IRQ
|
||||
Text Label 2350 4000 0 50 ~ 0
|
||||
~RES
|
||||
Text Label 2350 3900 0 50 ~ 0
|
||||
~INH
|
||||
Text Label 2350 3800 0 50 ~ 0
|
||||
-12V
|
||||
Text Label 2350 3700 0 50 ~ 0
|
||||
-5V
|
||||
Text Label 2350 3500 0 50 ~ 0
|
||||
7M
|
||||
Text Label 2350 3400 0 50 ~ 0
|
||||
Q3
|
||||
Text Label 2350 3300 0 50 ~ 0
|
||||
PHI1
|
||||
Text Label 2350 3200 0 50 ~ 0
|
||||
USER1
|
||||
Text Label 2350 3100 0 50 ~ 0
|
||||
PHI0
|
||||
Text Label 2350 3000 0 50 ~ 0
|
||||
~DEVSEL
|
||||
Text Label 2350 2100 0 50 ~ 0
|
||||
+12V
|
||||
Text Label 2350 2200 0 50 ~ 0
|
||||
D0
|
||||
Text Label 2350 2300 0 50 ~ 0
|
||||
D1
|
||||
Text Label 2350 2400 0 50 ~ 0
|
||||
D2
|
||||
Text Label 2350 2500 0 50 ~ 0
|
||||
D3
|
||||
Text Label 2350 2600 0 50 ~ 0
|
||||
D4
|
||||
Text Label 2350 2700 0 50 ~ 0
|
||||
D5
|
||||
Text Label 2350 2800 0 50 ~ 0
|
||||
D6
|
||||
Text Label 2350 2900 0 50 ~ 0
|
||||
D7
|
||||
Wire Wire Line
|
||||
2300 2100 2800 2100
|
||||
Wire Wire Line
|
||||
2300 3100 2800 3100
|
||||
Wire Wire Line
|
||||
2300 3200 2800 3200
|
||||
Wire Wire Line
|
||||
2300 3300 2800 3300
|
||||
Wire Wire Line
|
||||
2300 3400 2800 3400
|
||||
Wire Wire Line
|
||||
2300 3500 2800 3500
|
||||
Wire Wire Line
|
||||
2300 3600 2800 3600
|
||||
Wire Wire Line
|
||||
2300 3700 2800 3700
|
||||
Wire Wire Line
|
||||
2300 3800 2800 3800
|
||||
Wire Wire Line
|
||||
2300 3900 2800 3900
|
||||
Wire Wire Line
|
||||
2300 4000 2800 4000
|
||||
Wire Wire Line
|
||||
2300 4100 2800 4100
|
||||
Wire Wire Line
|
||||
2300 4200 2800 4200
|
||||
Wire Wire Line
|
||||
2300 4300 2800 4300
|
||||
Wire Wire Line
|
||||
2300 4400 2800 4400
|
||||
Text Label 2350 3600 0 50 ~ 0
|
||||
COLORREF
|
||||
Wire Wire Line
|
||||
1800 2100 1300 2100
|
||||
Wire Wire Line
|
||||
1800 3000 1300 3000
|
||||
Wire Wire Line
|
||||
1800 3100 1300 3100
|
||||
Wire Wire Line
|
||||
1800 3200 1300 3200
|
||||
Wire Wire Line
|
||||
1800 3300 1300 3300
|
||||
Wire Wire Line
|
||||
1800 3400 1300 3400
|
||||
Wire Wire Line
|
||||
1800 3500 1300 3500
|
||||
Wire Wire Line
|
||||
1800 3600 1300 3600
|
||||
Wire Wire Line
|
||||
1800 3700 1300 3700
|
||||
Wire Wire Line
|
||||
1800 3900 1300 3900
|
||||
Wire Wire Line
|
||||
1800 4000 1300 4000
|
||||
Wire Wire Line
|
||||
1800 4100 1300 4100
|
||||
Wire Wire Line
|
||||
1800 4200 1300 4200
|
||||
Wire Wire Line
|
||||
1800 4300 1300 4300
|
||||
Wire Wire Line
|
||||
1800 4400 1300 4400
|
||||
$Comp
|
||||
L RF_Module:ESP32-WROOM-32 U2
|
||||
U 1 1 6102A0B5
|
||||
P 9750 2350
|
||||
F 0 "U2" H 10200 1000 50 0000 C CNN
|
||||
F 1 "ESP32-WROOM-32" H 9350 3700 50 0000 C CNN
|
||||
F 2 "RF_Module:ESP32-WROOM-32" H 9750 850 50 0001 C CNN
|
||||
F 3 "https://www.espressif.com/sites/default/files/documentation/esp32-wroom-32_datasheet_en.pdf" H 9450 2400 50 0001 C CNN
|
||||
1 9750 2350
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:C C1
|
||||
U 1 1 6103513B
|
||||
P 1000 5850
|
||||
F 0 "C1" H 1115 5896 50 0000 L CNN
|
||||
F 1 "C" H 1115 5805 50 0000 L CNN
|
||||
F 2 "Capacitor_THT:C_Disc_D8.0mm_W2.5mm_P5.00mm" H 1038 5700 50 0001 C CNN
|
||||
F 3 "~" H 1000 5850 50 0001 C CNN
|
||||
1 1000 5850
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Entry Wire Line
|
||||
3050 2200 3150 2300
|
||||
Entry Wire Line
|
||||
3050 2300 3150 2400
|
||||
Entry Wire Line
|
||||
3050 2400 3150 2500
|
||||
Entry Wire Line
|
||||
3050 2500 3150 2600
|
||||
Entry Wire Line
|
||||
3050 2600 3150 2700
|
||||
Entry Wire Line
|
||||
3050 2700 3150 2800
|
||||
Entry Wire Line
|
||||
3050 2800 3150 2900
|
||||
Entry Wire Line
|
||||
3050 2900 3150 3000
|
||||
Entry Wire Line
|
||||
4800 2750 4900 2850
|
||||
Entry Wire Line
|
||||
4800 2850 4900 2950
|
||||
Entry Wire Line
|
||||
4800 2950 4900 3050
|
||||
Entry Wire Line
|
||||
4800 3050 4900 3150
|
||||
Entry Wire Line
|
||||
4800 3150 4900 3250
|
||||
Entry Wire Line
|
||||
4800 3250 4900 3350
|
||||
Entry Wire Line
|
||||
4800 3350 4900 3450
|
||||
Entry Wire Line
|
||||
4800 3450 4900 3550
|
||||
Wire Wire Line
|
||||
4900 2850 5100 2850
|
||||
Wire Wire Line
|
||||
4900 2950 5100 2950
|
||||
Wire Wire Line
|
||||
4900 3050 5100 3050
|
||||
Wire Wire Line
|
||||
4900 3150 5100 3150
|
||||
Wire Wire Line
|
||||
4900 3250 5100 3250
|
||||
Wire Wire Line
|
||||
4900 3350 5100 3350
|
||||
Wire Wire Line
|
||||
5100 3450 4900 3450
|
||||
Wire Wire Line
|
||||
4900 3550 5100 3550
|
||||
Wire Wire Line
|
||||
2300 2200 3050 2200
|
||||
Wire Wire Line
|
||||
2300 2300 3050 2300
|
||||
Wire Wire Line
|
||||
2300 2400 3050 2400
|
||||
Wire Wire Line
|
||||
2300 2500 3050 2500
|
||||
Wire Wire Line
|
||||
2300 2600 3050 2600
|
||||
Wire Wire Line
|
||||
2300 2700 3050 2700
|
||||
Wire Wire Line
|
||||
2300 2800 3050 2800
|
||||
Wire Wire Line
|
||||
2300 2900 3050 2900
|
||||
Text Label 2950 2200 0 50 ~ 0
|
||||
D0
|
||||
Text Label 2950 2300 0 50 ~ 0
|
||||
D1
|
||||
Text Label 2950 2400 0 50 ~ 0
|
||||
D2
|
||||
Text Label 2950 2500 0 50 ~ 0
|
||||
D3
|
||||
Text Label 2950 2600 0 50 ~ 0
|
||||
D4
|
||||
Text Label 2950 2700 0 50 ~ 0
|
||||
D5
|
||||
Text Label 2950 2800 0 50 ~ 0
|
||||
D6
|
||||
Text Label 2950 2900 0 50 ~ 0
|
||||
D7
|
||||
Text Label 4900 2850 0 50 ~ 0
|
||||
D0
|
||||
Text Label 4900 2950 0 50 ~ 0
|
||||
D1
|
||||
Text Label 4900 3050 0 50 ~ 0
|
||||
D2
|
||||
Text Label 4900 3150 0 50 ~ 0
|
||||
D3
|
||||
Text Label 4900 3250 0 50 ~ 0
|
||||
D4
|
||||
Text Label 4900 3350 0 50 ~ 0
|
||||
D5
|
||||
Text Label 4900 3450 0 50 ~ 0
|
||||
D6
|
||||
Text Label 4900 3550 0 50 ~ 0
|
||||
D7
|
||||
Wire Bus Line
|
||||
3150 3000 4250 3000
|
||||
Wire Bus Line
|
||||
4250 3000 4250 2750
|
||||
Wire Wire Line
|
||||
3050 3000 3050 3100
|
||||
Wire Wire Line
|
||||
4400 3100 4400 1150
|
||||
Wire Wire Line
|
||||
2300 3000 3050 3000
|
||||
Text GLabel 5000 1450 0 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5100 1450 5000 1450
|
||||
Text GLabel 2950 4500 2 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
2300 4500 2950 4500
|
||||
Entry Wire Line
|
||||
900 2100 1000 2200
|
||||
Entry Wire Line
|
||||
900 2200 1000 2300
|
||||
Entry Wire Line
|
||||
900 2300 1000 2400
|
||||
Entry Wire Line
|
||||
900 2400 1000 2500
|
||||
Entry Wire Line
|
||||
4650 1750 4750 1850
|
||||
Entry Wire Line
|
||||
4650 1850 4750 1950
|
||||
Entry Wire Line
|
||||
4650 1650 4750 1750
|
||||
Entry Wire Line
|
||||
4650 1550 4750 1650
|
||||
$Comp
|
||||
L Memory_RAM:IDT7132 U1
|
||||
U 1 1 6102DC5C
|
||||
P 6000 2350
|
||||
F 0 "U1" H 5450 3800 50 0000 C CNN
|
||||
F 1 "IDT7132" H 6450 900 50 0000 C CNN
|
||||
F 2 "Package_DIP:DIP-48_W15.24mm_Socket_LongPads" H 6000 2350 50 0001 C CNN
|
||||
F 3 "" H 6000 2350 50 0001 C CNN
|
||||
1 6000 2350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4750 1650 5100 1650
|
||||
Wire Wire Line
|
||||
4750 1750 5100 1750
|
||||
Wire Wire Line
|
||||
4750 1850 5100 1850
|
||||
Wire Wire Line
|
||||
4750 1950 5100 1950
|
||||
Wire Wire Line
|
||||
3050 3100 4400 3100
|
||||
Wire Wire Line
|
||||
1000 2200 1800 2200
|
||||
Wire Wire Line
|
||||
1000 2300 1800 2300
|
||||
Wire Wire Line
|
||||
1000 2400 1800 2400
|
||||
Wire Wire Line
|
||||
1000 2500 1800 2500
|
||||
Text Label 1000 2200 0 50 ~ 0
|
||||
A0
|
||||
Text Label 1000 2300 0 50 ~ 0
|
||||
A1
|
||||
Text Label 1000 2400 0 50 ~ 0
|
||||
A2
|
||||
Text Label 1000 2500 0 50 ~ 0
|
||||
A3
|
||||
Text Label 4750 1650 0 50 ~ 0
|
||||
A0
|
||||
Text Label 4750 1750 0 50 ~ 0
|
||||
A1
|
||||
Text Label 4750 1850 0 50 ~ 0
|
||||
A2
|
||||
Text Label 4750 1950 0 50 ~ 0
|
||||
A3
|
||||
Text GLabel 10500 1100 3 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
650 3800 650 1250
|
||||
Wire Wire Line
|
||||
650 3800 1800 3800
|
||||
Text GLabel 1000 6000 3 50 Input ~ 0
|
||||
GND
|
||||
Text GLabel 1150 4500 0 50 Input ~ 0
|
||||
+5V
|
||||
Wire Wire Line
|
||||
1150 4500 1800 4500
|
||||
Text GLabel 1000 5700 1 50 Input ~ 0
|
||||
+5V
|
||||
Wire Wire Line
|
||||
9750 950 10500 950
|
||||
Wire Wire Line
|
||||
10500 950 10500 1100
|
||||
Wire Wire Line
|
||||
650 1250 5100 1250
|
||||
Wire Bus Line
|
||||
900 1550 4650 1550
|
||||
Wire Bus Line
|
||||
4250 2750 4800 2750
|
||||
Wire Wire Line
|
||||
4400 1150 5100 1150
|
||||
Entry Wire Line
|
||||
4650 1950 4750 2050
|
||||
Entry Wire Line
|
||||
4650 2050 4750 2150
|
||||
Entry Wire Line
|
||||
4650 2150 4750 2250
|
||||
Entry Wire Line
|
||||
4650 2250 4750 2350
|
||||
Wire Wire Line
|
||||
4750 2050 5100 2050
|
||||
Wire Wire Line
|
||||
4750 2250 5100 2250
|
||||
Wire Wire Line
|
||||
4750 2150 5100 2150
|
||||
Wire Wire Line
|
||||
4750 2350 5100 2350
|
||||
Wire Wire Line
|
||||
1000 2600 1800 2600
|
||||
Entry Wire Line
|
||||
900 2500 1000 2600
|
||||
Entry Wire Line
|
||||
900 2600 1000 2700
|
||||
Entry Wire Line
|
||||
900 2700 1000 2800
|
||||
Entry Wire Line
|
||||
900 2800 1000 2900
|
||||
Wire Wire Line
|
||||
1000 2700 1800 2700
|
||||
Wire Wire Line
|
||||
1000 2800 1800 2800
|
||||
Wire Wire Line
|
||||
1000 2900 1800 2900
|
||||
Text GLabel 5000 2550 0 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5100 2550 5000 2550
|
||||
Text GLabel 5000 2650 0 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5100 2650 5000 2650
|
||||
Text Label 1000 2600 0 50 ~ 0
|
||||
A4
|
||||
Text Label 1000 2700 0 50 ~ 0
|
||||
A5
|
||||
Text Label 1000 2800 0 50 ~ 0
|
||||
A6
|
||||
Text Label 1000 2900 0 50 ~ 0
|
||||
A7
|
||||
Text Label 4750 2050 0 50 ~ 0
|
||||
A4
|
||||
Text Label 4750 2150 0 50 ~ 0
|
||||
A5
|
||||
Text Label 4750 2250 0 50 ~ 0
|
||||
A6
|
||||
Text Label 4750 2350 0 50 ~ 0
|
||||
A7
|
||||
Text GLabel 5000 2450 0 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
5100 2450 5000 2450
|
||||
Entry Wire Line
|
||||
7150 2850 7250 2950
|
||||
Entry Wire Line
|
||||
7150 2950 7250 3050
|
||||
Entry Wire Line
|
||||
7150 3050 7250 3150
|
||||
Entry Wire Line
|
||||
7150 3150 7250 3250
|
||||
Entry Wire Line
|
||||
7150 3250 7250 3350
|
||||
Entry Wire Line
|
||||
7150 3350 7250 3450
|
||||
Entry Wire Line
|
||||
7150 3450 7250 3550
|
||||
Entry Wire Line
|
||||
7150 3550 7250 3650
|
||||
Entry Wire Line
|
||||
9050 2750 9150 2850
|
||||
Entry Wire Line
|
||||
9050 2850 9150 2950
|
||||
Entry Wire Line
|
||||
9050 2550 9150 2650
|
||||
Entry Wire Line
|
||||
9050 2650 9150 2750
|
||||
Entry Wire Line
|
||||
9050 2150 9150 2250
|
||||
Entry Wire Line
|
||||
9050 2250 9150 2350
|
||||
Entry Wire Line
|
||||
9050 1950 9150 2050
|
||||
Entry Wire Line
|
||||
9050 2050 9150 2150
|
||||
Wire Wire Line
|
||||
9050 1950 8800 1950
|
||||
Wire Wire Line
|
||||
9050 2050 8800 2050
|
||||
Wire Wire Line
|
||||
9050 2150 8800 2150
|
||||
Wire Wire Line
|
||||
9050 2250 8800 2250
|
||||
Wire Wire Line
|
||||
9050 2550 8800 2550
|
||||
Wire Wire Line
|
||||
9050 2650 8800 2650
|
||||
Wire Wire Line
|
||||
9050 2750 8800 2750
|
||||
Wire Bus Line
|
||||
7250 2950 8000 2950
|
||||
Wire Bus Line
|
||||
8000 2950 8000 2850
|
||||
Wire Wire Line
|
||||
6900 2850 7150 2850
|
||||
Wire Wire Line
|
||||
6900 2950 7150 2950
|
||||
Wire Wire Line
|
||||
6900 3550 7150 3550
|
||||
Wire Wire Line
|
||||
6900 3450 7150 3450
|
||||
Wire Wire Line
|
||||
6900 3350 7150 3350
|
||||
Wire Wire Line
|
||||
6900 3250 7150 3250
|
||||
Wire Wire Line
|
||||
6900 3150 7150 3150
|
||||
Wire Wire Line
|
||||
6900 3050 7150 3050
|
||||
Text Label 7000 2850 0 50 ~ 0
|
||||
D0R
|
||||
Text Label 7000 2950 0 50 ~ 0
|
||||
D1R
|
||||
Text Label 7000 3050 0 50 ~ 0
|
||||
D2R
|
||||
Text Label 7000 3150 0 50 ~ 0
|
||||
D3R
|
||||
Text Label 7000 3250 0 50 ~ 0
|
||||
D4R
|
||||
Text Label 7000 3350 0 50 ~ 0
|
||||
D5R
|
||||
Text Label 7000 3450 0 50 ~ 0
|
||||
D6R
|
||||
Text Label 7000 3550 0 50 ~ 0
|
||||
D7R
|
||||
Wire Bus Line
|
||||
8800 2850 8800 1950
|
||||
Wire Bus Line
|
||||
8000 2850 8800 2850
|
||||
Wire Wire Line
|
||||
9050 2850 8800 2850
|
||||
Text Label 8850 2850 0 50 ~ 0
|
||||
D0R
|
||||
Text Label 8850 2750 0 50 ~ 0
|
||||
D1R
|
||||
Text Label 8850 2650 0 50 ~ 0
|
||||
D2R
|
||||
Text Label 8850 2550 0 50 ~ 0
|
||||
D3R
|
||||
Text Label 8850 2250 0 50 ~ 0
|
||||
D4R
|
||||
Text Label 8850 2150 0 50 ~ 0
|
||||
D5R
|
||||
Text Label 8850 2050 0 50 ~ 0
|
||||
D6R
|
||||
Text Label 8850 1950 0 50 ~ 0
|
||||
D7R
|
||||
Wire Wire Line
|
||||
9100 1950 9150 1950
|
||||
Wire Wire Line
|
||||
6900 1750 8100 1750
|
||||
Wire Wire Line
|
||||
8100 1750 8100 1850
|
||||
Wire Wire Line
|
||||
8100 1850 9150 1850
|
||||
Wire Wire Line
|
||||
6900 1850 8050 1850
|
||||
Wire Wire Line
|
||||
8050 1850 8050 1900
|
||||
Wire Wire Line
|
||||
8050 1900 8550 1900
|
||||
Wire Wire Line
|
||||
8550 1900 8550 1750
|
||||
Wire Wire Line
|
||||
8550 1750 9150 1750
|
||||
Wire Wire Line
|
||||
6900 1650 8150 1650
|
||||
Wire Wire Line
|
||||
8150 1650 8150 1800
|
||||
Wire Wire Line
|
||||
8150 1800 9050 1800
|
||||
Wire Wire Line
|
||||
9050 1800 9050 1900
|
||||
Wire Wire Line
|
||||
9050 1900 9100 1900
|
||||
Wire Wire Line
|
||||
9100 1900 9100 1950
|
||||
Wire Wire Line
|
||||
6900 1950 8500 1950
|
||||
Wire Wire Line
|
||||
8500 1950 8500 1650
|
||||
Wire Wire Line
|
||||
8500 1650 9150 1650
|
||||
Wire Wire Line
|
||||
6900 1250 7900 1250
|
||||
Wire Wire Line
|
||||
7900 1250 7900 3050
|
||||
Wire Wire Line
|
||||
7900 3050 9150 3050
|
||||
Wire Wire Line
|
||||
5100 1350 4950 1350
|
||||
Wire Wire Line
|
||||
4950 1350 4950 800
|
||||
Wire Wire Line
|
||||
7850 3150 9150 3150
|
||||
Wire Wire Line
|
||||
8950 800 8950 1250
|
||||
Wire Wire Line
|
||||
8950 1250 9150 1250
|
||||
Wire Wire Line
|
||||
4950 800 8950 800
|
||||
Wire Wire Line
|
||||
6900 1350 9150 1350
|
||||
Wire Wire Line
|
||||
1300 2100 1300 700
|
||||
Wire Wire Line
|
||||
1300 700 8900 700
|
||||
Wire Wire Line
|
||||
8900 700 8900 1450
|
||||
Wire Wire Line
|
||||
8900 1450 9150 1450
|
||||
Wire Wire Line
|
||||
7850 2050 6900 2050
|
||||
Wire Wire Line
|
||||
7850 2050 7850 3150
|
||||
Text GLabel 7000 1450 2 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
6900 1450 7000 1450
|
||||
Text GLabel 7000 1150 2 50 Input ~ 0
|
||||
GND
|
||||
Wire Wire Line
|
||||
6900 1150 7000 1150
|
||||
Wire Bus Line
|
||||
3150 2300 3150 3000
|
||||
Wire Bus Line
|
||||
4800 2750 4800 3450
|
||||
Wire Bus Line
|
||||
4650 1550 4650 2250
|
||||
Wire Bus Line
|
||||
7250 2950 7250 3650
|
||||
Wire Bus Line
|
||||
900 1550 900 2800
|
||||
$EndSCHEMATC
|
||||
|
|
@ -0,0 +1,438 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title "Apple II Breadboard Card"
|
||||
Date "2021-02-08"
|
||||
Rev "1.1"
|
||||
Comp "Renee Harke"
|
||||
Comment1 "MIT license; see LICENSE file"
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L Connector_Generic:Conn_02x25_Counter_Clockwise J1
|
||||
U 1 1 5E339C7A
|
||||
P 3350 3400
|
||||
F 0 "J1" H 3400 4817 50 0000 C CNN
|
||||
F 1 "CARD EDGE" H 3400 4726 50 0000 C CNN
|
||||
F 2 "pub:AppleIIBus" H 3350 3400 50 0001 C CNN
|
||||
F 3 "~" H 3350 3400 50 0001 C CNN
|
||||
1 3350 3400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Label 3100 2200 2 50 ~ 0
|
||||
~IOSEL
|
||||
Text Label 3100 2300 2 50 ~ 0
|
||||
A0
|
||||
Text Label 3100 2400 2 50 ~ 0
|
||||
A1
|
||||
Text Label 3100 2500 2 50 ~ 0
|
||||
A2
|
||||
Text Label 3100 2600 2 50 ~ 0
|
||||
A3
|
||||
Text Label 3100 2700 2 50 ~ 0
|
||||
A4
|
||||
Text Label 3100 2800 2 50 ~ 0
|
||||
A5
|
||||
Text Label 3100 2900 2 50 ~ 0
|
||||
A6
|
||||
Text Label 3100 3000 2 50 ~ 0
|
||||
A7
|
||||
Text Label 3100 3100 2 50 ~ 0
|
||||
A8
|
||||
Text Label 3100 3200 2 50 ~ 0
|
||||
A9
|
||||
Text Label 3100 3300 2 50 ~ 0
|
||||
A10
|
||||
Text Label 3100 3400 2 50 ~ 0
|
||||
A11
|
||||
Text Label 3100 3500 2 50 ~ 0
|
||||
A12
|
||||
Text Label 3100 3600 2 50 ~ 0
|
||||
A13
|
||||
Text Label 3100 3700 2 50 ~ 0
|
||||
A14
|
||||
Text Label 3100 3800 2 50 ~ 0
|
||||
A15
|
||||
Text Label 3100 3900 2 50 ~ 0
|
||||
R~W
|
||||
Text Label 3100 4000 2 50 ~ 0
|
||||
SYNC
|
||||
Text Label 3100 4100 2 50 ~ 0
|
||||
~IOSTRB
|
||||
Text Label 3100 4200 2 50 ~ 0
|
||||
RDY
|
||||
Text Label 3100 4300 2 50 ~ 0
|
||||
~DMA
|
||||
Text Label 3100 4400 2 50 ~ 0
|
||||
INTOUT
|
||||
Text Label 3100 4500 2 50 ~ 0
|
||||
DMAOUT
|
||||
Text Label 3100 4600 2 50 ~ 0
|
||||
+5V
|
||||
Text Label 3700 4600 0 50 ~ 0
|
||||
GND
|
||||
Text Label 3700 4500 0 50 ~ 0
|
||||
DMAIN
|
||||
Text Label 3700 4400 0 50 ~ 0
|
||||
INTIN
|
||||
Text Label 3700 4300 0 50 ~ 0
|
||||
~NMI
|
||||
Text Label 3700 4200 0 50 ~ 0
|
||||
~IRQ
|
||||
Text Label 3700 4100 0 50 ~ 0
|
||||
~RES
|
||||
Text Label 3700 4000 0 50 ~ 0
|
||||
~INH
|
||||
Text Label 3700 3900 0 50 ~ 0
|
||||
-12V
|
||||
Text Label 3700 3800 0 50 ~ 0
|
||||
-5V
|
||||
Text Label 3700 3600 0 50 ~ 0
|
||||
7M
|
||||
Text Label 3700 3500 0 50 ~ 0
|
||||
Q3
|
||||
Text Label 3700 3400 0 50 ~ 0
|
||||
PHI1
|
||||
Text Label 3700 3300 0 50 ~ 0
|
||||
USER1
|
||||
Text Label 3700 3200 0 50 ~ 0
|
||||
PHI0
|
||||
Text Label 3700 3100 0 50 ~ 0
|
||||
~DEVSEL
|
||||
Text Label 3700 2200 0 50 ~ 0
|
||||
+12V
|
||||
Text Label 3700 2300 0 50 ~ 0
|
||||
D0
|
||||
Text Label 3700 2400 0 50 ~ 0
|
||||
D1
|
||||
Text Label 3700 2500 0 50 ~ 0
|
||||
D2
|
||||
Text Label 3700 2600 0 50 ~ 0
|
||||
D3
|
||||
Text Label 3700 2700 0 50 ~ 0
|
||||
D4
|
||||
Text Label 3700 2800 0 50 ~ 0
|
||||
D5
|
||||
Text Label 3700 2900 0 50 ~ 0
|
||||
D6
|
||||
Text Label 3700 3000 0 50 ~ 0
|
||||
D7
|
||||
Wire Wire Line
|
||||
3650 2200 4150 2200
|
||||
Wire Wire Line
|
||||
3650 2300 4150 2300
|
||||
Wire Wire Line
|
||||
3650 2400 4150 2400
|
||||
Wire Wire Line
|
||||
3650 2500 4150 2500
|
||||
Wire Wire Line
|
||||
3650 2600 4150 2600
|
||||
Wire Wire Line
|
||||
3650 2700 4150 2700
|
||||
Wire Wire Line
|
||||
3650 2800 4150 2800
|
||||
Wire Wire Line
|
||||
3650 2900 4150 2900
|
||||
Wire Wire Line
|
||||
3650 3000 4150 3000
|
||||
Wire Wire Line
|
||||
3650 3100 4150 3100
|
||||
Wire Wire Line
|
||||
3650 3200 4150 3200
|
||||
Wire Wire Line
|
||||
3650 3300 4150 3300
|
||||
Wire Wire Line
|
||||
3650 3400 4150 3400
|
||||
Wire Wire Line
|
||||
3650 3500 4150 3500
|
||||
Wire Wire Line
|
||||
3650 3600 4150 3600
|
||||
Wire Wire Line
|
||||
3650 3700 4150 3700
|
||||
Wire Wire Line
|
||||
3650 3800 4150 3800
|
||||
Wire Wire Line
|
||||
3650 3900 4150 3900
|
||||
Wire Wire Line
|
||||
3650 4000 4150 4000
|
||||
Wire Wire Line
|
||||
3650 4100 4150 4100
|
||||
Wire Wire Line
|
||||
3650 4200 4150 4200
|
||||
Wire Wire Line
|
||||
3650 4300 4150 4300
|
||||
Wire Wire Line
|
||||
3650 4400 4150 4400
|
||||
Wire Wire Line
|
||||
3650 4500 4150 4500
|
||||
Wire Wire Line
|
||||
3650 4600 4150 4600
|
||||
Text Label 3700 3700 0 50 ~ 0
|
||||
COLORREF
|
||||
Wire Wire Line
|
||||
3150 2200 2650 2200
|
||||
Wire Wire Line
|
||||
3150 2300 2650 2300
|
||||
Wire Wire Line
|
||||
3150 2400 2650 2400
|
||||
Wire Wire Line
|
||||
3150 2500 2650 2500
|
||||
Wire Wire Line
|
||||
3150 2600 2650 2600
|
||||
Wire Wire Line
|
||||
3150 2700 2650 2700
|
||||
Wire Wire Line
|
||||
3150 2800 2650 2800
|
||||
Wire Wire Line
|
||||
3150 2900 2650 2900
|
||||
Wire Wire Line
|
||||
3150 3000 2650 3000
|
||||
Wire Wire Line
|
||||
3150 3100 2650 3100
|
||||
Wire Wire Line
|
||||
3150 3200 2650 3200
|
||||
Wire Wire Line
|
||||
3150 3300 2650 3300
|
||||
Wire Wire Line
|
||||
3150 3400 2650 3400
|
||||
Wire Wire Line
|
||||
3150 3500 2650 3500
|
||||
Wire Wire Line
|
||||
3150 3600 2650 3600
|
||||
Wire Wire Line
|
||||
3150 3700 2650 3700
|
||||
Wire Wire Line
|
||||
3150 3800 2650 3800
|
||||
Wire Wire Line
|
||||
3150 3900 2650 3900
|
||||
Wire Wire Line
|
||||
3150 4000 2650 4000
|
||||
Wire Wire Line
|
||||
3150 4100 2650 4100
|
||||
Wire Wire Line
|
||||
3150 4200 2650 4200
|
||||
Wire Wire Line
|
||||
3150 4300 2650 4300
|
||||
Wire Wire Line
|
||||
3150 4400 2650 4400
|
||||
Wire Wire Line
|
||||
3150 4500 2650 4500
|
||||
Wire Wire Line
|
||||
3150 4600 2650 4600
|
||||
$Comp
|
||||
L Connector_Generic:Conn_02x25_Counter_Clockwise J2
|
||||
U 1 1 5E39109E
|
||||
P 5350 3400
|
||||
F 0 "J2" H 5400 4817 50 0000 C CNN
|
||||
F 1 "HEADER BLOCK" H 5400 4726 50 0000 C CNN
|
||||
F 2 "pub:PinSocket_2x25_P2.54mm_Vertical_CCW_Mirrored_NoSilk" H 5350 3400 50 0001 C CNN
|
||||
F 3 "~" H 5350 3400 50 0001 C CNN
|
||||
1 5350 3400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Label 5100 2200 2 50 ~ 0
|
||||
~IOSEL
|
||||
Text Label 5100 2300 2 50 ~ 0
|
||||
A0
|
||||
Text Label 5100 2400 2 50 ~ 0
|
||||
A1
|
||||
Text Label 5100 2500 2 50 ~ 0
|
||||
A2
|
||||
Text Label 5100 2600 2 50 ~ 0
|
||||
A3
|
||||
Text Label 5100 2700 2 50 ~ 0
|
||||
A4
|
||||
Text Label 5100 2800 2 50 ~ 0
|
||||
A5
|
||||
Text Label 5100 2900 2 50 ~ 0
|
||||
A6
|
||||
Text Label 5100 3000 2 50 ~ 0
|
||||
A7
|
||||
Text Label 5100 3100 2 50 ~ 0
|
||||
A8
|
||||
Text Label 5100 3200 2 50 ~ 0
|
||||
A9
|
||||
Text Label 5100 3300 2 50 ~ 0
|
||||
A10
|
||||
Text Label 5100 3400 2 50 ~ 0
|
||||
A11
|
||||
Text Label 5100 3500 2 50 ~ 0
|
||||
A12
|
||||
Text Label 5100 3600 2 50 ~ 0
|
||||
A13
|
||||
Text Label 5100 3700 2 50 ~ 0
|
||||
A14
|
||||
Text Label 5100 3800 2 50 ~ 0
|
||||
A15
|
||||
Text Label 5100 3900 2 50 ~ 0
|
||||
R~W
|
||||
Text Label 5100 4000 2 50 ~ 0
|
||||
SYNC
|
||||
Text Label 5100 4100 2 50 ~ 0
|
||||
~IOSTRB
|
||||
Text Label 5100 4200 2 50 ~ 0
|
||||
RDY
|
||||
Text Label 5100 4300 2 50 ~ 0
|
||||
~DMA
|
||||
Text Label 5100 4400 2 50 ~ 0
|
||||
INTOUT
|
||||
Text Label 5100 4500 2 50 ~ 0
|
||||
DMAOUT
|
||||
Text Label 5100 4600 2 50 ~ 0
|
||||
+5V
|
||||
Text Label 5700 4600 0 50 ~ 0
|
||||
GND
|
||||
Text Label 5700 4500 0 50 ~ 0
|
||||
DMAIN
|
||||
Text Label 5700 4400 0 50 ~ 0
|
||||
INTIN
|
||||
Text Label 5700 4300 0 50 ~ 0
|
||||
~NMI
|
||||
Text Label 5700 4200 0 50 ~ 0
|
||||
~IRQ
|
||||
Text Label 5700 4100 0 50 ~ 0
|
||||
~RES
|
||||
Text Label 5700 4000 0 50 ~ 0
|
||||
~INH
|
||||
Text Label 5700 3900 0 50 ~ 0
|
||||
-12V
|
||||
Text Label 5700 3800 0 50 ~ 0
|
||||
-5V
|
||||
Text Label 5700 3600 0 50 ~ 0
|
||||
7M
|
||||
Text Label 5700 3500 0 50 ~ 0
|
||||
Q3
|
||||
Text Label 5700 3400 0 50 ~ 0
|
||||
PHI1
|
||||
Text Label 5700 3300 0 50 ~ 0
|
||||
USER1
|
||||
Text Label 5700 3200 0 50 ~ 0
|
||||
PHI0
|
||||
Text Label 5700 3100 0 50 ~ 0
|
||||
~DEVSEL
|
||||
Text Label 5700 2200 0 50 ~ 0
|
||||
+12V
|
||||
Text Label 5700 2300 0 50 ~ 0
|
||||
D0
|
||||
Text Label 5700 2400 0 50 ~ 0
|
||||
D1
|
||||
Text Label 5700 2500 0 50 ~ 0
|
||||
D2
|
||||
Text Label 5700 2600 0 50 ~ 0
|
||||
D3
|
||||
Text Label 5700 2700 0 50 ~ 0
|
||||
D4
|
||||
Text Label 5700 2800 0 50 ~ 0
|
||||
D5
|
||||
Text Label 5700 2900 0 50 ~ 0
|
||||
D6
|
||||
Text Label 5700 3000 0 50 ~ 0
|
||||
D7
|
||||
Wire Wire Line
|
||||
5650 2200 6150 2200
|
||||
Wire Wire Line
|
||||
5650 2300 6150 2300
|
||||
Wire Wire Line
|
||||
5650 2400 6150 2400
|
||||
Wire Wire Line
|
||||
5650 2500 6150 2500
|
||||
Wire Wire Line
|
||||
5650 2600 6150 2600
|
||||
Wire Wire Line
|
||||
5650 2700 6150 2700
|
||||
Wire Wire Line
|
||||
5650 2800 6150 2800
|
||||
Wire Wire Line
|
||||
5650 2900 6150 2900
|
||||
Wire Wire Line
|
||||
5650 3000 6150 3000
|
||||
Wire Wire Line
|
||||
5650 3100 6150 3100
|
||||
Wire Wire Line
|
||||
5650 3200 6150 3200
|
||||
Wire Wire Line
|
||||
5650 3300 6150 3300
|
||||
Wire Wire Line
|
||||
5650 3400 6150 3400
|
||||
Wire Wire Line
|
||||
5650 3500 6150 3500
|
||||
Wire Wire Line
|
||||
5650 3600 6150 3600
|
||||
Wire Wire Line
|
||||
5650 3700 6150 3700
|
||||
Wire Wire Line
|
||||
5650 3800 6150 3800
|
||||
Wire Wire Line
|
||||
5650 3900 6150 3900
|
||||
Wire Wire Line
|
||||
5650 4000 6150 4000
|
||||
Wire Wire Line
|
||||
5650 4100 6150 4100
|
||||
Wire Wire Line
|
||||
5650 4200 6150 4200
|
||||
Wire Wire Line
|
||||
5650 4300 6150 4300
|
||||
Wire Wire Line
|
||||
5650 4400 6150 4400
|
||||
Wire Wire Line
|
||||
5650 4500 6150 4500
|
||||
Wire Wire Line
|
||||
5650 4600 6150 4600
|
||||
Text Label 5700 3700 0 50 ~ 0
|
||||
COLORREF
|
||||
Wire Wire Line
|
||||
5150 2200 4650 2200
|
||||
Wire Wire Line
|
||||
5150 2300 4650 2300
|
||||
Wire Wire Line
|
||||
5150 2400 4650 2400
|
||||
Wire Wire Line
|
||||
5150 2500 4650 2500
|
||||
Wire Wire Line
|
||||
5150 2600 4650 2600
|
||||
Wire Wire Line
|
||||
5150 2700 4650 2700
|
||||
Wire Wire Line
|
||||
5150 2800 4650 2800
|
||||
Wire Wire Line
|
||||
5150 2900 4650 2900
|
||||
Wire Wire Line
|
||||
5150 3000 4650 3000
|
||||
Wire Wire Line
|
||||
5150 3100 4650 3100
|
||||
Wire Wire Line
|
||||
5150 3200 4650 3200
|
||||
Wire Wire Line
|
||||
5150 3300 4650 3300
|
||||
Wire Wire Line
|
||||
5150 3400 4650 3400
|
||||
Wire Wire Line
|
||||
5150 3500 4650 3500
|
||||
Wire Wire Line
|
||||
5150 3600 4650 3600
|
||||
Wire Wire Line
|
||||
5150 3700 4650 3700
|
||||
Wire Wire Line
|
||||
5150 3800 4650 3800
|
||||
Wire Wire Line
|
||||
5150 3900 4650 3900
|
||||
Wire Wire Line
|
||||
5150 4000 4650 4000
|
||||
Wire Wire Line
|
||||
5150 4100 4650 4100
|
||||
Wire Wire Line
|
||||
5150 4200 4650 4200
|
||||
Wire Wire Line
|
||||
5150 4300 4650 4300
|
||||
Wire Wire Line
|
||||
5150 4400 4650 4400
|
||||
Wire Wire Line
|
||||
5150 4500 4650 4500
|
||||
Wire Wire Line
|
||||
5150 4600 4650 4600
|
||||
$EndSCHEMATC
|
||||
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Reference in New Issue