mirror of
https://github.com/equant/apple2idiot.git
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804 lines
36 KiB
Plaintext
804 lines
36 KiB
Plaintext
(kicad_pcb (version 20171130) (host pcbnew 5.1.10-88a1d61d58~88~ubuntu18.04.1)
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(general
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(thickness 1.6)
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(drawings 13)
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(tracks 1)
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(zones 0)
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(modules 4)
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(nets 100)
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)
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(page A4)
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(title_block
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(title "Apple II Breadboard Card")
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(date 2021-02-08)
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(rev 1.1)
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(company "Renee Harke")
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(comment 1 "MIT license; see LICENSE file")
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)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(user_trace_width 0.4)
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(user_trace_width 1)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.051)
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(solder_mask_min_width 0.25)
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(aux_axis_origin 0 0)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x3ffff_ffffffff)
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(usegerberextensions false)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory "gerber"))
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)
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(net 0 "")
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(net 1 /+12V)
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(net 2 /D0)
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(net 3 /D1)
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(net 4 /D2)
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(net 5 /D3)
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(net 6 /D4)
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(net 7 /D5)
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(net 8 /D6)
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(net 9 /D7)
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(net 10 /~DEVSEL)
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(net 11 /PHI0)
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(net 12 /USER1)
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(net 13 /PHI1)
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(net 14 /Q3)
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(net 15 /7M)
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(net 16 /COLORREF)
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(net 17 /-5V)
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(net 18 /-12V)
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(net 19 /~INH)
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(net 20 /~RES)
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(net 21 /~IRQ)
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(net 22 /~NMI)
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(net 23 /INTIN)
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(net 24 /DMAIN)
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(net 25 /~IOSEL)
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(net 26 /A0)
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(net 27 /A1)
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(net 28 /A2)
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(net 29 /A3)
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(net 30 /A4)
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(net 31 /A5)
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(net 32 /A6)
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(net 33 /A7)
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(net 34 /A8)
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(net 35 /A9)
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(net 36 /A10)
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(net 37 /A11)
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(net 38 /A12)
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(net 39 /A13)
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(net 40 /A14)
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(net 41 /A15)
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(net 42 /R~W)
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(net 43 /SYNC)
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(net 44 /~IOSTRB)
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(net 45 /RDY)
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(net 46 /~DMA)
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(net 47 /INTOUT)
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(net 48 /DMAOUT)
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(net 49 GND)
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(net 50 +5V)
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(net 51 "Net-(U1-Pad42)")
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(net 52 "Net-(U2-Pad36)")
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(net 53 "Net-(U2-Pad35)")
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(net 54 "Net-(U2-Pad34)")
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(net 55 "Net-(U2-Pad33)")
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(net 56 "Net-(U2-Pad32)")
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(net 57 "Net-(U2-Pad31)")
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(net 58 "Net-(U2-Pad30)")
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(net 59 "Net-(U1-Pad46)")
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(net 60 "Net-(U2-Pad28)")
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(net 61 "Net-(U2-Pad27)")
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(net 62 "Net-(U1-Pad38)")
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(net 63 "Net-(U2-Pad25)")
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(net 64 "Net-(U2-Pad24)")
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(net 65 "Net-(U2-Pad23)")
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(net 66 "Net-(U2-Pad22)")
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(net 67 "Net-(U2-Pad21)")
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(net 68 "Net-(U2-Pad20)")
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(net 69 "Net-(U2-Pad19)")
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(net 70 "Net-(U2-Pad18)")
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(net 71 "Net-(U2-Pad17)")
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(net 72 "Net-(U2-Pad16)")
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(net 73 "Net-(U2-Pad14)")
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(net 74 "Net-(U2-Pad13)")
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(net 75 "Net-(U1-Pad39)")
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(net 76 "Net-(U1-Pad40)")
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(net 77 "Net-(U1-Pad41)")
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(net 78 "Net-(U2-Pad8)")
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(net 79 "Net-(U1-Pad3)")
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(net 80 "Net-(U1-Pad45)")
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(net 81 "Net-(U2-Pad5)")
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(net 82 "Net-(U2-Pad4)")
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(net 83 "Net-(U2-Pad3)")
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(net 84 "Net-(U2-Pad2)")
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(net 85 VCC)
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(net 86 "Net-(U1-Pad44)")
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(net 87 "Net-(U1-Pad37)")
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(net 88 "Net-(U1-Pad36)")
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(net 89 "Net-(U1-Pad35)")
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(net 90 "Net-(U1-Pad34)")
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(net 91 "Net-(U1-Pad33)")
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(net 92 /D0R)
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(net 93 /D1R)
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(net 94 /D2R)
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(net 95 /D3R)
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(net 96 /D4R)
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(net 97 /D5R)
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(net 98 /D6R)
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(net 99 /D7R)
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net +5V)
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(add_net /+12V)
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(add_net /-12V)
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(add_net /-5V)
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(add_net /7M)
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(add_net /A0)
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(add_net /A1)
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(add_net /A10)
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(add_net /A11)
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(add_net /A12)
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(add_net /A13)
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(add_net /A14)
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(add_net /A15)
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(add_net /A2)
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(add_net /A3)
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(add_net /A4)
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(add_net /A5)
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(add_net /A6)
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(add_net /A7)
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(add_net /A8)
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(add_net /A9)
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(add_net /COLORREF)
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(add_net /D0)
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(add_net /D0R)
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(add_net /D1)
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(add_net /D1R)
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(add_net /D2)
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(add_net /D2R)
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(add_net /D3)
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(add_net /D3R)
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(add_net /D4)
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(add_net /D4R)
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(add_net /D5)
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(add_net /D5R)
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(add_net /D6)
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(add_net /D6R)
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(add_net /D7)
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(add_net /D7R)
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(add_net /DMAIN)
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(add_net /DMAOUT)
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(add_net /INTIN)
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(add_net /INTOUT)
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(add_net /PHI0)
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(add_net /PHI1)
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(add_net /Q3)
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(add_net /RDY)
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(add_net /R~W)
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(add_net /SYNC)
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(add_net /USER1)
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(add_net /~DEVSEL)
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(add_net /~DMA)
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(add_net /~INH)
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(add_net /~IOSEL)
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(add_net /~IOSTRB)
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(add_net /~IRQ)
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(add_net /~NMI)
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(add_net /~RES)
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(add_net GND)
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(add_net "Net-(U1-Pad3)")
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(add_net "Net-(U1-Pad33)")
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(add_net "Net-(U1-Pad34)")
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(add_net "Net-(U1-Pad35)")
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(add_net "Net-(U1-Pad36)")
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(add_net "Net-(U1-Pad37)")
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(add_net "Net-(U1-Pad38)")
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(add_net "Net-(U1-Pad39)")
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(add_net "Net-(U1-Pad40)")
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(add_net "Net-(U1-Pad41)")
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(add_net "Net-(U1-Pad42)")
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(add_net "Net-(U1-Pad44)")
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(add_net "Net-(U1-Pad45)")
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(add_net "Net-(U1-Pad46)")
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(add_net "Net-(U2-Pad13)")
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(add_net "Net-(U2-Pad14)")
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(add_net "Net-(U2-Pad16)")
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(add_net "Net-(U2-Pad17)")
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(add_net "Net-(U2-Pad18)")
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(add_net "Net-(U2-Pad19)")
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(add_net "Net-(U2-Pad2)")
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(add_net "Net-(U2-Pad20)")
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(add_net "Net-(U2-Pad21)")
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(add_net "Net-(U2-Pad22)")
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(add_net "Net-(U2-Pad23)")
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(add_net "Net-(U2-Pad24)")
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(add_net "Net-(U2-Pad25)")
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(add_net "Net-(U2-Pad27)")
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(add_net "Net-(U2-Pad28)")
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(add_net "Net-(U2-Pad3)")
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(add_net "Net-(U2-Pad30)")
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(add_net "Net-(U2-Pad31)")
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(add_net "Net-(U2-Pad32)")
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(add_net "Net-(U2-Pad33)")
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(add_net "Net-(U2-Pad34)")
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(add_net "Net-(U2-Pad35)")
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(add_net "Net-(U2-Pad36)")
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(add_net "Net-(U2-Pad4)")
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(add_net "Net-(U2-Pad5)")
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(add_net "Net-(U2-Pad8)")
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(add_net VCC)
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)
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(module pub:AppleIIBus (layer F.Cu) (tedit 5E4F43C2) (tstamp 5E33EA12)
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(at 200.66 128.397)
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(path /5E339C7A)
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(fp_text reference J1 (at 0 -5.08) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value "CARD EDGE" (at 25.4 -5.08) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer B.Mask) (width 0))
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(fp_poly (pts (xy -32.893 -3.81) (xy -32.893 3.81) (xy -31.877 3.81) (xy -31.877 -3.81)) (layer B.Mask) (width 0))
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(fp_poly (pts (xy 32.893 -3.81) (xy 31.877 -3.81) (xy 31.877 3.81) (xy 32.893 3.81)) (layer F.Mask) (width 0))
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(fp_poly (pts (xy -32.893 -3.81) (xy -32.893 3.81) (xy -31.877 3.81) (xy -31.877 -3.81)) (layer F.Mask) (width 0))
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(pad 26 smd rect (at 30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 49 GND) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 27 smd rect (at 27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 24 /DMAIN) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 28 smd rect (at 25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 23 /INTIN) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 29 smd rect (at 22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 22 /~NMI) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 30 smd rect (at 20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 21 /~IRQ) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 31 smd rect (at 17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 20 /~RES) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 32 smd rect (at 15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 19 /~INH) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 33 smd rect (at 12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 18 /-12V) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 34 smd rect (at 10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 17 /-5V) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 35 smd rect (at 7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 16 /COLORREF) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 36 smd rect (at 5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 15 /7M) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 37 smd rect (at 2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 14 /Q3) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 38 smd rect (at 0 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 13 /PHI1) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 39 smd rect (at -2.54 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 12 /USER1) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 40 smd rect (at -5.08 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 11 /PHI0) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 41 smd rect (at -7.62 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 10 /~DEVSEL) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 42 smd rect (at -10.16 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 9 /D7) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 43 smd rect (at -12.7 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 8 /D6) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 44 smd rect (at -15.24 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 7 /D5) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 45 smd rect (at -17.78 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 6 /D4) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 46 smd rect (at -20.32 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 5 /D3) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 47 smd rect (at -22.86 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 4 /D2) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 48 smd rect (at -25.4 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 3 /D1) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 49 smd rect (at -27.94 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 2 /D0) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 50 smd rect (at -30.48 0) (size 1.524 6.35) (layers B.Cu B.Mask)
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(net 1 /+12V) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 25 smd rect (at 30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
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(net 50 +5V) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 24 smd rect (at 27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
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(net 48 /DMAOUT) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 23 smd rect (at 25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
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(net 47 /INTOUT) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 22 smd rect (at 22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
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(net 46 /~DMA) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 21 smd rect (at 20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
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(net 45 /RDY) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 20 smd rect (at 17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
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(net 44 /~IOSTRB) (solder_mask_margin 0.635) (clearance 0.254))
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(pad 19 smd rect (at 15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
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(net 43 /SYNC) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 18 smd rect (at 12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 42 /R~W) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 17 smd rect (at 10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 41 /A15) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 16 smd rect (at 7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 40 /A14) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 15 smd rect (at 5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 39 /A13) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 14 smd rect (at 2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 38 /A12) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 13 smd rect (at 0 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 37 /A11) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 12 smd rect (at -2.54 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 36 /A10) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 11 smd rect (at -5.08 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 35 /A9) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 10 smd rect (at -7.62 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 34 /A8) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 9 smd rect (at -10.16 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 33 /A7) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 8 smd rect (at -12.7 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 32 /A6) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 7 smd rect (at -15.24 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 31 /A5) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 6 smd rect (at -17.78 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 30 /A4) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 5 smd rect (at -20.32 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 29 /A3) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 4 smd rect (at -22.86 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 28 /A2) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 3 smd rect (at -25.4 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 27 /A1) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 2 smd rect (at -27.94 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 26 /A0) (solder_mask_margin 0.635) (clearance 0.254))
|
|
(pad 1 smd rect (at -30.48 0) (size 1.524 6.35) (layers F.Cu F.Mask)
|
|
(net 25 /~IOSEL) (solder_mask_margin 0.635) (clearance 0.254))
|
|
)
|
|
|
|
(module Capacitor_THT:C_Disc_D8.0mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 61011EF7)
|
|
(at 232.41 115.57 180)
|
|
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf")
|
|
(tags "C Disc series Radial pin pitch 5.00mm diameter 8mm width 2.5mm Capacitor")
|
|
(path /6103513B)
|
|
(fp_text reference C1 (at 2.5 -2.5) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value C (at 2.5 2.5) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_line (start 6.75 -1.5) (end -1.75 -1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 6.75 1.5) (end 6.75 -1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.75 1.5) (end 6.75 1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.75 -1.5) (end -1.75 1.5) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 6.62 -1.37) (end 6.62 1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.62 -1.37) (end -1.62 1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.62 1.37) (end 6.62 1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.62 -1.37) (end 6.62 -1.37) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 6.5 -1.25) (end -1.5 -1.25) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 6.5 1.25) (end 6.5 -1.25) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -1.5 1.25) (end 6.5 1.25) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -1.5 -1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1))
|
|
(fp_text user %R (at 2.5 0) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 50 +5V))
|
|
(model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D8.0mm_W2.5mm_P5.00mm.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module Package_DIP:DIP-48_W15.24mm_Socket_LongPads (layer F.Cu) (tedit 5A02E8C5) (tstamp 6100FFF2)
|
|
(at 134.62 115.57 90)
|
|
(descr "48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads")
|
|
(tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads")
|
|
(path /6102DC5C)
|
|
(fp_text reference U1 (at 7.62 -2.33 90) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value IDT7132 (at 7.62 60.75 90) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_line (start 16.8 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 16.8 60) (end 16.8 -1.6) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.55 60) (end 16.8 60) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.55 -1.6) (end -1.55 60) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 16.68 -1.39) (end -1.44 -1.39) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 16.68 59.81) (end 16.68 -1.39) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.44 59.81) (end 16.68 59.81) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -1.44 -1.39) (end -1.44 59.81) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 13.68 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 13.68 59.75) (end 13.68 -1.33) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 1.56 59.75) (end 13.68 59.75) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 1.56 -1.33) (end 1.56 59.75) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 6.62 -1.33) (end 1.56 -1.33) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 16.51 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 16.51 59.75) (end 16.51 -1.33) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -1.27 59.75) (end 16.51 59.75) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -1.27 -1.33) (end -1.27 59.75) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 0.255 59.69) (end 0.255 -0.27) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 14.985 59.69) (end 0.255 59.69) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 14.985 -1.27) (end 14.985 59.69) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1))
|
|
(fp_text user %R (at 7.62 29.21 90) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12))
|
|
(pad 48 thru_hole oval (at 15.24 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 85 VCC))
|
|
(pad 24 thru_hole oval (at 0 58.42 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 47 thru_hole oval (at 15.24 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 23 thru_hole oval (at 0 55.88 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 9 /D7))
|
|
(pad 46 thru_hole oval (at 15.24 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 59 "Net-(U1-Pad46)"))
|
|
(pad 22 thru_hole oval (at 0 53.34 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 8 /D6))
|
|
(pad 45 thru_hole oval (at 15.24 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 80 "Net-(U1-Pad45)"))
|
|
(pad 21 thru_hole oval (at 0 50.8 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 7 /D5))
|
|
(pad 44 thru_hole oval (at 15.24 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 86 "Net-(U1-Pad44)"))
|
|
(pad 20 thru_hole oval (at 0 48.26 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 6 /D4))
|
|
(pad 43 thru_hole oval (at 15.24 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 19 thru_hole oval (at 0 45.72 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 5 /D3))
|
|
(pad 42 thru_hole oval (at 15.24 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 51 "Net-(U1-Pad42)"))
|
|
(pad 18 thru_hole oval (at 0 43.18 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 4 /D2))
|
|
(pad 41 thru_hole oval (at 15.24 17.78 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 77 "Net-(U1-Pad41)"))
|
|
(pad 17 thru_hole oval (at 0 40.64 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 3 /D1))
|
|
(pad 40 thru_hole oval (at 15.24 20.32 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 76 "Net-(U1-Pad40)"))
|
|
(pad 16 thru_hole oval (at 0 38.1 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 2 /D0))
|
|
(pad 39 thru_hole oval (at 15.24 22.86 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 75 "Net-(U1-Pad39)"))
|
|
(pad 15 thru_hole oval (at 0 35.56 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 38 thru_hole oval (at 15.24 25.4 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 62 "Net-(U1-Pad38)"))
|
|
(pad 14 thru_hole oval (at 0 33.02 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 37 thru_hole oval (at 15.24 27.94 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 87 "Net-(U1-Pad37)"))
|
|
(pad 13 thru_hole oval (at 0 30.48 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 33 /A7))
|
|
(pad 36 thru_hole oval (at 15.24 30.48 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 88 "Net-(U1-Pad36)"))
|
|
(pad 12 thru_hole oval (at 0 27.94 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 32 /A6))
|
|
(pad 35 thru_hole oval (at 15.24 33.02 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 89 "Net-(U1-Pad35)"))
|
|
(pad 11 thru_hole oval (at 0 25.4 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 31 /A5))
|
|
(pad 34 thru_hole oval (at 15.24 35.56 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 90 "Net-(U1-Pad34)"))
|
|
(pad 10 thru_hole oval (at 0 22.86 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 30 /A4))
|
|
(pad 33 thru_hole oval (at 15.24 38.1 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 91 "Net-(U1-Pad33)"))
|
|
(pad 9 thru_hole oval (at 0 20.32 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 29 /A3))
|
|
(pad 32 thru_hole oval (at 15.24 40.64 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 92 /D0R))
|
|
(pad 8 thru_hole oval (at 0 17.78 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 28 /A2))
|
|
(pad 31 thru_hole oval (at 15.24 43.18 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 93 /D1R))
|
|
(pad 7 thru_hole oval (at 0 15.24 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 27 /A1))
|
|
(pad 30 thru_hole oval (at 15.24 45.72 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 94 /D2R))
|
|
(pad 6 thru_hole oval (at 0 12.7 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 26 /A0))
|
|
(pad 29 thru_hole oval (at 15.24 48.26 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 95 /D3R))
|
|
(pad 5 thru_hole oval (at 0 10.16 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 28 thru_hole oval (at 15.24 50.8 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 96 /D4R))
|
|
(pad 4 thru_hole oval (at 0 7.62 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 49 GND))
|
|
(pad 27 thru_hole oval (at 15.24 53.34 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 97 /D5R))
|
|
(pad 3 thru_hole oval (at 0 5.08 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 79 "Net-(U1-Pad3)"))
|
|
(pad 26 thru_hole oval (at 15.24 55.88 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 98 /D6R))
|
|
(pad 2 thru_hole oval (at 0 2.54 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 42 /R~W))
|
|
(pad 25 thru_hole oval (at 15.24 58.42 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 99 /D7R))
|
|
(pad 1 thru_hole rect (at 0 0 90) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
(net 10 /~DEVSEL))
|
|
(model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-48_W15.24mm_Socket.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module RF_Module:ESP32-WROOM-32 (layer F.Cu) (tedit 5B5B4654) (tstamp 6100E62C)
|
|
(at 146.05 80.01)
|
|
(descr "Single 2.4 GHz Wi-Fi and Bluetooth combo chip https://www.espressif.com/sites/default/files/documentation/esp32-wroom-32_datasheet_en.pdf")
|
|
(tags "Single 2.4 GHz Wi-Fi and Bluetooth combo chip")
|
|
(path /6102A0B5)
|
|
(attr smd)
|
|
(fp_text reference U2 (at -10.61 8.43 90) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value ESP32-WROOM-32 (at 0 11.5) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_line (start -9.12 -9.445) (end -9.5 -9.445) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -9.12 -15.865) (end -9.12 -9.445) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 9.12 -15.865) (end 9.12 -9.445) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -9.12 -15.865) (end 9.12 -15.865) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 9.12 9.88) (end 8.12 9.88) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 9.12 9.1) (end 9.12 9.88) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -9.12 9.88) (end -8.12 9.88) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -9.12 9.1) (end -9.12 9.88) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 8.4 -20.6) (end 8.2 -20.4) (layer Cmts.User) (width 0.1))
|
|
(fp_line (start 8.4 -16) (end 8.4 -20.6) (layer Cmts.User) (width 0.1))
|
|
(fp_line (start 8.4 -20.6) (end 8.6 -20.4) (layer Cmts.User) (width 0.1))
|
|
(fp_line (start 8.4 -16) (end 8.6 -16.2) (layer Cmts.User) (width 0.1))
|
|
(fp_line (start 8.4 -16) (end 8.2 -16.2) (layer Cmts.User) (width 0.1))
|
|
(fp_line (start -9.2 -13.875) (end -9.4 -14.075) (layer Cmts.User) (width 0.1))
|
|
(fp_line (start -13.8 -13.875) (end -9.2 -13.875) (layer Cmts.User) (width 0.1))
|
|
(fp_line (start -9.2 -13.875) (end -9.4 -13.675) (layer Cmts.User) (width 0.1))
|
|
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)
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(model ${KISYS3DMOD}/RF_Module.3dshapes/ESP32-WROOM-32.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(gr_line (start 167.767 124.587) (end 73.66 124.587) (layer Edge.Cuts) (width 0.05))
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(gr_line (start 167.767 132.207) (end 233.553 132.207) (layer Edge.Cuts) (width 0.05))
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(gr_text "design by Nathanial Hendler, Tucson Arizona" (at 76.2 121.92) (layer F.SilkS) (tstamp 6021F06C)
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(effects (font (size 1 1) (thickness 0.15)) (justify left))
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)
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(gr_text "rev. 1.1 - 2021/02/08" (at 76.2 120.015) (layer F.SilkS) (tstamp 6021F075)
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)
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(gr_text apple2idiot (at 76.2 116.205) (layer F.SilkS) (tstamp 5E341713)
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)
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(segment (start 170.18 128.397) (end 170.18 124.222) (width 1) (layer B.Cu) (net 1))
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)
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