Update classic keyboard main PCB to kicad 6
- fix various ERC and DRC errors resulting from upgrade - list included nets in busses on schematic - Modify Footprints with multiple options (therefore multiple sets of pads) to used shaped pads and proper pad numbering to eliminate DRC issues, and ensure proper behavior
This commit is contained in:
Dave
parent
cc77090f2c
commit
c77838e1b3
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@ -1,31 +1,44 @@
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(module Key_MX (layer F.Cu) (tedit 5FEE0FFF)
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(fp_text reference SW_** (at -5.7912 -8.6106) (layer F.SilkS)
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(footprint "Key_MX" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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(tedit 5FEE0FFF)
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(attr through_hole)
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(fp_text reference "SW_**" (at -5.7912 -8.6106) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 4b917266-b616-4b34-b81a-54ed0ba2cc45)
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)
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(fp_text value Key_MX (at -5.334 8.6614) (layer F.SilkS)
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(fp_text value "Key_MX" (at -5.334 8.6614) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp fded6696-7d51-4dd5-8ea2-90f4b4eea8db)
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)
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(fp_line (start 1.27 -5.08) (end 0.7366 -4.6736) (layer F.Cu) (width 0.3048))
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(fp_line (start 1.651 -5.08) (end 1.27 -5.08) (layer F.Cu) (width 0.3048))
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||||
(fp_line (start -2.54 1.27) (end 0 3.81) (layer F.Cu) (width 0.3048))
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(fp_line (start -2.54 0) (end -2.54 1.27) (layer F.Cu) (width 0.3048))
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(fp_line (start -3.81 -2.54) (end -2.54 0) (layer F.Cu) (width 0.3048))
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(fp_line (start -7.6962 -7.874) (end 7.6962 -7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start 7.6962 -7.874) (end 7.6962 7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start 7.6962 7.874) (end -7.6962 7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start -7.6962 7.874) (end -7.6962 -7.874) (layer F.CrtYd) (width 0.12))
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(pad 4 thru_hole circle (at -3.81 -2.4384) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask))
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(fp_line (start -7.6962 -7.874) (end 7.6962 -7.874) (layer "F.CrtYd") (width 0.12) (tstamp 2a6d0c3c-f5d2-49c8-a5d7-8e4c346deef1))
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(fp_line (start 7.6962 -7.874) (end 7.6962 7.874) (layer "F.CrtYd") (width 0.12) (tstamp 7787030c-1f3e-482b-94d0-35e959f33ad4))
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(fp_line (start 7.6962 7.874) (end -7.6962 7.874) (layer "F.CrtYd") (width 0.12) (tstamp b5acfe42-7ec2-4b59-8af6-0a75a8353d47))
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(fp_line (start -7.6962 7.874) (end -7.6962 -7.874) (layer "F.CrtYd") (width 0.12) (tstamp ca918f73-1d40-4cc8-a02a-3cf113953dd5))
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(pad "" np_thru_hole circle (at 0 0.1016) (size 3.9878 3.9878) (drill 3.9878) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(solder_mask_margin 0.0762) (tstamp 7b85e4ed-78c5-4ee2-8bda-0e2cdc7d855b))
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(pad "" np_thru_hole circle (at 5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(solder_mask_margin 0.0762) (tstamp 994defad-7352-4f5b-adbb-4935eaff1c63))
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(pad "" np_thru_hole circle (at -5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(pad 3 thru_hole circle (at 2.54 -4.9784) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask))
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(pad 1 thru_hole circle (at 0 -4.1021) (size 2.2352 2.2352) (drill 1.397) (layers *.Cu *.Mask))
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(pad 2 thru_hole circle (at 0 3.8989) (size 2.2352 2.2352) (drill 1.397) (layers *.Cu *.Mask))
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(model ${PROJECT_PATH}/cherry_mx.wrl
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(at (xyz 0 0 0))
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(solder_mask_margin 0.0762) (tstamp bf0770ca-f766-4af6-8464-833c391420fc))
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(pad "1" thru_hole circle (at 2.54 -4.9784) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask) (tstamp 1975c8c2-144e-448a-a812-9b2433471950))
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(pad "1" thru_hole circle (at 0 -4.1021) (size 2.2352 2.2352) (drill 1.397) (layers *.Cu *.Mask) (tstamp aeda8d04-e983-4be2-b06d-f5f00510885e))
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(pad "1" smd custom (at 1.1176 -5.0038) (size 0.508 0.508) (layers "F.Cu" "F.Paste" "F.Mask")
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(options (clearance outline) (anchor circle))
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(primitives
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(gr_line (start 0.1524 -0.0762) (end -0.381 0.3302) (width 0.3048))
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(gr_line (start 0.5334 -0.0762) (end 0.1524 -0.0762) (width 0.3048))
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) (tstamp bb4563d4-c376-4320-a9df-b8fd23457b1c))
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(pad "2" thru_hole circle (at 0 3.8989) (size 2.2352 2.2352) (drill 1.397) (layers *.Cu *.Mask) (tstamp 6fe4676a-4801-4b83-afbe-c228f5746fad))
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(pad "2" smd custom (at -2.54 1.27) (size 0.508 0.508) (layers "F.Cu" "F.Paste" "F.Mask")
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(options (clearance outline) (anchor circle))
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(primitives
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(gr_line (start 0 0) (end 2.54 2.54) (width 0.3048))
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(gr_line (start 0 -1.27) (end 0 0) (width 0.3048))
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(gr_line (start -1.27 -3.81) (end 0 -1.27) (width 0.3048))
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) (tstamp 74ba317a-85ad-440e-b769-867e2ba05900))
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(pad "2" thru_hole circle (at -3.81 -2.4384) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask) (tstamp fe3bd807-98a2-44e9-9eb1-1ffca908639e))
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(model "${PROJECT_PATH}/cherry_mx.wrl"
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(offset (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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@ -1,32 +1,49 @@
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(module Key_MX_LED (layer F.Cu) (tedit 60186279)
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(fp_text reference SW_** (at -5.7912 -8.6106) (layer F.SilkS)
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(footprint "Key_MX_LED" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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(tedit 60186279)
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(attr through_hole)
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(fp_text reference "SW_**" (at -5.7912 -8.6106) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 635addc9-1212-4dd8-9025-d46a1478049c)
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)
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(fp_text value Key_MX (at -5.334 8.6614) (layer F.SilkS)
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(fp_text value "Key_MX" (at -5.334 8.6614) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 62fcada6-d502-422d-ace5-51c40c4111e6)
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)
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(fp_line (start 0.127 6.858) (end 0.127 7.62) (layer F.SilkS) (width 0.12))
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(fp_poly (pts (xy 0.127 7.239) (xy -0.381 7.493) (xy -0.381 6.985)) (layer F.SilkS) (width 0.1))
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(fp_line (start -0.889 7.239) (end 0.635 7.239) (layer F.SilkS) (width 0.1016))
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(fp_line (start -7.6962 7.874) (end -7.6962 -7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start 7.6962 7.874) (end -7.6962 7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start 7.6962 -7.874) (end 7.6962 7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start -7.6962 -7.874) (end 7.6962 -7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start -3.81 -2.54) (end -2.54 0) (layer F.Cu) (width 0.3048))
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(fp_line (start -2.54 0) (end -2.54 1.27) (layer F.Cu) (width 0.3048))
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(fp_line (start -2.54 1.27) (end 0 3.81) (layer F.Cu) (width 0.3048))
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(fp_line (start 1.651 -5.08) (end 1.27 -5.08) (layer F.Cu) (width 0.3048))
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(fp_line (start 1.27 -5.08) (end 0.7366 -4.6736) (layer F.Cu) (width 0.3048))
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(pad 3 thru_hole circle (at -1.27 5.1816) (size 1.27 1.27) (drill 1.0668) (layers *.Cu *.Mask))
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(pad 4 thru_hole circle (at 1.27 5.1816) (size 1.27 1.27) (drill 1.0668) (layers *.Cu *.Mask))
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(pad 2 thru_hole circle (at 0 3.8989) (size 1.651 1.651) (drill 1.397) (layers *.Cu *.Mask))
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(pad 1 thru_hole circle (at 0 -4.1021) (size 2.2352 2.2352) (drill 1.397) (layers *.Cu *.Mask))
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(pad 6 thru_hole circle (at 2.54 -4.9784) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask))
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(pad "" np_thru_hole circle (at -5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(pad "" np_thru_hole circle (at 5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(fp_line (start -0.889 7.239) (end 0.635 7.239) (layer "F.SilkS") (width 0.1016) (tstamp 27d3534d-16f5-4ccf-9b16-2c5732c06b4d))
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(fp_line (start 0.127 6.858) (end 0.127 7.62) (layer "F.SilkS") (width 0.12) (tstamp a988bd6f-305a-49e4-a300-383210fe668e))
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(fp_poly (pts
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(xy 0.127 7.239)
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(xy -0.381 7.493)
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(xy -0.381 6.985)
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) (layer "F.SilkS") (width 0.1) (fill solid) (tstamp 8d7c4863-decc-41fb-bc0f-c15564084732))
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(fp_line (start -7.6962 7.874) (end -7.6962 -7.874) (layer "F.CrtYd") (width 0.12) (tstamp 1fe7f185-5c1e-4d8f-8a18-abb08d1a1e13))
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(fp_line (start -7.6962 -7.874) (end 7.6962 -7.874) (layer "F.CrtYd") (width 0.12) (tstamp 6a78f426-b0f1-4a10-8b9d-203792afdc98))
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(fp_line (start 7.6962 7.874) (end -7.6962 7.874) (layer "F.CrtYd") (width 0.12) (tstamp ad0afc42-584d-444a-a5d4-943137df2635))
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(fp_line (start 7.6962 -7.874) (end 7.6962 7.874) (layer "F.CrtYd") (width 0.12) (tstamp cb063ba2-ba75-4d81-b6d1-01cb2c49d8e0))
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(pad "" np_thru_hole circle (at 0 0.1016) (size 3.9878 3.9878) (drill 3.9878) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(pad 5 thru_hole circle (at -3.81 -2.4384) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask))
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(solder_mask_margin 0.0762) (tstamp 880b494c-ee53-4f2b-8304-722863728cc3))
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(pad "" np_thru_hole circle (at 5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762) (tstamp acbb9c7e-a35c-43a0-a03c-5ae34b790b3c))
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(pad "" np_thru_hole circle (at -5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762) (tstamp e2074221-7a62-47e7-bcd1-2b33b1dec304))
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(pad "1" thru_hole circle (at 0 -4.1021) (size 2.2352 2.2352) (drill 1.397) (layers *.Cu *.Mask) (tstamp 0b082f28-afa4-4577-beca-640eeac5c49e))
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(pad "1" thru_hole circle (at 2.54 -4.9784) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask) (tstamp d3fbc779-09ec-46c9-8185-2a56ff83e138))
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(pad "1" smd custom (at 1.1176 -4.9784) (size 0.508 0.508) (layers "F.Cu" "F.Paste" "F.Mask")
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(options (clearance outline) (anchor circle))
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(primitives
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(gr_line (start 0.1524 -0.1016) (end -0.381 0.3048) (width 0.3048))
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(gr_line (start 0.5334 -0.1016) (end 0.1524 -0.1016) (width 0.3048))
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) (tstamp e6ba0ece-e054-4c09-8b08-2b8e76603e71))
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(pad "2" thru_hole circle (at 0 3.8989) (size 1.651 1.651) (drill 1.397) (layers *.Cu *.Mask) (tstamp 3624f8ff-2425-4b82-a6fc-b0ddd7bfdf00))
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(pad "2" thru_hole circle (at -3.81 -2.4384) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask) (tstamp 43d16884-4b85-467f-a465-e8dd4ccd8dea))
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(pad "2" smd custom (at -2.54 1.1684) (size 0.508 0.508) (layers "F.Cu" "F.Paste" "F.Mask")
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(options (clearance outline) (anchor circle))
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(primitives
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(gr_line (start 0 0.1016) (end 2.54 2.6416) (width 0.3048))
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(gr_line (start 0 -1.1684) (end 0 0.1016) (width 0.3048))
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(gr_line (start -1.27 -3.7084) (end 0 -1.1684) (width 0.3048))
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) (tstamp 7454798a-4867-4682-8c36-0d9b76686b1f))
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(pad "3" thru_hole circle (at -1.27 5.1816) (size 1.27 1.27) (drill 1.0668) (layers *.Cu *.Mask) (tstamp 4950c0a2-1f71-4d4a-ba69-985f703a991e))
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(pad "4" thru_hole circle (at 1.27 5.1816) (size 1.27 1.27) (drill 1.0668) (layers *.Cu *.Mask) (tstamp 5d7bfcfa-2c97-4dd7-ae44-67b45a5f8d95))
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)
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@ -1,37 +1,50 @@
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(module Key_MX_Spacebar_5.25 (layer F.Cu) (tedit 601862DF)
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(fp_text reference SW_** (at -5.7912 -8.5852) (layer F.SilkS)
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(footprint "Key_MX_Spacebar_5.25" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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(tedit 601862DF)
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(attr through_hole)
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(fp_text reference "SW_**" (at -5.7912 -8.5852) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 3a4b3c9f-5a78-470d-8c5d-b5f4aa152a6d)
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)
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(fp_text value Key_MX (at -5.334 8.6868) (layer F.SilkS)
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(fp_text value "Key_MX" (at -5.334 8.6868) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp c0abd6cb-d499-4a23-8a26-7e833b7aa18f)
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)
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(fp_line (start -7.6962 7.874) (end -7.6962 -7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start 7.6962 7.874) (end -7.6962 7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start 7.6962 -7.874) (end 7.6962 7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start -7.6962 -7.874) (end 7.6962 -7.874) (layer F.CrtYd) (width 0.12))
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(fp_line (start -3.81 -2.5146) (end -2.54 0.0254) (layer F.Cu) (width 0.3048))
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(fp_line (start -2.54 0.0254) (end -2.54 1.2954) (layer F.Cu) (width 0.3048))
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(fp_line (start -2.54 1.2954) (end 0 3.8354) (layer F.Cu) (width 0.3048))
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(fp_line (start 1.651 -5.0546) (end 1.27 -5.0546) (layer F.Cu) (width 0.3048))
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(fp_line (start 1.27 -5.0546) (end 0.7366 -4.6482) (layer F.Cu) (width 0.3048))
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(pad 4 thru_hole circle (at -3.81 -2.4384) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask))
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(fp_line (start 7.6962 7.874) (end -7.6962 7.874) (layer "F.CrtYd") (width 0.12) (tstamp 06dda447-7a5e-4c5a-88c9-3c9bb09d6e14))
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(fp_line (start 7.6962 -7.874) (end 7.6962 7.874) (layer "F.CrtYd") (width 0.12) (tstamp 4f4e4819-a0de-4e7f-b014-428b73df796f))
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(fp_line (start -7.6962 -7.874) (end 7.6962 -7.874) (layer "F.CrtYd") (width 0.12) (tstamp 9edc424b-8ac8-4542-9d30-21889df7e278))
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||||
(fp_line (start -7.6962 7.874) (end -7.6962 -7.874) (layer "F.CrtYd") (width 0.12) (tstamp a034633c-6fdb-4372-9631-e68dfb5fe4f1))
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||||
(pad "" np_thru_hole circle (at 0 0.1016) (size 3.9878 3.9878) (drill 3.9878) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(solder_mask_margin 0.0762) (tstamp 06d817f3-2973-4ab5-9b4b-16299101116f))
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(pad "" np_thru_hole circle (at 66.675 8.3566) (size 3.9878 3.9878) (drill 3.9878) (layers *.Cu *.Mask) (tstamp 1f64c2fa-89ce-4835-bfa2-b9790d679f3f))
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(pad "" np_thru_hole circle (at -66.675 8.3566) (size 3.9878 3.9878) (drill 3.9878) (layers *.Cu *.Mask) (tstamp 3044c4fa-3589-48a0-a921-7945035047cb))
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(pad "" np_thru_hole oval (at -66.675 -0.1016) (size 5 2) (drill oval 5 2) (layers *.Cu *.Mask) (tstamp 4144a7bb-554b-49fa-b00f-adfc56c5d0f6))
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(pad "" np_thru_hole circle (at 66.675 -6.8834) (size 3.048 3.048) (drill 3.048) (layers *.Cu *.Mask) (tstamp abba95bf-bbd5-4fa8-9287-1625ee918451))
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(pad "" np_thru_hole circle (at 5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(solder_mask_margin 0.0762) (tstamp d7115bbe-51ca-4b7d-ba87-004da4841551))
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(pad "" np_thru_hole circle (at -5.08 0.1016) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask)
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(solder_mask_margin 0.0762))
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(pad 3 thru_hole circle (at 2.54 -4.9784) (size 2.2352 2.2352) (drill 1.5748) (layers *.Cu *.Mask))
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(pad 1 thru_hole circle (at 0 -4.1021) (size 2.2352 2.2352) (drill 1.397) (layers *.Cu *.Mask))
|
||||
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@ -1,70 +1,92 @@
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|
||||
(pad "NC" smd rect (at 1 -0.95 180) (size 0.9 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ba3a84a4-76f0-4b7f-a7e3-771a7ac6e6a5))
|
||||
(model "${KISYS3DMOD}/Diode_THT.3dshapes/D_DO-35_SOD27_P7.62mm_Horizontal.wrl"
|
||||
(offset (xyz -3.556 0 -1.4986))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 180 0 0))
|
||||
)
|
||||
(model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOT-23.wrl
|
||||
(model "${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOT-23.wrl"
|
||||
(offset (xyz 0 0.0762 0.0508))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 180))
|
||||
|
|
|
|||
|
|
@ -1,72 +0,0 @@
|
|||
(module diode-combined_copy (layer F.Cu) (tedit 5F23BF4D)
|
||||
(descr "Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf")
|
||||
(tags "Diode DO-35_SOD27 series Axial Horizontal pin pitch 7.62mm length 4mm diameter 2mm")
|
||||
(attr smd)
|
||||
(fp_text reference REF** (at 1.3462 3.9742) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_text value D_DO-35_SOD27_P7.62mm_Horizontal (at -2.921 -16.4474) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_poly (pts (xy -1.2192 -0.0762) (xy -3.048 -0.0762) (xy -3.048 0.0762) (xy -1.2192 0.0762)) (layer F.Cu) (width 0.1))
|
||||
(fp_poly (pts (xy 4.1656 0.5334) (xy 4.0132 0.5334) (xy 4.0132 0.9906) (xy 1.2192 0.9906)
|
||||
(xy 1.2192 1.143) (xy 4.1656 1.143)) (layer F.Cu) (width 0.1))
|
||||
(fp_line (start 5.114 1.25) (end -4.606 1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start 5.114 -1.25) (end 5.114 1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -4.606 -1.25) (end 5.114 -1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -4.606 1.25) (end -4.606 -1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.266 1.12) (end -1.266 -1.12) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -1.026 1.12) (end -1.026 -1.12) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -1.146 1.12) (end -1.146 -1.12) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 3.024 0) (end 2.374 0) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -2.516 0) (end -1.866 0) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 2.374 1.12) (end -1.866 1.12) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 2.374 -1.12) (end 2.374 1.12) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -1.866 -1.12) (end 2.374 -1.12) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -1.866 1.12) (end -1.866 -1.12) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -1.246 1) (end -1.246 -1) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1.046 1) (end -1.046 -1) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1.146 1) (end -1.146 -1) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 4.064 0) (end 2.254 0) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -3.556 0) (end -1.746 0) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 2.254 1) (end -1.746 1) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 2.254 -1) (end 2.254 1) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1.746 -1) (end 2.254 -1) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1.746 1) (end -1.746 -1) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 0.15 0.45) (end 0.4 0.45) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.15 0.25) (end -0.15 0.45) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.15 0.65) (end 0.15 0.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.15 0.45) (end 0.15 0.65) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.15 0.45) (end -0.4 0.45) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.15 0.65) (end -0.15 0.25) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.76 -1.58) (end -0.76 -0.65) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -0.76 1.58) (end -0.76 0.65) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.7 -1.52) (end -0.7 -1.52) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.76 1.58) (end 1.4 1.58) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 0.7 1.52) (end -0.7 1.52) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 0.7 1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -0.76 -1.58) (end 0.7 -1.58) (layer F.SilkS) (width 0.12))
|
||||
(fp_text user %R (at -1.8288 3.8862) (layer F.SilkS)
|
||||
(effects (font (size 0.8 0.8) (thickness 0.12)))
|
||||
)
|
||||
(pad 3 smd rect (at 1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask))
|
||||
(pad "" smd rect (at 1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 4 smd rect (at -1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 1 thru_hole rect (at -3.556 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
|
||||
(pad 2 thru_hole oval (at 4.064 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
|
||||
(model ${KISYS3DMOD}/Diode_THT.3dshapes/D_DO-35_SOD27_P7.62mm_Horizontal.wrl
|
||||
(offset (xyz -3.556 0 -1.4986))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 180 0 0))
|
||||
)
|
||||
(model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SOT-23.wrl
|
||||
(offset (xyz 0 0.0762 0.0508))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 180))
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,479 @@
|
|||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 3.175,
|
||||
"height": 3.175,
|
||||
"width": 3.175
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.0508,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.254,
|
||||
0.508,
|
||||
1.27
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 1.27,
|
||||
"drill": 0.7112
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
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|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "kbd-classic.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.254,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2032,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3048,
|
||||
"microvia_drill": 0.1016,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.254,
|
||||
"via_diameter": 0.8128,
|
||||
"via_drill": 0.4064,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.254,
|
||||
"diff_pair_gap": 0.254,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2032,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3048,
|
||||
"microvia_drill": 0.1016,
|
||||
"name": "power1",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 1.27,
|
||||
"via_diameter": 1.27,
|
||||
"via_drill": 0.7112,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2032,
|
||||
"diff_pair_gap": 0.254,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2032,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3048,
|
||||
"microvia_drill": 0.1016,
|
||||
"name": "signal",
|
||||
"nets": [
|
||||
"/Col0"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.254,
|
||||
"via_diameter": 0.8128,
|
||||
"via_drill": 0.4064,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"8ec12fb8-db3e-48ce-8343-d5db7896fd4d",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005bc3e99d",
|
||||
"keys1"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005bc3ea0a",
|
||||
"keys2"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
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Load Diff
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Load Diff
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue