2016-01-10 22:16:07 +00:00
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PR#3
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PREFIX /A2OSX.SRC
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2016-10-17 15:47:50 +00:00
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NEW
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2016-01-10 22:16:07 +00:00
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INC 1
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AUTO 6
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.LIST OFF
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.OP 65C02
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.OR $2000
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.TF /A2OSX.BOOT/DRV/LANCEGS.DRV
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*--------------------------------------
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2016-10-26 20:51:06 +00:00
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.INB /A2OSX.DEV/INC/MACROS.I
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.INB /A2OSX.DEV/INC/A2OSX.I
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.INB /A2OSX.DEV/INC/LIBTCPIP.I
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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ZPTmpPTR .EQ ZPDRV
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*--------------------------------------
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2016-10-17 15:47:50 +00:00
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.INB DRV/X.NET.91C96.S
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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* File Header (16 Bytes)
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*--------------------------------------
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CS.START cld
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jmp Dev.Detect cld,jmp abs=DRV
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.DA #$61 6502,Level 1 (65c02)
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.DA #1 DRV Layout Version 1
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.DA 0
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.DA CS.END-CS.START Code Length
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.DA DEV.HEADER-CS.START Device Header Offset
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.DA DRV.CS.START-CS.START Driver Code Offset
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.DA DRV.CS.END-DRV.CS.START Drv Code Length
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*--------------------------------------
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* Relocation Table
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*--------------------------------------
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L.MSG.DETECT .DA MSG.DETECT
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L.MSG.DETECT.OK .DA MSG.DETECT.OK
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L.MSG.DETECT.KO .DA MSG.DETECT.KO
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L.DEV.HEADER.NAME .DA DEV.HEADER.NAME
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.DA 0 End Of Reloc Table
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*--------------------------------------
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2016-10-17 15:47:50 +00:00
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Dev.Detect >STYA Args
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2016-01-10 22:16:07 +00:00
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>LDYA L.MSG.DETECT
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2016-10-24 15:54:43 +00:00
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>SYSCALL PrintFYA
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2016-01-10 22:16:07 +00:00
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ldx #$10
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.1 lda L91C96.BSR+1,x
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cmp #DEVID
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2016-03-30 15:54:47 +00:00
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beq .3
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2016-01-10 22:16:07 +00:00
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2016-03-30 15:54:47 +00:00
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inc DEV.HEADER.NAME+4
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2016-01-10 22:16:07 +00:00
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txa
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clc
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adc #$10
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tax
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2016-03-30 15:54:47 +00:00
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bpl .1 not yat at $80
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2016-01-10 22:16:07 +00:00
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>LDYA L.MSG.DETECT.KO
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2016-10-24 15:54:43 +00:00
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>SYSCALL PrintFYA
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2016-01-10 22:16:07 +00:00
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lda #DEVMGR.ERRNOHW Not Found in any slot, exiting
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sec
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rts
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.3 stx DEVSLOTx0
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2016-10-17 15:47:50 +00:00
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>LDYA ARGS
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>STYA ZPTmpPTR
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lda (ZPTmpPTR)
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2016-01-10 22:16:07 +00:00
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beq .4
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2016-10-17 15:47:50 +00:00
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2016-03-13 22:07:01 +00:00
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sec
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ror USERMAC
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2016-10-24 15:54:43 +00:00
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>SYSCALL GetMemPtrA
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2016-01-10 22:16:07 +00:00
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>STYA ZPTmpPTR
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jsr DecodeMac
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bcc .4
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lda #DEVMGR.ERRICL
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sec
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rts
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2016-10-17 15:47:50 +00:00
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.4 >PUSHW L.DEV.HEADER.NAME
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>LDYA L.MSG.DETECT.OK
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2016-10-24 15:54:43 +00:00
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>SYSCALL PrintFYA
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2016-01-10 22:16:07 +00:00
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clc
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rts
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*--------------------------------------
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2016-03-20 22:12:57 +00:00
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.INB DRV/X.NET.DRV.S
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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CS.END
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2016-10-24 15:54:43 +00:00
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MSG.DETECT >CSTR "LanCeGS/SMSC91C96 Driver.\n"
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MSG.DETECT.OK >CSTR "LanCeGS/SMSC91C96 Installed As Device : %S\n"
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MSG.DETECT.KO >CSTR "Hardware Not Found.\n"
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2016-10-17 15:47:50 +00:00
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Args .BS 2
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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* Device Header (16 Bytes)
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*--------------------------------------
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DEV.HEADER cld
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jmp (DRV.CS.START,x)
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.DA #S.DEV.F.SHARE+S.DEV.F.EVENT
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2016-10-24 15:54:43 +00:00
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DEV.HEADER.NAME >PSTR "ETH1" NAME
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2016-01-10 22:16:07 +00:00
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.HS 00.00
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.HS 00.00.00.00
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*--------------------------------------
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* Driver Code
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*--------------------------------------
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DRV.CS.START .DA OPEN
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.DA GETEVENT
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.DA $FFFF no COUT
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.DA CLOSE
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.DA GETINFO
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.DA $FFFF no IRQ
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.DA SEND
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.DA $FFFF no SETIPCFG
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L.DEVINFO .DA DEVINFO
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.DA 0 end or relocation
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*--------------------------------------
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* input :
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* none
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* output :
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* CC on success
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* CS on error
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*--------------------------------------
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2016-03-13 22:07:01 +00:00
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OPEN jsr Reset will select L91C96.0
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lda #L91C96.0.TCR.FDSE+L91C96.0.TCR.FUDPLX+L91C96.0.TCR.PADEN+L91C96.0.TCR.TXENA
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sta L91C96.0.TCR,x
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lda /L91C96.0.TCR.FDSE+L91C96.0.TCR.FUDPLX+L91C96.0.TCR.PADEN+L91C96.0.TCR.TXENA
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sta L91C96.0.TCR+1,x
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lda #L91C96.0.RCR.NOCRC+L91C96.0.RCR.RXENA+L91C96.0.RCR.ALLMUL
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sta L91C96.0.RCR,x
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lda /L91C96.0.RCR.NOCRC+L91C96.0.RCR.RXENA+L91C96.0.RCR.ALLMUL
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sta L91C96.0.RCR+1,x
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lda #1
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sta L91C96.BSR,x
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lda #L91C96.1.CR.NOWAIT
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sta L91C96.1.CR,x
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lda /L91C96.1.CR.NOWAIT
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sta L91C96.1.CR+1,x
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ldy #0
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bit USERMAC
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2016-03-31 20:07:47 +00:00
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bmi .2
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2016-03-13 22:07:01 +00:00
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.1 lda L91C96.1.IAR,x
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sta MAC,y
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inx
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iny
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cpy #6
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bne .1
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bra .3
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.2 lda MAC,y
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sta L91C96.1.IAR,x
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inx
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iny
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cpy #6
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bne .2
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.3 ldx DEVSLOTx0
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2016-03-30 15:54:47 +00:00
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lda #L91C96.1.CTR.DEFAULT+L91C96.1.CTR.AUTOREL
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2016-03-13 22:07:01 +00:00
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sta L91C96.1.CTR,x
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2016-03-30 15:54:47 +00:00
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lda /L91C96.1.CTR.DEFAULT+L91C96.1.CTR.AUTOREL
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2016-03-13 22:07:01 +00:00
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sta L91C96.1.CTR+1,x
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2016-01-10 22:16:07 +00:00
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clc
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rts
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*--------------------------------------
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* input :
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* pEvent
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* output :
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* CC no event
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* CS event
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*--------------------------------------
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2016-03-13 22:07:01 +00:00
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GETEVENT ldx DEVSLOTx0
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lda #2
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sta L91C96.BSR,x
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lda L91C96.2.IST,x
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and #L91C96.2.IST.RCV
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bne GETEVENT.RxOK
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2016-03-20 22:12:57 +00:00
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lda #ERR.DEV.NOFRAME
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2016-03-13 22:07:01 +00:00
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sec
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2016-01-10 22:16:07 +00:00
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rts
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2016-03-13 22:07:01 +00:00
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GETEVENT.RxOK lda #L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
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sta L91C96.2.PTR,x
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lda /L91C96.2.PTR.RCVD+L91C96.2.PTR.AUTOI+L91C96.2.PTR.READ
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sta L91C96.2.PTR+1,x
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2016-03-30 15:54:47 +00:00
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lda L91C96.2.DATA,x Get Frame Status Word (lo)
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lda L91C96.2.DATA,x Get Frame Status Word (HI)
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asl #$60 = Broadcast?
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2016-03-13 22:07:01 +00:00
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ldy #S.EVT.DATAHI
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sta (pEvent),y
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2016-03-30 15:54:47 +00:00
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asl
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asl #$10 = odd?
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asl if odd, CS
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lda L91C96.2.DATA,x get lo byte count
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sbc #5 compute FRAMELEN
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2016-03-13 22:07:01 +00:00
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sta FRAMELEN
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tay
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2016-03-30 15:54:47 +00:00
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lda L91C96.2.DATA,x get hi byte count
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sbc #0
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2016-03-13 22:07:01 +00:00
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sta FRAMELEN+1
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2016-03-30 15:54:47 +00:00
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iny
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bne .1
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inc
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.1 iny
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bne .11
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inc
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.11 >PUSHYA FRAMLEN+2
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2016-03-13 22:07:01 +00:00
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>PUSHBI 0
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2016-10-24 15:54:43 +00:00
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>SYSCALL GetMem
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2016-03-13 22:07:01 +00:00
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bcs .99
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>STYA ZPTmpPTR
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txa
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ldy #S.EVT.DATALO
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sta (pEvent),y
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lda #S.EVT.F.NET+S.EVT.F.hMEM1
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sta (pEvent)
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lda FRAMELEN
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2016-03-30 15:54:47 +00:00
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sta (ZPTmpPTR)
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ldy #1
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2016-03-13 22:07:01 +00:00
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lda FRAMELEN+1
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sta (ZPTmpPTR),y
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2016-03-30 15:54:47 +00:00
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2016-03-13 22:07:01 +00:00
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iny
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ldx DEVSLOTx0
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.2 jsr DecFrameLen
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beq .8
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lda L91C96.2.DATA,x
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sta (ZPTmpPTR),y
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iny
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bne .3
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inc ZPTmpPTR+1
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.3 jsr DecFrameLen
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beq .8
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2016-03-30 06:30:41 +00:00
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lda L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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sta (ZPTmpPTR),y
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iny
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bne .2
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inc ZPTmpPTR+1
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bra .2
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.8 lda #L91C96.2.MMUCR.REMREL
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sta L91C96.2.MMUCR,x
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clc
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2016-01-10 22:16:07 +00:00
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rts
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2016-03-13 22:07:01 +00:00
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.99 sec
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rts
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2016-01-10 22:16:07 +00:00
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*--------------------------------------
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CLOSE jsr Reset
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clc
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rts
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*--------------------------------------
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* in:
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* out:
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* Y,A = BUFFER PTR
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* CC on success
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* CS on error
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*--------------------------------------
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2016-03-13 22:07:01 +00:00
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GETINFO lda #S.DEVINFO.NET.STATUS.10
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sta LINK.STATUS
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ldx DEVSLOTx0
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2016-03-30 15:54:47 +00:00
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stz L91C96.BSR,x
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2016-03-13 22:07:01 +00:00
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lda L91C96.0.EPHSR,x
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lda L91C96.0.EPHSR+1,x
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and /L91C96.0.EPHSR.LINK
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beq .1
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lda LINK.STATUS
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ora #S.DEVINFO.NET.STATUS.OK
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sta LINK.STATUS
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.1 lda L91C96.0.TCR,x
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lda L91C96.0.TCR+1,x
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and /L91C96.0.TCR.FDSE
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bne .2
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lda LINK.STATUS
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ora #S.DEVINFO.NET.STATUS.FD
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sta LINK.STATUS
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.2 >LDYA L.DEVINFO
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2016-01-10 22:16:07 +00:00
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clc
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rts
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*--------------------------------------
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* in:
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* PULLW = FRAME PTR
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* PULLW = FRAME LEN
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* out:
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* CC on success
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* CS on error
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*--------------------------------------
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2016-03-13 22:07:01 +00:00
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SEND >PULLW ZPTmpPTR
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ldx DEVSLOTx0
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lda #2
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sta L91C96.BSR,x
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lda (ZPTmpPTR)
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sta FRAMELEN
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2016-01-10 22:16:07 +00:00
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clc
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2016-03-13 22:07:01 +00:00
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adc #6 3 WORDs more Status, len & Control
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2016-03-31 20:07:47 +00:00
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bne .10
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clc LO byte is 0, no need for an extra empty page
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2016-03-24 17:02:50 +00:00
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2016-03-31 20:07:47 +00:00
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.10 ldy #1
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2016-03-13 22:07:01 +00:00
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lda (ZPTmpPTR),y
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sta FRAMELEN+1
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adc #0
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.1 ora #L91C96.2.MMUCR.ALLOC
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sta L91C96.2.MMUCR,x
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ldy #0
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.2 lda L91C96.2.IST,x
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and #L91C96.2.IST.ALLOC
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bne .3
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dey
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bne .2
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2016-03-20 22:12:57 +00:00
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lda #ERR.DEV.NOBUFFER
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2016-03-13 22:07:01 +00:00
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sec
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rts
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.3 lda L91C96.2.AAR,x
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sta L91C96.2.PNR,x
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2016-03-30 06:30:41 +00:00
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lda #L91C96.2.PTR.AUTOI
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2016-03-13 22:07:01 +00:00
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sta L91C96.2.PTR,x
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2016-03-30 06:30:41 +00:00
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lda /L91C96.2.PTR.AUTOI
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2016-03-13 22:07:01 +00:00
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sta L91C96.2.PTR+1,x
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2016-03-30 06:30:41 +00:00
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ldy #S.ETH.SRCMAC+5 Add Src MAC Address
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2016-03-13 22:07:01 +00:00
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ldx #5
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.4 lda MAC,x
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sta (ZPTmpPTR),y
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dey
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dex
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bpl .4
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ldx DEVSLOTx0
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2016-03-30 15:54:47 +00:00
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stz L91C96.2.DATA,x write fake status word
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2016-03-30 06:30:41 +00:00
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stz L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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lda FRAMELEN
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pha
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2016-03-30 15:54:47 +00:00
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eor #$01
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2016-03-13 22:07:01 +00:00
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lsr
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pla
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2016-03-30 15:54:47 +00:00
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adc #$05 add 5 if odd, 6 if even
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2016-03-13 22:07:01 +00:00
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sta L91C96.2.DATA,x
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lda FRAMELEN+1
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2016-03-30 15:54:47 +00:00
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adc #$00
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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ldy #2
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.5 jsr DecFrameLen
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beq .70
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lda (ZPTmpPTR),y
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iny
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bne .6
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inc ZPTmpPTR+1
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.6 pha
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jsr DecFrameLen
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beq .71
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pla
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sta L91C96.2.DATA,x
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lda (ZPTmpPTR),y
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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iny
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bne .5
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inc ZPTmpPTR+1
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bra .5
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.70 lda #0
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sta L91C96.2.DATA,x
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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bra .8
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2016-03-30 15:54:47 +00:00
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.71 pla
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2016-03-13 22:07:01 +00:00
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sta L91C96.2.DATA,x
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2016-03-30 15:54:47 +00:00
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lda #%00100000 signal an extra (odd) byte
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2016-03-30 06:30:41 +00:00
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sta L91C96.2.DATA,x
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2016-03-13 22:07:01 +00:00
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.8 lda #L91C96.2.MMUCR.NQPKT
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sta L91C96.2.MMUCR,x
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clc
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rts
|
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|
.9 sec
|
|
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|
rts
|
2016-01-10 22:16:07 +00:00
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*--------------------------------------
|
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* PRIVATE
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*--------------------------------------
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Reset ldx DEVSLOTx0
|
2016-03-30 15:54:47 +00:00
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stz L91C96.BSR,x
|
2016-03-13 22:07:01 +00:00
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lda #L91C96.0.RCR.RESET
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sta L91C96.0.RCR,x
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lda /L91C96.0.RCR.RESET
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sta L91C96.0.RCR+1,x
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lda $C019 we can use VBL as we are not on //c
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.1 eor $C019
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bpl .1
|
2016-03-30 15:54:47 +00:00
|
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lda $C019
|
2016-03-13 22:07:01 +00:00
|
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|
.2 eor $C019
|
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bpl .2
|
2016-03-30 15:54:47 +00:00
|
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stz L91C96.0.RCR,x
|
|
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stz L91C96.0.RCR+1,x
|
2016-01-10 22:16:07 +00:00
|
|
|
|
rts
|
|
|
|
|
*--------------------------------------
|
|
|
|
|
DecFrameLen lda FRAMELEN
|
|
|
|
|
bne .1
|
|
|
|
|
lda FRAMELEN+1
|
|
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|
|
beq .8
|
|
|
|
|
dec FRAMELEN+1
|
|
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|
|
.1 dec FRAMELEN
|
|
|
|
|
lda #1 Make something NZ
|
|
|
|
|
.8 rts
|
|
|
|
|
*--------------------------------------
|
|
|
|
|
DRV.CS.END
|
|
|
|
|
*--------------------------------------
|
|
|
|
|
DEVSLOTx0 .BS 1
|
2016-03-13 22:07:01 +00:00
|
|
|
|
USERMAC .BS 1
|
2016-01-10 22:16:07 +00:00
|
|
|
|
FRAMELEN .BS 2
|
|
|
|
|
*--------------------------------------
|
|
|
|
|
DEVINFO .DA #S.DEVINFO.TYPE.NET
|
|
|
|
|
DEVFLAGS .DA #0
|
|
|
|
|
MAC .BS 6
|
2016-03-13 22:07:01 +00:00
|
|
|
|
LINK.STATUS .BS 1 OK/DUPLEX/SPEED
|
2016-01-10 22:16:07 +00:00
|
|
|
|
*--------------------------------------
|
|
|
|
|
MAN
|
|
|
|
|
SAVE DRV/LANCEGS.DRV.S
|
|
|
|
|
ASM
|