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A2osX/DRV/DHGR.DRV.T.txt

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KM.RAMWORKS:Fixed timing issues (i hope!)
2016-06-19 20:31:57 +00:00
PR#3
Kernel version 0.9 : MEDIA reorganisation
2017-03-29 15:48:15 +00:00
PREFIX /A2OSX.BUILD
KM.RAMWORKS:Fixed timing issues (i hope!)
2016-06-19 20:31:57 +00:00
NEW
INC 1
AUTO 6
.LIST OFF
*--------------------------------------
Mono.NMasks .DA #%01111110
.DA #%01111101
.DA #%01111011
.DA #%01110111
.DA #%01101111
.DA #%01011111
.DA #%00111111
*--------------------------------------
Mono.Masks .DA #%00000001
.DA #%00000010
.DA #%00000100
.DA #%00001000
.DA #%00010000
.DA #%00100000
.DA #%01000000
*--------------------------------------
* bits to "and" to reset color of pixel (0 means nothing to do)
* 4 bytes * 7 mods
*--------------------------------------
* c1110000 c3322221 c5444433 c6666555
Color.NMasks .DA #%01110000,#%00000000,#%00000000,#%00000000
.DA #%00001111,#%01111110,#%00000000,#%00000000
.DA #%00000000,#%01100001,#%00000000,#%00000000
.DA #%00000000,#%00011111,#%01111100,#%00000000
.DA #%00000000,#%00000000,#%01000011,#%00000000
.DA #%00000000,#%00000000,#%00111111,#%01111000
.DA #%00000000,#%00000000,#%00000000,#%00000111
*--------------------------------------
* bits to "and" to Get color of pixel (0 means nothing to do)
* 4 bytes * 7 mods
*--------------------------------------
* c1110000 c3322221 c5444433 c6666555
Color.Masks .DA #%10001111,#%00000000,#%00000000,#%00000000
.DA #%11110000,#%00000001,#%00000000,#%00000000
.DA #%00000000,#%10011110,#%00000000,#%00000000
.DA #%00000000,#%11100000,#%00000011,#%00000000
.DA #%00000000,#%00000000,#%10111100,#%00000000
.DA #%00000000,#%00000000,#%11000000,#%00000111
.DA #%00000000,#%00000000,#%00000000,#%11111000
*--------------------------------------
* bits to "ora" to set color of pixel (including "color bit set" for byte hosting bit0)
* 4 bytes * 16 Colors
*--------------------------------------
* c1110000 c3322221 c5444433 c6666555
Color.Pixels .DA #%00000000,#%00000000,#%00000000,#%00000000 black (color bit disable)
.DA #%01111111,#%01111111,#%01111111,#%01111111 white (color bit disable)
.DA #%10010001,#%10100010,#%11000100,#%10001000 dark blue
.DA #%10100010,#%11000100,#%10001000,#%10010001 dark green
.DA #%10110011,#%11100110,#%11001100,#%10011001 medium blue
.DA #%11000100,#%10001000,#%10010001,#%10100010 brown
.DA #%11010101,#%10101010,#%11010101,#%10101010 grey2
.DA #%11100110,#%11001100,#%10011001,#%10110011 green
.DA #%11110111,#%11101110,#%11011101,#%10111011 aqua
.DA #%10001000,#%10010001,#%10100010,#%11000100 Magenta
.DA #%10011001,#%10110011,#%11100110,#%11001100 violet
.DA #%10101010,#%11010101,#%10101010,#%11010101 grey1
.DA #%10111011,#%11110111,#%11101110,#%11011101 light blue
.DA #%11001100,#%10011001,#%10110011,#%11100110 orange
.DA #%11011101,#%10111011,#%11110111,#%11101110 pink
.DA #%11101110,#%11011101,#%10111011,#%11110111 yellow
*--------------------------------------
GUI:Work in progress
2016-07-22 14:11:13 +00:00
* COL*2+AUX Bit
KM.RAMWORKS:Fixed timing issues (i hope!)
2016-06-19 20:31:57 +00:00
*--------------------------------------
Kernel version 0.8 : Bug correction in Desktop event hndler, DHGR tables corrcted.
2016-10-10 15:55:26 +00:00
DIV7.0 .HS 0000000000000001010101010101
.HS 0202020202020203030303030303
.HS 0404040404040405050505050505
.HS 0606060606060607070707070707
.HS 0808080808080809090909090909
.HS 0A0A0A0A0A0A0A0B0B0B0B0B0B0B
.HS 0C0C0C0C0C0C0C0D0D0D0D0D0D0D
.HS 0E0E0E0E0E0E0E0F0F0F0F0F0F0F
.HS 1010101010101011111111111111
.HS 1212121212121213131313131313
.HS 1414141414141415151515151515
.HS 1616161616161617171717171717
.HS 1818181818181819191919191919
.HS 1A1A1A1A1A1A1A1B1B1B1B1B1B1B
.HS 1C1C1C1C1C1C1C1D1D1D1D1D1D1D
.HS 1E1E1E1E1E1E1E1F1F1F1F1F1F1F
.HS 2020202020202021212121212121
.HS 2222222222222223232323232323
.HS 24242424
DIV7.256 .HS 24242425252525252525
.HS 2626262626262627272727272727
.HS 2828282828282829292929292929
.HS 2A2A2A2A2A2A2A2B2B2B2B2B2B2B
.HS 2C2C2C2C2C2C2C2D2D2D2D2D2D2D
.HS 2E2E2E2E2E2E2E2F2F2F2F2F2F2F
.HS 3030303030303031313131313131
.HS 3232323232323233333333333333
.HS 3434343434343435353535353535
.HS 3636363636363637373737373737
.HS 3838383838383839393939393939
.HS 3A3A3A3A3A3A3A3B3B3B3B3B3B3B
.HS 3C3C3C3C3C3C3C3D3D3D3D3D3D3D
.HS 3E3E3E3E3E3E3E3F3F3F3F3F3F3F
.HS 4040404040404041414141414141
.HS 4242424242424243434343434343
.HS 4444444444444445454545454545
.HS 4646464646464647474747474747
.HS 4848484848484849
DIV7.512 .HS 494949494949
.HS 4A4A4A4A4A4A4A4B4B4B4B4B4B4B
.HS 4C4C4C4C4C4C4C4D4D4D4D4D4D4D
.HS 4E4E4E4E4E4E4E4F4F4F4F4F4F4F
GUI:Work in progress
2016-07-22 14:11:13 +00:00
*--------------------------------------
MOD7.0 .HS 00
MOD7.512 .HS 010203
MOD7.256 .HS 040506
KM.RAMWORKS:Fixed timing issues (i hope!)
2016-06-19 20:31:57 +00:00
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
.HS 0001020304050600010203040506
GUI:Work in progress
2016-07-22 14:11:13 +00:00
.HS 00
KM.RAMWORKS:Fixed timing issues (i hope!)
2016-06-19 20:31:57 +00:00
*--------------------------------------
BASEL .HS 00.00.00.00.00.00.00.00
.HS 80.80.80.80.80.80.80.80
.HS 00.00.00.00.00.00.00.00
.HS 80.80.80.80.80.80.80.80
.HS 00.00.00.00.00.00.00.00
.HS 80.80.80.80.80.80.80.80
.HS 00.00.00.00.00.00.00.00
.HS 80.80.80.80.80.80.80.80
.HS 28.28.28.28.28.28.28.28
.HS A8.A8.A8.A8.A8.A8.A8.A8
.HS 28.28.28.28.28.28.28.28
.HS A8.A8.A8.A8.A8.A8.A8.A8
.HS 28.28.28.28.28.28.28.28
.HS A8.A8.A8.A8.A8.A8.A8.A8
.HS 28.28.28.28.28.28.28.28
.HS A8.A8.A8.A8.A8.A8.A8.A8
.HS 50.50.50.50.50.50.50.50
.HS D0.D0.D0.D0.D0.D0.D0.D0
.HS 50.50.50.50.50.50.50.50
.HS D0.D0.D0.D0.D0.D0.D0.D0
.HS 50.50.50.50.50.50.50.50
.HS D0.D0.D0.D0.D0.D0.D0.D0
.HS 50.50.50.50.50.50.50.50
.HS D0.D0.D0.D0.D0.D0.D0.D0
*--------------------------------------
BASEH .HS 20.24.28.2C.30.34.38.3C
.HS 20.24.28.2C.30.34.38.3C
.HS 21.25.29.2D.31.35.39.3D
.HS 21.25.29.2D.31.35.39.3D
.HS 22.26.2A.2E.32.36.3A.3E
.HS 22.26.2A.2E.32.36.3A.3E
.HS 23.27.2B.2F.33.37.3B.3F
.HS 23.27.2B.2F.33.37.3B.3F
.HS 20.24.28.2C.30.34.38.3C
.HS 20.24.28.2C.30.34.38.3C
.HS 21.25.29.2D.31.35.39.3D
.HS 21.25.29.2D.31.35.39.3D
.HS 22.26.2A.2E.32.36.3A.3E
.HS 22.26.2A.2E.32.36.3A.3E
.HS 23.27.2B.2F.33.37.3B.3F
.HS 23.27.2B.2F.33.37.3B.3F
.HS 20.24.28.2C.30.34.38.3C
.HS 20.24.28.2C.30.34.38.3C
.HS 21.25.29.2D.31.35.39.3D
.HS 21.25.29.2D.31.35.39.3D
.HS 22.26.2A.2E.32.36.3A.3E
.HS 22.26.2A.2E.32.36.3A.3E
.HS 23.27.2B.2F.33.37.3B.3F
.HS 23.27.2B.2F.33.37.3B.3F
*--------------------------------------
MAN
SAVE DRV/DHGR.DRV.T
LOAD DRV/DHGR.DRV.S
ASM
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