A2osX/DRV/UTHERNET.DRV.S.txt

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2017-12-22 21:24:30 +00:00
NEW
2019-05-02 09:52:32 +00:00
AUTO 3,1
2016-04-18 20:15:34 +00:00
.LIST OFF
2015-03-14 21:48:35 +00:00
.OP 65C02
.OR $2000
2020-05-14 11:47:46 +00:00
.TF drv/uthernet.drv
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*--------------------------------------
2020-05-25 13:58:59 +00:00
.INB inc/macros.i
.INB inc/a2osx.i
.INB inc/mli.e.i
.INB inc/nic.i
.INB inc/nic.8900a.i
.INB inc/eth.i
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*--------------------------------------
2020-03-23 07:08:27 +00:00
.DUMMY
.OR ZPBIN
ZS.START
ZPArgPtr .BS 2
DEVSLOT0x .BS 1
ZS.END .ED
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*--------------------------------------
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* File Header (16 Bytes)
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*--------------------------------------
CS.START cld
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jmp Dev.Detect cld,jmp abs=DRV
.DA #$61 6502,Level 1 (65c02)
.DA #1 DRV Layout Version 1
.DA 0
.DA CS.END-CS.START Code Length
2018-07-23 06:28:47 +00:00
.DA 0
.DA 0
.DA 0
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*--------------------------------------
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* Relocation Table
*--------------------------------------
L.MSG.DETECT .DA MSG.DETECT
L.MSG.DETECT.OK .DA MSG.DETECT.OK
L.MSG.DETECT.KO .DA MSG.DETECT.KO
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L.DRV.CS.START .DA DRV.CS.START
L.FD.DEV .DA FD.DEV
L.FD.DEV.NAME .DA FD.DEV.NAME
L.SSCANF.MAC .DA SSCANF.MAC
L.MAC0 .DA DCB+S.DCB.NIC.MAC
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.DA DCB+S.DCB.NIC.MAC+1
.DA DCB+S.DCB.NIC.MAC+2
.DA DCB+S.DCB.NIC.MAC+3
.DA DCB+S.DCB.NIC.MAC+4
.DA DCB+S.DCB.NIC.MAC+5
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.DA 0 End Of Reloc Table
*--------------------------------------
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Dev.Detect >STYA ZPArgPtr
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>LDYA L.MSG.DETECT
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>SYSCALL PutS
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ldx #$70
ldy #7
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.1 lda A2osX.S-1,y IO based detection, avoid scanning in Disk Controller IO!!!!
bne .2
lda /PP.ID
sta PacketPagePTR+1,x
lda #PP.ID
sta PacketPagePTR,x
lda PacketPageDATA+1,x
cmp /CS8900A.DEVID
bne .2
lda PacketPageDATA,x
cmp #CS8900A.DEVID
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beq .3
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.2 dec FD.DEV.NAME+3
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txa
sec
sbc #$10
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tax
dey
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bne .1
>LDYA L.MSG.DETECT.KO
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>SYSCALL PutS
lda #MLI.E.NODEV
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sec
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.99 rts
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2016-01-10 22:16:07 +00:00
.3 stx DEVSLOTx0
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sty DEVSLOT0x
lda /PP.REVISION Get Revision# of ths chip...
sta PacketPagePTR+1,x
lda #PP.REVISION
sta PacketPagePTR,x
lda PacketPageDATA+1,x
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sta DIB+S.DIB.VERSION+1 set Hardware version
lda PacketPageDATA,x
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sta DIB+S.DIB.VERSION
jsr Dev.ParseArgs
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bcs .99
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.8 >PUSHW L.MSG.DETECT.OK
>PUSHW L.FD.DEV.NAME
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>PUSHBI 2
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>SYSCALL PrintF
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>PUSHWI DRV.END
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>PUSHWI DRV.CS.END-DRV.CS.START
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>PUSHWI DRV.CS.START
>LDYA L.DRV.CS.START
>SYSCALL InsDrv
bcs .9
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2018-07-23 06:28:47 +00:00
>STYA FD.DEV+S.FD.DEV.DRVPTR
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>PUSHW L.FD.DEV
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>PUSHW L.FD.DEV.NAME
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>SYSCALL MKDev
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bcs .9
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ldx DEVSLOT0x
lda #A2osX.S.NIC
sta A2osX.S-1,x
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* clc
.9 rts
2018-07-23 06:28:47 +00:00
*--------------------------------------
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Dev.ParseArgs lda (ZPArgPtr)
2018-07-23 06:28:47 +00:00
bne .1
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lda A2osX.R16
eor A2osX.T16
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sta DCB+S.DCB.NIC.MAC+3
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eor A2osX.R16+1
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sta DCB+S.DCB.NIC.MAC+4
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eor A2osX.T16+1
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sta DCB+S.DCB.NIC.MAC+5
clc
rts
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.1 >PUSHW ZPArgPtr
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>PUSHW L.SSCANF.MAC
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ldx #0
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.2 >PUSHW L.MAC0,x
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inx
inx
cpx #12
bne .2
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2018-07-23 06:28:47 +00:00
>PUSHBI 12 6 x byte PTRs
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>SYSCALL SScanF
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bcc .8
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2018-10-21 20:54:07 +00:00
lda #E.SYN
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* sec
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.8 rts
2015-06-03 18:30:57 +00:00
*--------------------------------------
CS.END
MSG.DETECT .CZ "UtherNet/CS8900A Driver."
MSG.DETECT.OK .CZ "UtherNet/CS8900A Installed As Device : %s\r\n"
MSG.DETECT.KO .CZ "Hardware Not Found."
SSCANF.MAC .CZ "%h:%h:%h:%h:%h:%h"
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*--------------------------------------
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FD.DEV .DA #S.FD.T.CDEV
.DA #0 HANDLER
.DA #0 BUSID
.DA #0 DEVID
.DA 0 BUSPTR
.BS 2 DRVPTR
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.DA 0 DCBPTR
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.DA 0 BUFPTR
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FD.DEV.NAME .AZ "eth7"
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*--------------------------------------
* Driver Code
*--------------------------------------
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ZPIOCTL .EQ ZPDRV
ZPBufPtr .EQ ZPDRV+2
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Counter .EQ ZPDRV+4
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*--------------------------------------
DRV.CS.START cld
jmp (.1,x)
.1 .DA STATUS
.DA A2osX.BADCALL
.DA A2osX.BADCALL
.DA A2osX.BADCALL
2018-08-27 05:39:42 +00:00
.DA A2osX.BADCALL
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.DA A2osX.BADCALL
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.DA OPEN
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.DA CLOSE
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.DA READ
.DA WRITE
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.DA 0 end or relocation
*--------------------------------------
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STATUS >STYA ZPIOCTL
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ldy #S.IOCTL.S
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lda (ZPIOCTL),y
beq .1
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cmp #S.IOCTL.S.GETDIB
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bne STATUS.DCB
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ldx #S.DIB-1
.HS 2C BIT ABS
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.1 ldx #3
ldy #S.IOCTL.BUFPTR
lda (ZPIOCTL),y
sta .3+1
iny
lda (ZPIOCTL),y
sta .3+2
2023-10-18 05:41:12 +00:00
2018-07-23 06:28:47 +00:00
.2 lda DIB,x
2023-10-18 05:41:12 +00:00
2018-07-23 06:28:47 +00:00
.3 sta $ffff,x SELF MODIFIED
dex
bpl .2
2023-10-18 05:41:12 +00:00
2018-07-23 06:28:47 +00:00
clc
rts
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2021-05-04 17:31:21 +00:00
STATUS.DCB cmp #S.IOCTL.S.GETDCB
2018-07-23 06:28:47 +00:00
bne STATUS.9
2018-08-27 05:39:42 +00:00
2018-07-23 06:28:47 +00:00
stz DCB+S.DCB.NIC.LINK
2017-01-12 17:43:45 +00:00
ldx DEVSLOTx0
lda /PP.LineST
sta PacketPagePTR+1,x
lda #PP.LineST
sta PacketPagePTR,x
lda PacketPageDATA+1,x
lda PacketPageDATA,x
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and #PP.LineST.LinkOK
beq .1
2018-07-23 06:28:47 +00:00
lda #S.DCB.NIC.LINK.OK
tsb DCB+S.DCB.NIC.LINK
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2018-07-23 06:28:47 +00:00
lda /PP.TestCTL
sta PacketPagePTR+1,x
lda #PP.TestCTL
sta PacketPagePTR,x
lda PacketPageDATA+1,x
ldy PacketPageDATA,x
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and /PP.TestCTL.FDX
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beq .1
2018-07-23 06:28:47 +00:00
lda #S.DCB.NIC.LINK.FD
tsb DCB+S.DCB.NIC.LINK
2018-07-23 06:28:47 +00:00
.1 ldy #S.IOCTL.BUFPTR
lda (ZPIOCTL),y
sta .3+1
iny
lda (ZPIOCTL),y
sta .3+2
ldx #S.DCB.NIC-1
2018-07-23 06:28:47 +00:00
.2 lda DCB,x
2018-07-23 06:28:47 +00:00
.3 sta $ffff,x SELF MODIFIED
dex
bpl .2
clc
rts
2018-07-23 06:28:47 +00:00
STATUS.9 lda #MLI.E.BADCTL
sec
2019-10-03 06:25:27 +00:00
rts
2018-07-23 06:28:47 +00:00
*--------------------------------------
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* crc32(090007FFFFFF) = 0ba4eec0 : 0b>>2 = 3 = 00100000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
* crc32(FFFFFFFFFFFF) = 41d9ed00
*--------------------------------------
2019-02-23 22:01:58 +00:00
OPEN lda #S.DIB.S.OPENED
bit DIB+S.DIB.S
2023-10-18 05:41:12 +00:00
beq .1
lda #MLI.E.OPEN
sec
rts
2023-10-18 05:41:12 +00:00
.1 jsr CLOSE
2018-07-23 06:28:47 +00:00
2018-08-27 05:39:42 +00:00
* ldx DEVSLOTx0 Done by CLOSE
2018-07-23 06:28:47 +00:00
lda /PP.RxCTL
sta PacketPagePTR+1,x
lda #PP.RxCTL
sta PacketPagePTR,x
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lda /PP.RxCTL.LID+PP.RxCTL.IAHashA+PP.RxCTL.RxOKA+PP.RxCTL.IA+PP.RxCTL.MulticastA+PP.RxCTL.BroadcastA+PP.RxCTL.RuntA
2018-07-23 06:28:47 +00:00
sta PacketPageDATA+1,x
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lda #PP.RxCTL.LID+PP.RxCTL.IAHashA+PP.RxCTL.RxOKA+PP.RxCTL.IA+PP.RxCTL.MulticastA+PP.RxCTL.BroadcastA+PP.RxCTL.RuntA
2018-07-23 06:28:47 +00:00
sta PacketPageDATA,x
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* lda /PP.LAF
* sta PacketPagePTR+1,x
* lda #PP.LAF
* sta PacketPagePTR,x
* lda #%00000000
* sta PacketPageDATA+1,x
* lda #%00000000
* sta PacketPageDATA,x
* lda /PP.LAF+2
* sta PacketPagePTR+1,x
* lda #PP.LAF+2
* sta PacketPagePTR,x
* lda #%00000000
* sta PacketPageDATA+1,x
* lda #%00000000
* sta PacketPageDATA,x
* lda /PP.LAF+4
* sta PacketPagePTR+1,x
* lda #PP.LAF+4
* sta PacketPagePTR,x
* lda #%00000000
* sta PacketPageDATA+1,x
* lda #%00000000
* sta PacketPageDATA,x
lda /PP.LAF+6
sta PacketPagePTR+1,x
lda #PP.LAF+6
sta PacketPagePTR,x
lda #%00100000
sta PacketPageDATA+1,x
* lda #%00000000
* sta PacketPageDATA,x
2018-07-23 06:28:47 +00:00
lda /PP.MAC
sta PacketPagePTR+1,x
lda #PP.MAC
sta PacketPagePTR,x
lda DCB+S.DCB.NIC.MAC+1
sta PacketPageDATA+1,x
lda DCB+S.DCB.NIC.MAC+0
sta PacketPageDATA,x
lda /PP.MAC+2
sta PacketPagePTR+1,x
lda #PP.MAC+2
sta PacketPagePTR,x
lda DCB+S.DCB.NIC.MAC+3
sta PacketPageDATA+1,x
lda DCB+S.DCB.NIC.MAC+2
sta PacketPageDATA,x
lda /PP.MAC+4
sta PacketPagePTR+1,x
lda #PP.MAC+4
sta PacketPagePTR,x
lda DCB+S.DCB.NIC.MAC+5
sta PacketPageDATA+1,x
lda DCB+S.DCB.NIC.MAC+4
sta PacketPageDATA,x
2018-07-23 06:28:47 +00:00
lda /PP.LineCTL
sta PacketPagePTR+1,x
lda #PP.LineCTL
sta PacketPagePTR,x
lda /PP.LineCTL.LID+PP.LineCTL.SerRxOn+PP.LineCTL.SerTxOn+PP.LineCTL.10BaseT
sta PacketPageDATA+1,x
lda #PP.LineCTL.LID+PP.LineCTL.SerRxOn+PP.LineCTL.SerTxOn+PP.LineCTL.10BaseT
sta PacketPageDATA,x
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2018-07-23 06:28:47 +00:00
lda #S.DIB.S.OPENED
tsb DIB+S.DIB.S
2023-10-18 05:41:12 +00:00
clc
2019-02-23 22:01:58 +00:00
rts
2018-07-23 06:28:47 +00:00
*--------------------------------------
CLOSE ldx DEVSLOTx0
lda /PP.SelfCTL
sta PacketPagePTR+1,x
lda #PP.SelfCTL
sta PacketPagePTR,x
lda /PP.SelfCTL.LID+PP.SelfCTL.RESET
sta PacketPageDATA+1,x
lda #PP.SelfCTL.LID+PP.SelfCTL.RESET
sta PacketPageDATA,x
lda /PP.SelfST
sta PacketPagePTR+1,x
lda #PP.SelfST
sta PacketPagePTR,x
2018-07-23 06:28:47 +00:00
ldy #0
2018-07-23 06:28:47 +00:00
.1 lda PacketPageDATA+1,x
lda PacketPageDATA,x
and #PP.SelfST.InitDone
bne .8
2018-07-23 06:28:47 +00:00
iny
bne .1
2018-07-23 06:28:47 +00:00
.8 lda #S.DIB.S.OPENED
trb DIB+S.DIB.S
2015-06-03 18:30:57 +00:00
clc
2015-03-14 21:48:35 +00:00
rts
*--------------------------------------
2018-08-25 11:23:59 +00:00
READ php
sei
2016-03-13 22:07:01 +00:00
2018-08-25 11:23:59 +00:00
>STYA ZPIOCTL
ldx DEVSLOTx0
2019-06-21 06:33:46 +00:00
lda /PP.RxEvent
sta PacketPagePTR+1,x
2019-06-21 06:33:46 +00:00
lda #PP.RxEvent
sta PacketPagePTR,x
lda PacketPageDATA+1,x
ldy PacketPageDATA,x
and /PP.RxEvent.RxOK+PP.RxEvent.IA+PP.RxEvent.Brdcast+PP.RxEvent.Runt
2019-06-20 06:39:28 +00:00
beq READWRITE.9
2017-01-26 21:57:35 +00:00
2019-06-21 06:33:46 +00:00
lda RTDATA+1,x discard RxStatus
lda RTDATA,x
lda RTDATA+1,x get RxLength
2018-08-08 15:13:37 +00:00
ldy #S.IOCTL.BYTECNT+1
sta (ZPIOCTL),y
pha
eor #$ff
sta Counter+1
2023-10-18 05:41:12 +00:00
2018-08-08 15:13:37 +00:00
dey
lda RTDATA,x
2018-08-08 15:13:37 +00:00
sta (ZPIOCTL),y
tay
2019-05-20 15:42:20 +00:00
2019-05-20 19:10:35 +00:00
eor #$ff
2018-08-08 15:13:37 +00:00
sta Counter
2019-05-20 19:10:35 +00:00
2018-08-08 15:13:37 +00:00
pla
2020-08-25 14:54:30 +00:00
>SYSCALL2 GetMem
2019-06-21 06:33:46 +00:00
bcs READWRITE.99
2018-07-23 06:28:47 +00:00
>STYA ZPBufPtr
2019-01-05 20:33:08 +00:00
phx
2018-08-08 15:13:37 +00:00
phy
ldy #S.IOCTL.BUFPTR+1
2018-07-24 06:24:23 +00:00
sta (ZPIOCTL),y
2018-08-08 15:13:37 +00:00
dey
pla
2018-07-24 06:24:23 +00:00
sta (ZPIOCTL),y
2016-03-13 22:07:01 +00:00
ldx DEVSLOTx0
2018-08-08 15:13:37 +00:00
ldy #0
.1 inc Counter
bne .2
2016-04-07 06:13:41 +00:00
inc Counter+1
2016-03-13 22:07:01 +00:00
beq .8
.2 lda RTDATA,x
2018-07-23 06:28:47 +00:00
sta (ZPBufPtr),y
2015-03-14 21:48:35 +00:00
iny
inc Counter
bne .3
inc Counter+1
beq .8
2023-10-18 05:41:12 +00:00
.3 lda RTDATA+1,x
2018-07-23 06:28:47 +00:00
sta (ZPBufPtr),y
2015-03-14 21:48:35 +00:00
iny
bne .1
2018-07-23 06:28:47 +00:00
inc ZPBufPtr+1
bra .1
2019-01-05 20:33:08 +00:00
.8 pla hMem
2018-07-23 06:28:47 +00:00
plp
2017-01-26 21:57:35 +00:00
clc
2019-06-21 06:33:46 +00:00
rts
*--------------------------------------
2019-06-20 06:39:28 +00:00
READWRITE.9 lda #E.NODATA
2019-06-21 06:33:46 +00:00
READWRITE.99 plp
2019-06-20 06:39:28 +00:00
sec
2019-06-21 06:33:46 +00:00
rts
2015-06-03 18:30:57 +00:00
*--------------------------------------
2018-08-25 11:23:59 +00:00
WRITE php
2018-07-23 06:28:47 +00:00
sei
2018-08-25 11:23:59 +00:00
>STYA ZPIOCTL
2015-03-14 21:48:35 +00:00
ldx DEVSLOTx0
2019-06-18 06:43:58 +00:00
lda /PP.TxCMD.LID+PP.TxCMD.TxStartFULL
sta TxCMD+1,x
lda #PP.TxCMD.LID+PP.TxCMD.TxStartFULL
sta TxCMD,x
2018-07-23 06:28:47 +00:00
ldy #S.IOCTL.BYTECNT+1
lda (ZPIOCTL),y
sta TxLength+1,x
eor #$ff
sta Counter+1
2018-07-23 06:28:47 +00:00
dey
lda (ZPIOCTL),y
sta TxLength,x
eor #$ff
sta Counter
2019-06-18 12:21:25 +00:00
2023-10-18 05:41:12 +00:00
lda /PP.BusST
sta PacketPagePTR+1,x
2023-10-18 05:41:12 +00:00
lda #PP.BusST
sta PacketPagePTR,x
2019-06-18 12:21:25 +00:00
lda PacketPageDATA+1,x
ldy PacketPageDATA,x
2019-07-07 20:48:57 +00:00
bit /PP.BusST.Rdy4TxNOW
2019-06-20 06:39:28 +00:00
beq READWRITE.9
2019-06-18 12:21:25 +00:00
ldy #S.IOCTL.BUFPTR
2018-08-25 11:23:59 +00:00
lda (ZPIOCTL),y
sta ZPBufPtr
iny
lda (ZPIOCTL),y
sta ZPBufPtr+1
2018-08-25 11:23:59 +00:00
ldx #5
ldy #S.ETH.SRCMAC+5
.1 lda DCB+S.DCB.NIC.MAC,x
2018-08-25 11:23:59 +00:00
sta (ZPBufPtr),y
dey
dex
bpl .1
2018-08-25 11:23:59 +00:00
ldx DEVSLOTx0
ldy #0
2016-03-13 22:07:01 +00:00
.2 inc Counter
bne .3
2016-04-07 06:13:41 +00:00
inc Counter+1
2016-03-13 22:07:01 +00:00
beq .8
.3 lda (ZPBufPtr),y
2015-03-14 21:48:35 +00:00
sta RTDATA,x
2015-03-14 21:48:35 +00:00
iny
inc Counter
bne .4
inc Counter+1
beq .8
2023-10-18 05:41:12 +00:00
.4 lda (ZPBufPtr),y
2015-03-14 21:48:35 +00:00
sta RTDATA+1,x
2015-03-14 21:48:35 +00:00
iny
bne .2
2018-07-23 06:28:47 +00:00
inc ZPBufPtr+1
bne .2
.8 plp
clc
2019-06-21 06:33:46 +00:00
rts
2015-03-14 21:48:35 +00:00
*--------------------------------------
2017-01-26 21:57:35 +00:00
DRV.CS.END
2015-03-14 21:48:35 +00:00
DEVSLOTx0 .BS 1
*--------------------------------------
2018-07-23 06:28:47 +00:00
DIB .DA #0
.DA #0,#0,#0 size
.PS "Uthernet/CS8900A"
2018-07-23 06:28:47 +00:00
.DA #S.DIB.T.NIC
.BS 1 Subtype
.BS 2 Version
*--------------------------------------
2018-07-23 06:28:47 +00:00
DCB .DA #S.DCB.T.NIC
.BS 1 FLAGS
.BS 1 LINK
2018-08-27 05:39:42 +00:00
.DA #S.DCB.NIC.SPEED.10
2018-07-23 06:28:47 +00:00
.HS 000E3A123456 MAC
2018-08-25 11:23:59 +00:00
.BS 12 IP/MASK/GW
2018-07-23 06:28:47 +00:00
*--------------------------------------
DRV.END
2015-03-14 21:48:35 +00:00
MAN
2020-05-25 13:58:59 +00:00
SAVE usr/src/drv/uthernet.drv.s
2015-03-14 21:48:35 +00:00
ASM