2015-03-14 21:48:35 +00:00
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PR#3
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2017-03-29 15:48:15 +00:00
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PREFIX /A2OSX.BUILD
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2017-02-06 17:04:03 +00:00
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LOMEM $A00
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2015-03-14 21:48:35 +00:00
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INC 1
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AUTO 6
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.LIST OFF
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.OP 65C02
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.OR $2000
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2017-03-29 15:48:15 +00:00
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.TF /A2OSX.BUILD/DRV/DHGR.DRV
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2015-03-14 21:48:35 +00:00
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*--------------------------------------
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2017-03-29 15:48:15 +00:00
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.INB /A2OSX.BUILD/INC/MACROS.I
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.INB /A2OSX.BUILD/INC/A2OSX.I
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.INB /A2OSX.BUILD/INC/IO.I
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.INB /A2OSX.BUILD/INC/LIBGFX.I
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2015-03-14 21:48:35 +00:00
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*--------------------------------------
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2016-06-19 20:31:57 +00:00
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ZPBase .EQ ZPDRV
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2017-06-27 20:37:45 +00:00
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ZPCount .EQ ZPDRV+2
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2017-07-05 14:45:19 +00:00
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ZPCountCol .EQ ZPDRV+4
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ZPCountMod .EQ ZPDRV+5
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2017-06-27 20:37:45 +00:00
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2015-03-14 21:48:35 +00:00
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*--------------------------------------
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2015-06-03 18:30:57 +00:00
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* File Header (16 Bytes)
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2015-03-14 21:48:35 +00:00
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*--------------------------------------
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CS.START cld
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2015-06-03 18:30:57 +00:00
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jmp Dev.Detect cld,jmp abs=DRV
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.DA #$61 6502,Level 1 (65c02)
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.DA #1 DRV Layout Version 1
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.DA 0
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.DA CS.END-CS.START Code Length
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.DA DEV.HEADER-CS.START Device Header Offset
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.DA DRV.CS.START-CS.START Driver Code Offset
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.DA DRV.CS.END-DRV.CS.START Drv Code Length
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*--------------------------------------
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* Relocation Table
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*--------------------------------------
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L.MSG.DETECT .DA MSG.DETECT
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.DA 0 End Of Reloc Table
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*--------------------------------------
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Dev.Detect >LDYA L.MSG.DETECT
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2017-08-22 06:37:03 +00:00
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>SYSCALL PrintFYA
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2015-06-03 18:30:57 +00:00
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2016-06-21 15:29:27 +00:00
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ldx #0
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.1 txa
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stz Shift0.hi,x
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asl
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rol Shift0.hi,x
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lsr
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sta Shift0.lo,x
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inx
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2016-06-22 15:29:43 +00:00
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bpl .1
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2016-06-21 15:29:27 +00:00
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2016-06-22 15:29:43 +00:00
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ldx #0
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2016-06-21 15:29:27 +00:00
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.2 lda Shift0.hi,x
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sta Shift1.hi,x
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lda Shift0.lo,x
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asl
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asl
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rol Shift1.hi,x
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lsr
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sta Shift1.lo,x
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inx
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2016-06-22 15:29:43 +00:00
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bpl .2
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2016-06-21 15:29:27 +00:00
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2016-06-22 15:29:43 +00:00
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ldx #0
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2016-06-21 15:29:27 +00:00
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.3 lda Shift1.hi,x
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sta Shift2.hi,x
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lda Shift1.lo,x
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asl
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asl
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rol Shift2.hi,x
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lsr
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sta Shift2.lo,x
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inx
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2016-06-22 15:29:43 +00:00
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bpl .3
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2016-06-21 15:29:27 +00:00
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2016-06-22 15:29:43 +00:00
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ldx #0
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2016-06-21 15:29:27 +00:00
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.4 lda Shift2.hi,x
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sta Shift3.hi,x
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lda Shift2.lo,x
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asl
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asl
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rol Shift3.hi,x
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lsr
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sta Shift3.lo,x
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inx
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2016-06-22 15:29:43 +00:00
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bpl .4
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2016-06-21 15:29:27 +00:00
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2016-06-22 15:29:43 +00:00
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ldx #0
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2016-06-21 15:29:27 +00:00
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.5 lda Shift3.hi,x
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sta Shift4.hi,x
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lda Shift3.lo,x
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asl
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asl
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rol Shift4.hi,x
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lsr
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sta Shift4.lo,x
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inx
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2016-06-22 15:29:43 +00:00
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bpl .5
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2016-06-21 15:29:27 +00:00
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2016-06-22 15:29:43 +00:00
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ldx #0
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2016-06-21 15:29:27 +00:00
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.6 lda Shift4.hi,x
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sta Shift5.hi,x
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lda Shift4.lo,x
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asl
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asl
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rol Shift5.hi,x
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lsr
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sta Shift5.lo,x
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inx
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2016-06-22 15:29:43 +00:00
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bpl .6
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2016-06-21 15:29:27 +00:00
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2016-06-22 15:29:43 +00:00
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ldx #0
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2016-06-21 15:29:27 +00:00
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.7 lda Shift5.hi,x
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sta Shift6.hi,x
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lda Shift5.lo,x
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asl
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asl
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rol Shift6.hi,x
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lsr
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sta Shift6.lo,x
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inx
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2016-06-22 15:29:43 +00:00
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bpl .7
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2016-06-21 15:29:27 +00:00
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2015-06-03 18:30:57 +00:00
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clc
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rts
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CS.END
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2017-06-02 15:14:42 +00:00
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MSG.DETECT >CSTR "Apple IIe/IIc DHGR Driver.\r\n"
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2015-06-03 18:30:57 +00:00
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*--------------------------------------
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* Device Header (16 Bytes)
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*--------------------------------------
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2017-06-02 15:14:42 +00:00
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DEV.HEADER cld
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jmp (DRV.CS.START,x)
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2017-02-06 17:04:03 +00:00
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.DA #0
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2017-06-02 15:14:42 +00:00
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.BS 6
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DEV.HEADER.NAME >PSTR "GFX"
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.BS 1
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2015-06-03 18:30:57 +00:00
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*--------------------------------------
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* Driver Code
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*--------------------------------------
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2017-06-02 15:14:42 +00:00
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DRV.CS.START .DA STATUS
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2017-07-01 13:45:53 +00:00
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.DA A2osX.BADCALL
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.DA A2osX.BADCALL
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.DA A2osX.BADCALL
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2017-06-02 15:14:42 +00:00
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.DA CONTROL
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2017-07-01 13:45:53 +00:00
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.DA A2osX.BADCALL
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2017-02-06 17:04:03 +00:00
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.DA OPEN
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2015-03-14 21:48:35 +00:00
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.DA CLOSE
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2017-07-01 13:45:53 +00:00
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.DA A2osX.BADCALL
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.DA A2osX.BADCALL
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.DA A2osX.BADCALL
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2017-06-02 15:14:42 +00:00
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*--------------------------------------
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2015-03-14 21:48:35 +00:00
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.DA SETPIXEL
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.DA GETPIXEL
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.DA HLINE
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.DA VLINE
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2017-06-09 15:36:05 +00:00
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.DA FILLRECT
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2015-03-14 21:48:35 +00:00
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.DA BITBLT
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2017-06-02 15:14:42 +00:00
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*--------------------------------------
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L.STAT .DA STAT
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2016-06-19 20:31:57 +00:00
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L.DIV7.0 .DA DIV7.0
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2017-06-12 15:47:27 +00:00
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.DA DIV7.256
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.DA DIV7.512
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2016-06-19 20:31:57 +00:00
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L.MOD7.0 .DA MOD7.0
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2017-06-12 15:47:27 +00:00
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.DA MOD7.256
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.DA MOD7.512
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2016-06-19 20:31:57 +00:00
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L.Shift0.Lo .DA Shift0.lo
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L.Shift0.Hi .DA Shift0.hi
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2017-06-27 20:37:45 +00:00
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L.DIVMOD7Y0 .DA DIVMOD7Y0
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.DA DIVMOD7Y1
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.DA DIVMOD7Y2
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2015-03-14 21:48:35 +00:00
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.DA 0 end or relocation
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*--------------------------------------
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2017-06-02 15:14:42 +00:00
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STATUS >LDYA L.STAT
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2017-02-06 17:04:03 +00:00
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clc
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rts
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*--------------------------------------
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OPEN sta A2osX.SCRNDEVS+2 DEV.ID in A
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2016-10-07 20:48:49 +00:00
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2016-07-22 14:11:13 +00:00
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ldy #0
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ldx #0
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2017-06-12 15:47:27 +00:00
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.1 lda L.DIV7.0,y
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sta DIV7.lo,x
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lda L.MOD7.0,y
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2016-07-22 14:11:13 +00:00
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sta MOD7.lo,x
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2017-06-12 15:47:27 +00:00
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2016-07-22 14:11:13 +00:00
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iny
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2017-06-12 15:47:27 +00:00
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lda L.DIV7.0,y
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sta DIV7.hi,x
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2016-07-22 14:11:13 +00:00
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lda L.MOD7.0,y
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sta MOD7.hi,x
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2017-06-12 15:47:27 +00:00
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2016-07-22 14:11:13 +00:00
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iny
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inx
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cpx #3
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bne .1
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2016-06-19 20:31:57 +00:00
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ldx #7
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lda L.Shift0.Lo+1
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.10 sta Shiftlo.hi,x
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inc
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dex
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bne .10
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ldx #7
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lda L.Shift0.hi+1
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.11 sta Shifthi.hi,x
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inc
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dex
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bne .11
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.8 clc
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2015-03-14 21:48:35 +00:00
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rts
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*--------------------------------------
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2017-02-06 17:04:03 +00:00
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CONTROL sta CLRTEXT
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2016-06-07 06:10:18 +00:00
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sta CLRMIXED
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sta SETHIRES
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sta CLR80STORE
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sta CLRPAGE2
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sta SETIOUDIS
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sta SETDHIRES
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* sta CLR80DISP
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* sta SETDHIRES
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* sta CLRDHIRES
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* sta SET80DISP
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* sta SETDHIRES
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* sta CLRDHIRES
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* sta SETDHIRES
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2017-02-06 17:04:03 +00:00
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lda #3
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sta A2osX.ASCREEN
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2016-06-07 06:10:18 +00:00
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clc
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rts
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*--------------------------------------
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2017-02-06 17:04:03 +00:00
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CLOSE clc
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rts
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*--------------------------------------
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2017-07-05 14:45:19 +00:00
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.INB /A2OSX.SRC/DRV/DHGR.DRV.S.PIX
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.INB /A2OSX.SRC/DRV/DHGR.DRV.S.LIN
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.INB /A2OSX.SRC/DRV/DHGR.DRV.S.BLT
|
2016-06-15 15:58:45 +00:00
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*--------------------------------------
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2017-06-09 15:36:05 +00:00
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* FILLRECT
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* 2 : Mode
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* 3 : Color
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* 4 : SrcX1
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* 6 : SrcY1
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* 8 : SrcX2
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* 10 : SrcY2
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*--------------------------------------
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FILLRECT >STYA ZPBase
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ldy #S.CB.Y2
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2016-06-15 15:58:45 +00:00
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.1 lda (ZPBase),y
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2017-06-09 15:36:05 +00:00
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sta CB.Cache,y
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2016-06-15 15:58:45 +00:00
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dey
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bpl .1
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2016-06-19 20:31:57 +00:00
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2017-06-12 15:47:27 +00:00
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.2 jsr HLINE.I
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2016-06-19 20:31:57 +00:00
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2017-06-09 15:36:05 +00:00
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lda CB.Cache+S.CB.Y1
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cmp CB.Cache+S.CB.Y2
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beq .8
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2016-06-15 15:58:45 +00:00
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2017-06-09 15:36:05 +00:00
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inc CB.Cache+S.CB.Y1
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bra .2
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.8 rts
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2016-06-15 15:58:45 +00:00
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*--------------------------------------
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2017-06-27 20:37:45 +00:00
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* IN:
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* Y = LO
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* X = HI
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* OUT:
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* A = DIV
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* X = MOD
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*--------------------------------------
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DIVMOD7YX jmp (L.DIVMOD7Y0,x)
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DIVMOD7Y0 lda DIV7.0,y
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ldx MOD7.0,y
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rts
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DIVMOD7Y1 lda DIV7.256,y
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clc
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adc #$24
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ldx MOD7.256,y
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rts
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DIVMOD7Y2 lda DIV7.512,y
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2016-06-15 15:58:45 +00:00
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|
clc
|
2017-06-27 20:37:45 +00:00
|
|
|
|
adc #$49
|
|
|
|
|
ldx MOD7.512,y
|
2015-03-14 21:48:35 +00:00
|
|
|
|
rts
|
|
|
|
|
*--------------------------------------
|
2015-06-03 18:30:57 +00:00
|
|
|
|
DRV.CS.END
|
|
|
|
|
*--------------------------------------
|
2016-06-23 15:56:13 +00:00
|
|
|
|
Shift0.lo .BS 128
|
|
|
|
|
Shift0.hi .BS 128
|
|
|
|
|
Shift1.lo .BS 128
|
|
|
|
|
Shift1.hi .BS 128
|
|
|
|
|
Shift2.lo .BS 128
|
|
|
|
|
Shift2.hi .BS 128
|
|
|
|
|
Shift3.lo .BS 128
|
|
|
|
|
Shift3.hi .BS 128
|
|
|
|
|
Shift4.lo .BS 128
|
|
|
|
|
Shift4.hi .BS 128
|
|
|
|
|
Shift5.lo .BS 128
|
|
|
|
|
Shift5.hi .BS 128
|
2016-06-22 15:29:43 +00:00
|
|
|
|
Shift6.lo .BS 128
|
|
|
|
|
Shift6.hi .BS 128
|
2016-06-19 20:31:57 +00:00
|
|
|
|
*--------------------------------------
|
2017-06-02 15:14:42 +00:00
|
|
|
|
.INB /A2OSX.SRC/DRV/DHGR.DRV.T
|
2016-06-19 20:31:57 +00:00
|
|
|
|
*--------------------------------------
|
2017-06-12 15:47:27 +00:00
|
|
|
|
DIV7.lo .BS 3
|
2016-06-19 20:31:57 +00:00
|
|
|
|
DIV7.hi .BS 3
|
2016-07-22 14:11:13 +00:00
|
|
|
|
MOD7.lo .BS 3
|
2016-06-19 20:31:57 +00:00
|
|
|
|
MOD7.hi .BS 3
|
|
|
|
|
Shiftlo.hi .BS 7
|
|
|
|
|
Shifthi.hi .BS 7
|
2015-03-14 21:48:35 +00:00
|
|
|
|
*--------------------------------------
|
2017-06-09 15:36:05 +00:00
|
|
|
|
CB.Cache .BS S.CB
|
|
|
|
|
*--------------------------------------
|
2017-06-15 15:36:25 +00:00
|
|
|
|
XDIV7 .BS 1
|
|
|
|
|
XMOD7 .BS 1
|
2017-07-01 13:45:53 +00:00
|
|
|
|
XCOL7 .BS 1
|
2015-03-23 17:09:21 +00:00
|
|
|
|
GBYTE .BS 1
|
2015-03-14 21:48:35 +00:00
|
|
|
|
*--------------------------------------
|
2017-06-02 15:14:42 +00:00
|
|
|
|
STAT .DA #0
|
|
|
|
|
.DA #0,#0,#0
|
|
|
|
|
>PSTR "Apple II DHGR"
|
|
|
|
|
.BS 3
|
|
|
|
|
.DA #S.DEVSTAT.T.GFX
|
2017-02-06 17:04:03 +00:00
|
|
|
|
.DA #0
|
|
|
|
|
.DA $0900
|
|
|
|
|
*--------------------------------------
|
2017-06-09 15:36:05 +00:00
|
|
|
|
DEVSTAT.MODES .DA #S.CB.MODE.MONO+S.CB.MODE.C16
|
2017-02-06 17:04:03 +00:00
|
|
|
|
DEVSTAT.W .DA 560 X.SIZE
|
|
|
|
|
DEVSTAT.H .DA 192 Y.SIZE
|
2016-06-22 21:12:09 +00:00
|
|
|
|
*--------------------------------------
|
2016-06-21 15:29:27 +00:00
|
|
|
|
DRV.SIZE .EQ *-DRV.CS.START
|
2016-06-22 21:12:09 +00:00
|
|
|
|
*--------------------------------------
|
2016-06-21 15:29:27 +00:00
|
|
|
|
.LIST OFF
|
2015-03-14 21:48:35 +00:00
|
|
|
|
MAN
|
2017-06-02 15:14:42 +00:00
|
|
|
|
SAVE /A2OSX.SRC/DRV/DHGR.DRV.S
|
2015-03-14 21:48:35 +00:00
|
|
|
|
ASM
|