mirror of
https://github.com/A2osX/A2osX.git
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218 lines
3.3 KiB
Plaintext
218 lines
3.3 KiB
Plaintext
NEW
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PREFIX
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AUTO 4,1
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.LIST OFF
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*--------------------------------------
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* Uses: 12 ZP
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* M32.ACC .BS 4
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* M32.ARG .BS 4
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* M32.TMP .BS 4
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*--------------------------------------
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* TODO : Make it SIGNED 32 bits, with OVERVLOW detection
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* http://6502.org/source/integers/32muldiv.htm
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* http://nparker.llx.com/a2/mult.html
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*--------------------------------------
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M32.Add ldx #4
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ldy #0
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clc ARG+ACC->ACC
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.1 lda M32.ARG,y
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adc M32.ACC,y
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sta M32.ACC,y
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iny
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dex
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bne .1
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clc
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rts if CS, Overflow
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*---------------------------------------
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M32.Sub ldx #4
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ldy #0
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sec ARG-ACC->ACC
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.1 lda M32.ARG,y
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sbc M32.ACC,y
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sta M32.ACC,y
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iny
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dex
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bne .1
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clc
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rts
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bcs .8 if CC, Overflow
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sec
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rts
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.8 clc
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rts
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*--------------------------------------
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M32.Mul ldx #3 ARG*ACC->ACC
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.1 lda M32.ACC,x
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sta M32.TMP,x
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stz M32.ACC,x
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dex
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bpl .1
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ldx #32
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.2 lsr M32.TMP+3
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ror M32.TMP+2
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ror M32.TMP+1
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ror M32.TMP
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bcc .3
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clc
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lda M32.ARG
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adc M32.ACC
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sta M32.ACC
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lda M32.ARG+1
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adc M32.ACC+1
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sta M32.ACC+1
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lda M32.ARG+2
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adc M32.ACC+2
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sta M32.ACC+2
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lda M32.ARG+3
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adc M32.ACC+3
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sta M32.ACC+3
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.3 asl M32.ARG
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rol M32.ARG+1
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rol M32.ARG+2
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rol M32.ARG+3
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dex
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bne .2
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clc
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rts
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*--------------------------------------
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M32.Mod sec
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.HS 90 BCC
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*--------------------------------------
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M32.Div clc
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php
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stz M32.TMP ARG/ACC->ACC
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stz M32.TMP+1
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stz M32.TMP+2
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stz M32.TMP+3
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ldx #32
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.1 asl M32.ARG
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rol M32.ARG+1
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rol M32.ARG+2
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rol M32.ARG+3
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rol M32.TMP
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rol M32.TMP+1
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rol M32.TMP+2
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rol M32.TMP+3
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sec
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lda M32.TMP
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sbc M32.ACC
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pha
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lda M32.TMP+1
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sbc M32.ACC+1
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pha
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lda M32.TMP+2
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sbc M32.ACC+2
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pha
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lda M32.TMP+3
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sbc M32.ACC+3
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bcs .2
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pla
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pla
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pla
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dex
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bne .1
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bra .3
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.2 sta M32.TMP+3
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pla
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sta M32.TMP+2
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pla
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sta M32.TMP+1
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pla
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sta M32.TMP
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inc M32.ARG bit0 always 0 because of .1 asl
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dex
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bne .1
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.3 plp
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ldx #3
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ldy #M32.ARG+3
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bcc .4
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ldy #M32.TMP+3
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clc
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.4 lda $0,y
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sta M32.ACC,x
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dey
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dex
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bpl .4
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rts
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*--------------------------------------
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M32.ACC2ARG ldx #3 ACC->ARG
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.1 lda M32.ACC,x
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sta M32.ARG,x
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dex
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bpl .1
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rts
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*--------------------------------------
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M32.Cmp ldx #4
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ldy #0
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sec
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.1 lda M32.ARG,y
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sbc M32.ACC,y
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sta M32.ACC,y
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iny
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dex
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bne .1
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bcc .5 CC if ACC < ARG
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lda M32.ACC
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ora M32.ACC+1
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ora M32.ACC+2
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ora M32.ACC+3 Z if ACC = ARG
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bne .4
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lda #%010 010 ACC = ARG
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rts
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.4 lda #%100 100 ACC > ARG
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rts
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.5 lda #%001 001 ACC < ARG
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rts
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*--------------------------------------
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MAN
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SAVE USR/SRC/X.M32S.S
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LOAD USR/SRC/BIN/SH.S
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ASM
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