Improve comments and labels.

This commit is contained in:
Eric Smith 2018-02-21 12:04:13 -07:00
parent 99eaf2fe34
commit 007dcacf17
2 changed files with 40 additions and 36 deletions

View File

@ -1,6 +1,6 @@
; Apple II Liron Disk Controller Card firmware ; Apple II UniDisk 3.5 (Liron) disk interface card firmware
; Firmware P/N 341-???? ; Firmware P/N 341-????
; Copyright 2017 Eric Smith <spacewar@gmail.com> ; Copyright 2018 Eric Smith <spacewar@gmail.com>
cpu 6502 cpu 6502
@ -134,12 +134,8 @@ rom_dis equ $cfff
org $c000 org $c000
; unknown data, not visible in Apple II address space, possibly garbage ; $c000..$cfff is not visible in Apple II address space
fcb $c6,$e9,$f2,$ed,$f7,$e1,$f2,$e5 fcchz "Firmware written by Michael Askins"
fcb $a0,$f7,$f2,$e9,$f4,$f4,$e5,$ee
fcb $a0,$e2,$f9,$a0,$cd,$e9,$e3,$e8
fcb $e1,$e5,$ec,$a0,$c1,$f3,$eb,$e9
fcb $ee,$f3,$00
fillto $c100,$ff fillto $c100,$ff
; Cnxx slot ROM is replicated for all seven slots, and is identical ; Cnxx slot ROM is replicated for all seven slots, and is identical
@ -1414,10 +1410,7 @@ boot_prodos_command_block_len equ *-boot_prodos_command_block
fillto $cfdb,$ff fillto $cfdb,$ff
fcb $a8,$c3,$a9 fcchz "(C) 1985 Apple Computer, Inc. MSA"
fcb $a0,$b1,$b9,$b8,$b5,$a0,$c1,$f0 fcb $10
fcb $f0,$ec,$e5,$a0,$c3,$ef,$ed,$f0
fcb $f5,$f4,$e5,$f2,$ac,$a0,$c9,$ee
fcb $e3,$ae,$a0,$cd,$d3,$c1,$00,$10
fillto $d000,$ff fillto $d000,$ff

View File

@ -1,6 +1,6 @@
; Apple II Liron Disk Drive firmware ; Apple UniDisk 3.5 (Liron, A2M2053) disk drive firmware
; Firmware P/N 341-???? ; Firmware P/N 341-????
; Copyright 2017 Eric Smith <spacewar@gmail.com> ; Copyright 2018 Eric Smith <spacewar@gmail.com>
cpu 65c02 cpu 65c02
@ -14,9 +14,9 @@ size set 256
endm endm
endm endm
L00 equ $00
Z08 equ $08
warmstart_ram equ $00
Z08 equ $08
ga_shadow_wr_reg0 equ $09 ga_shadow_wr_reg0 equ $09
ga_shadow_wr_reg1 equ $0a ga_shadow_wr_reg1 equ $0a
@ -458,7 +458,7 @@ Le317: jsr Se48f
lsr lsr
tax tax
lda De3b4,x lda De3b4,x
jsr Se4e2 jsr delay2
Le337: jsr Se162 Le337: jsr Se162
stz Z17 stz Z17
stz Z25 stz Z25
@ -614,7 +614,7 @@ Le444: tay
Se461: jmp L84 Se461: jmp L84
Le464: lda #$02 Le464: lda #$02
jsr Se4e7 jsr delay
lda Z1a lda Z1a
sta Z18 sta Z18
Le46d: jsr Le103 Le46d: jsr Le103
@ -683,11 +683,13 @@ Le4de: dex
bne Le4de bne Le4de
rts rts
Se4e2: pha
jsr Se4e7
pla
Se4e7: sta Z18 delay2: pha
jsr delay
pla
; fall into delay
delay: sta Z18
Le4e9: lda #$c8 Le4e9: lda #$c8
sta Z17 sta Z17
Le4ed: dec Z17 Le4ed: dec Z17
@ -697,13 +699,14 @@ Le4ed: dec Z17
bne Le4e9 bne Le4e9
rts rts
Le4f7: lda #$01 Le4f7: lda #$01
jsr Se64a jsr Se64a
ldx #$50 ldx #$50
jsr Se4cf jsr Se4cf
ldx #$50 ldx #$50
Le503: lda #$07 Le503: lda #$07
jsr Se4e7 jsr delay
lda #$0a lda #$0a
jsr Se640 jsr Se640
bpl Le515 bpl Le515
@ -722,7 +725,7 @@ Se51b: lda #$02
lda #$09 lda #$09
jsr Se64a jsr Se64a
lda #$c8 lda #$c8
jsr Se4e7 jsr delay
lda #$03 lda #$03
sta Z39 sta Z39
ldx Z13 ldx Z13
@ -732,7 +735,7 @@ Le534: lda #$0d
lda #$96 lda #$96
sta Z3b sta Z3b
Le53d: lda #$0a Le53d: lda #$0a
jsr Se4e7 jsr delay
lda #$02 lda #$02
jsr Se640 jsr Se640
bmi Le557 bmi Le557
@ -752,7 +755,7 @@ Le557: ldx Z13
lda #$fa lda #$fa
sta Z11,x sta Z11,x
lda #$01 lda #$01
jsr Se4e7 jsr delay
Le568: clc Le568: clc
rts rts
@ -787,12 +790,14 @@ Le593: sty iwm_q7h
lda iwm_motor_on lda iwm_motor_on
rts rts
Se5a5: ldx #$07
warmstart_check:
ldx #warmstart_tab_len-1
stx Z08 stx Z08
Le5a9: lda De5bb,x Le5a9: lda warmstart_tab,x
cmp L00,x cmp warmstart_ram,x
beq Le5b5 beq Le5b5
sta L00,x sta warmstart_ram,x
sec sec
ror Z08 ror Z08
Le5b5: dex Le5b5: dex
@ -801,7 +806,9 @@ Le5b5: dex
rts rts
De5bb: fcb $4c,$49,$52,$4f,$4e,$4d,$53,$41 ; "LIRONMSA" warmstart_tab:
fcb "LIRONMSA"
warmstart_tab_len equ *-warmstart_tab
Se5c3: lda ga_reg1 ; check BLATCH1 and 2 Se5c3: lda ga_reg1 ; check BLATCH1 and 2
@ -864,10 +871,10 @@ Se614: lda #$00
jsr Se64d jsr Se64d
ldx Z13 ldx Z13
lda Z11,x lda Z11,x
jsr Se4e2 jsr delay2
lda #$19 lda #$19
sta Z11,x sta Z11,x
jsr Se4e2 jsr delay2
Le634: rts Le634: rts
Le635: lda #$01 Le635: lda #$01
@ -1032,8 +1039,10 @@ reset: sei ; disable interrupts, clear decimal, init stack
jsr Se7bc jsr Se7bc
stz Z6a stz Z6a
stz Z6b stz Z6b
jsr Se5a5
jsr warmstart_check
bpl Le78b bpl Le78b
sec sec
ror Z6f ror Z6f
stz Z6e stz Z6e
@ -1042,8 +1051,9 @@ reset: sei ; disable interrupts, clear decimal, init stack
sta Z12 sta Z12
jsr vector_init jsr vector_init
lda #$e6 lda #$e6
jsr Se4e7 jsr delay
jsr Se9ef jsr Se9ef
Le78b: bit Z6f Le78b: bit Z6f
bmi Le799 bmi Le799
ldx Z6f ldx Z6f
@ -1065,6 +1075,7 @@ Le7b1: jsr Sea1d
jsr Seb08 jsr Seb08
bra Le79c bra Le79c
Se7bc: lda #$04 Se7bc: lda #$04
sta Z62 sta Z62
lda #$80 lda #$80