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25c07613c2
contiki/cpu/x86/drivers/quarkX1000
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Michael LeMay 25c07613c2 x86: Add driver for message bus 
The Intel Quark X1000 SoC includes a message bus that is accessible
via PCI configuration registers.  It communicates to various SoC
components such as the Isolated Memory Region (IMR) registers and the
Remote Management Unit.  This patch adds a driver for accessing the
message bus.
2016-03-17 08:35:48 -07:00
..
eth.c x86: Add driver for Intel Quark X1000 built-in Ethernet 2015-12-21 08:06:14 -02:00
eth.h x86: Add driver for Intel Quark X1000 built-in Ethernet 2015-12-21 08:06:14 -02:00
gpio.c x86: Use shared ISR for I2C and GPIO 2016-02-16 21:19:44 -08:00
gpio.h x86: Add Intel Quark X1000 GPIO Controller (non-legacy) interrupt support 2015-12-21 08:06:14 -02:00
i2c-registers.h x86: Add Intel Quark X1000 I2C support 2015-12-21 08:06:14 -02:00
i2c.c x86, galileo: Refactor I2C and GPIO initialization 2016-02-16 21:19:44 -08:00
i2c.h x86, galileo: Refactor I2C and GPIO initialization 2016-02-16 21:19:44 -08:00
msg-bus.c x86: Add driver for message bus 2016-03-17 08:35:48 -07:00
msg-bus.h x86: Add driver for message bus 2016-03-17 08:35:48 -07:00
uart.c x86: Add support for PCI BAR1 2015-12-21 08:06:14 -02:00
uart.h x86: Add Intel Quark X1000 UART support. 2015-12-21 08:06:14 -02:00