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Update personal-notes.md
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@ -184,10 +184,11 @@ I had forgotten how much fun this stuff is. Working in ARM assembly
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language on Android offered similar challenges, but you're never entirely
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language on Android offered similar challenges, but you're never entirely
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sure exactly how your code will perform on the wide range of CPU
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sure exactly how your code will perform on the wide range of CPU
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architectures (affecting instruction interleave, cache size and
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architectures (affecting instruction interleave, cache size and
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replacement policy, etc.), you have to guess at cache misses and the
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replacement policy, branch prediction, etc.), you have to guess at cache
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success rate of data prefetching, and it's difficult to measure results when
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misses and the success rate of data prefetching, and it's difficult to
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there's multiple threads running and interrupts firing. On the Apple II
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measure results when there's multiple threads running and interrupts firing.
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you can count every cycle, and know exactly what will happen when.
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On the Apple II you can count every cycle, and know exactly what will
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happen when.
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I don't expect that anyone will find the code useful, but that wasn't
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I don't expect that anyone will find the code useful, but that wasn't
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really the point.
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really the point.
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