franklin/ace500_c000_cfff.s

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50 KiB
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2021-11-12 04:17:21 +00:00
;;; ============================================================
;;; Franklin ACE 2X00 ROM V6.0 Disassembly
;;;
;;; First $1000 bytes of U2 ROM (usually banked in $C000-$CFFF)
;;;
;;; Build with CC65's ca65 assembler
;;; ============================================================
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.setcpu "65C02"
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.include "opcodes.inc"
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.feature string_escapes
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;;; ============================================================
;;; Patches
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;;; Set to 1 to include preliminary fixes for:
;;; * MouseText mode failing to exist on $18 output.
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;;; * MouseText displaying if $40-$5F sent to COUT.
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INCLUDE_PATCHES = 0
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;;; ============================================================
;;; Equates
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;;; Zero Page
WNDLFT := $20
WNDWDTH := $21
WNDTOP := $22
WNDBTM := $23
CH := $24
CV := $25
BASL := $28
BASH := $29
BAS2L := $2A
BAS2H := $2B
INVFLG := $32
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CSWL := $36
CSWH := $37
KSWL := $38
KSWH := $39
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A1L := $3C
A1H := $3D
A2L := $3E
A2H := $3F
A4L := $42
A4H := $43
RNDL := $4E
RNDH := $4F
;;; Page 3 Vectors
XFERVEC := $3ED
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L03F0 := $3F0 ; ???
L03FE := $3FE ; ???
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;;; Screen Holes
SAVEA := $4F8
SAVEX := $578
SAVEY := $478
OLDCH := $47B
MODE := $4FB
;; Bit 7 = Escape Mode
;; Bit 6 = MouseText active
;; Bit 5 = ??? set when "normal"
;; Bit 4 = ??? set when "normal"
;; Bit 3 = ??? unused ???
;; Bit 2 = ??? unused ???
;; Bit 1 = ??? used for ???
;; Bit 0 = ??? used for ???
M_ESC = %10000000
M_MOUSE = %01000000
M_NORMAL= %00110000
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M_INACTIVE = $FF ; When firmware is inactive
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OURCH := $57B
OURCV := $5FB
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CHAR := $67B
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XCOORD := $6FB
TEMP1 := $77B ; Unused
OLDBASL := $77B
TEMP2 := $7FB
OLDBASH := $7FB
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FKEYPTR := $479 ; Holds offset from Aux $200 to FKEY def
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;;; I/O Soft Switches
KBD := $C000
CLR80COL:= $C000
SET80COL:= $C001
RDMAINRAM := $C002
RDCARDRAM := $C003
WRMAINRAM := $C004
WRCARDRAM := $C005
ALTZPOFF:= $C008
ALTZPON := $C009
CLR80VID:= $C00C
SET80VID:= $C00D
CLRALTCHAR := $C00E
SETALTCHAR := $C00F
KBDSTRB := $C010
RDLCBNK2:= $C011
RDLCRAM := $C012
RDRAMRD := $C013
RDRAMWRT:= $C014
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RDCXROM := $C015
RDALTZP := $C016
RDC3ROM := $C017
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RD80COL := $C018
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RDVBL := $C019
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RDTEXT := $C01A
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RDPAGE2 := $C01C
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ALTCHARSET := $C01E
RD80VID := $C01F
TXTPAGE1:= $C054
TXTPAGE2:= $C055
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RD63 := $C063
PTRIG := $C070
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ROMIN := $C081
ROMIN2 := $C082
LCBANK2 := $C083
LCBANK1 := $C08B
;;; Documented Firmware Entry Points
C3KeyIn := $C305
C3COut1 := $C307
AUXMOVE := $C311
XFER := $C314
CLRROM := $CFFF
;;; Monitor ROM
BELLB := $FBE2
SETWND := $FB4B
SETKBD := $FE89
SETVID := $FE93
MON_VTAB:= $FC22
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VTABZ := $FC24
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CLREOP := $FC42
HOME := $FC58
CLREOL := $FC9C
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CLREOLZ := $FC9E
COUT := $FDED
COUT1 := $FDF0
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MON_SAVE:= $FF4A
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;;; ============================================================
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.org $C000
;;; ============================================================
;;; Page $C0 - Unused (garbage data?)
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;;; ============================================================
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.res $100, 0
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;;; ============================================================
;;; Page $C1 - Parallel Port Firmware
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;;; ============================================================
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.scope pageC1
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LC100: bra LC111
LC102: bra LC107
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LC104: nop
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sec ; $Cn05 = $38 Pascal 1.1 sig
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nop
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LC107: clc ; $Cn07 = $18 Pascal 1.1 sig
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clv
bra LC114
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;; Signature bytes
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.byte $01 ; Pascal 1.1 signature
.byte $31 ; $31 = Super Serial Card (!)
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;; Pascal 1.1 Firmware Protocol Table
.byte .lobyte(LC12B)
.byte .lobyte(LC133)
.byte .lobyte(LC136)
.byte .lobyte(LC13E)
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LC111: bit LC135
LC114: jsr LC1D6
pha
phx
phy
sta $0679
bvc LC122
jsr $C806
LC122: jsr $C83C
ply
plx
pla
LC128: jmp $C5FA
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LC12B: jsr LC1D6
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jsr $C897
bra LC128
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LC133: ldx #$03
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LC135: rts
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LC136: jsr LC1D6
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jsr $C89D
bra LC128
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LC13E: jsr LC1D6
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jsr $C8A5
bra LC128
LC146: lda #$00
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bit RDALTZP
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bpl LC14F
ora #$80
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LC14F: bit RDRAMRD
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bpl LC156
ora #$40
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LC156: bit RDRAMWRT
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bpl LC15D
ora #$20
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LC15D: bit RDLCBNK2
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bpl LC164
ora #$10
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LC164: bit RDLCRAM
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bpl LC16B
ora #$08
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LC16B: bit RD80COL
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bpl LC177
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bit RDPAGE2
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bpl LC177
ora #$04
LC177: rts
LC178: phx
asl a
asl a
bcc LC180
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sta RDCARDRAM
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LC180: asl a
bcc LC186
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sta WRCARDRAM
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LC186: asl a
bcc LC193
asl a
bcc LC18F
ldx #$03
.byte $2C
LC18F: ldx #$01
bra LC19B
LC193: asl a
bcc LC199
ldx #$0B
.byte $2C
LC199: ldx #$09
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LC19B: bit $C080,x
bit $C080,x
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asl a
bcc LC1A7
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sta TXTPAGE2
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LC1A7: plx
rts
LC1A9: bit #$04
beq LC1B0
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sta TXTPAGE1
LC1B0: sta RDMAINRAM
sta WRMAINRAM
bit ROMIN
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rts
brk
brk
brk
brk
brk
brk
brk
LC1C1: brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
jsr LC128
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jsr COUT1
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LC1D6: php
sei
pha
lda #$C1
sta $07F8
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sta $C0BA
sta $C0B8
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sta CLRROM
pla
plp
rts
brk
brk
brk
brk
brk
brk
brk
brk
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LC1F2: plx
bit CLRROM
rti
LC1F7: jmp LC146
LC1FA: jmp LC178
LC1FD: jmp LC1A9
.endscope
;;; ============================================================
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;;; Page $C2 - Serial Port Firmware
;;; ============================================================
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.scope pageC2
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bit $C5A7
bra LC211
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sec ; $Cn05 = $38 Pascal 1.1 sig
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.byte OPC_BCC ; never taken
clc ; $Cn07 = $18 Pascal 1.1 sig
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clv
bra LC211
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;; Signature bytes
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.byte $01 ; Pascal 1.1 signature
.byte $31 ; $31 = Super Serial Card
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;; Pascal 1.1 Firmware Protocol Table
.byte .lobyte(LC214)
.byte .lobyte(LC217)
.byte .lobyte(LC21A)
.byte .lobyte(LC21D)
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LC211: jmp $C500
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LC214: jmp $C51F
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LC217: jmp $C528
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LC21A: jmp $C530
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LC21D: jmp $C538
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;; ???
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LC220: lda $077C
and #$F1
sta $077C
sec
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lda RDVBL
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bmi @l2
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sta PTRIG
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lda #$08
tsb $077C
clc
bit $067C
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bpl @l1
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lda #$20
tsb $077C
lda $07FC
and #$02
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beq @l1
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tsb $077C
stz $067C
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@l1: bit RD63
bmi @l2
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lda #$04
tsb $077C
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@l2: lda RDCXROM
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ora RDC3ROM
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bmi @l3
jmp @l12
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@l3: sta $067C
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lda RDCXROM
sta $C048 ; ???
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bpl @l7
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txa
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bpl @l5
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lda $067D
cmp $047C
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bne @l4
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lda $077D
cmp $057C
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beq @l11
@l4: inc $047C
bne @l11
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inc $057C
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bra @l11
@l5: lda $047D
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cmp $047C
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bne @l6
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lda $057D
cmp $057C
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beq @l11
@l6: sec
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lda $047C
sbc #$01
sta $047C
lda $057C
sbc #$00
sta $057C
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bra @l11
@l7: tya
bmi @l9
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lda $06FD
cmp $04FC
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bne @l8
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lda $07FD
cmp $05FC
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beq @l11
@l8: inc $04FC
bne @l11
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inc $05FC
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bra @l11
@l9: lda $04FD
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cmp $04FC
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bne @l10
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lda $05FD
cmp $05FC
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beq @l11
@l10: sec
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lda $04FC
sbc #$01
sta $04FC
lda $05FC
sbc #$00
sta $05FC
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@l11: clc
@l12: bcs @l13
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lda $077C
and $07FC
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beq @l13
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sec
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@l13: rts
;; ???
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ldx $EB
lda $0342,x
.byte $8D
.byte $12
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.endscope
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;;; ============================================================
;;; Page $C3 - Enhanced 80 Column Firmware
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;;; ============================================================
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;; Init
LC300: bit SETV ; V = init
bra MainEntry
;; Input
.assert * = C3KeyIn, error, "Entry point mismatch"
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LC305: sec ; $Cn05 = $38 Pascal 1.1 sig
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.byte OPC_BCC ; never taken; skip next byte
;; Output
.assert * = C3COut1, error, "Entry point mismatch"
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LC307: clc ; $Cn07 = $18 Pascal 1.1 sig
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clv
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bra MainEntry
;; Signature bytes
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.byte $01 ; Pascal 1.1 signature
.byte $88 ; $88 = 80 Column Card
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;; Pascal 1.1 Firmware Protocol Table
.byte <JPINIT
.byte <JPREAD
.byte <JPWRITE
.byte <JPSTAT
;; AUXMOVE
.assert * = AUXMOVE, error, "Entry point mismatch"
jmp JumpAuxMove
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;; XFER
.assert * = XFER, error, "Entry point mismatch"
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jsr pageC5_DoBankC5
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jmp $CC03 ; ???
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;;; ============================================================
;;; Pascal Entry Points
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JPINIT: jsr ClearROM
jsr PascalInit
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LC320: jmp pageC5_DoBankC5
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JPREAD: jsr ClearROM
jsr PascalRead
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bra LC320
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JPWRITE:jsr ClearROM
jsr PascalWrite
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bra LC320
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JPSTAT: jsr ClearROM
jsr PascalStatus
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bra LC320
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JumpAuxMove:
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jsr pageC5_DoBankC5
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jmp $CC06
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;;; ============================================================
;;; Main Entry Points
MainEntry:
jsr ClearROM
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sta SAVEA
stx SAVEX
sty SAVEY
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pha
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bvc l1
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;; Init
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jsr LC806
clc
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l1: php
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jsr LC9B4
plp
pla
bcc l7 ; Input or output?
;; Input
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ldx SAVEX
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beq l2
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dex
lda $0678
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cmp #$88 ; left?
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beq l2
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cmp $0200,x
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bne l5
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sta $0200,x
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l2: jsr LC96F
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cmp #$9B ; escape?
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beq EscapeMode
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cmp #$8D ; return?
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bne l3
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pha
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jsr DoClearEOL
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pla
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l3: cmp #$95 ; right?
bne l4
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ldy CH
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jsr LC9A8
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l4: sta $0678
bra l6
l5: jsr LC822
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stz $0678
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l6: bra l8
;; Output
l7: jsr OutputChar
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lda SAVEA
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l8: ldx SAVEX
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ldy CH
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sty OURCH
sty XCOORD
ldy SAVEY
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jmp pageC5_DoBankC5
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;;; ============================================================
;;; Escape Mode
EscapeMode:
lda #M_ESC
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tsb MODE
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jsr LC822
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jsr ProcessEscapeModeKey
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cmp #$98
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beq l4
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lda MODE
2021-11-07 04:07:03 +00:00
bmi EscapeMode
2021-11-09 17:02:08 +00:00
bra l2
2021-11-07 04:07:03 +00:00
;;; ============================================================
2021-11-08 05:16:34 +00:00
ClearROM:
php
2021-11-07 02:16:53 +00:00
sei
pha
2021-11-07 02:41:09 +00:00
sta $C0BA ; ???
2021-11-08 05:16:34 +00:00
sta CLRROM
2021-11-07 02:16:53 +00:00
lda #$C3
sta $07F8
pla
plp
2021-11-08 05:16:34 +00:00
SETV: rts
;;; ============================================================
2021-11-07 02:16:53 +00:00
brk
brk
brk
brk
brk
brk
brk
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-10 02:17:23 +00:00
jmp $CC00
2021-11-07 02:16:53 +00:00
LC3E2: plx
2021-11-09 04:47:22 +00:00
bit CLRROM
2021-11-07 02:16:53 +00:00
rti
brk
2021-11-08 05:16:34 +00:00
jsr ClearROM
2021-11-07 02:16:53 +00:00
jmp LCE0D
2021-11-08 05:16:34 +00:00
jsr ClearROM
2021-11-27 02:58:21 +00:00
jmp InitFKEYDefinitions
2021-11-07 02:16:53 +00:00
2021-11-08 05:16:34 +00:00
LC3F4: jsr ClearROM
2021-11-07 02:16:53 +00:00
jmp LCCB2
2021-11-08 05:16:34 +00:00
LC3FA: jsr ClearROM
2021-11-07 02:16:53 +00:00
jmp LCCF5
2021-11-07 02:41:09 +00:00
;;; ============================================================
2021-11-13 17:18:13 +00:00
;;; Page $C4 - Mouse Card Firmware
;;; ============================================================
2021-11-07 02:41:09 +00:00
2021-11-13 04:38:12 +00:00
.scope pageC4
2021-11-07 02:41:09 +00:00
2021-11-13 17:18:13 +00:00
bit SETV
bra Init
2021-11-07 02:16:53 +00:00
sec
2021-11-13 17:18:13 +00:00
.byte OPC_BCC ; never taken; skip next byte
clc
2021-11-07 02:16:53 +00:00
clv
2021-11-13 17:18:13 +00:00
bra Init
2021-11-13 04:38:12 +00:00
;; Signature bytes
2021-11-13 04:49:42 +00:00
.byte $01, $20 ; $20 = Mouse
2021-11-13 04:38:12 +00:00
;; Pascal 1.1 Firmware Protocol Table
2021-11-13 17:18:13 +00:00
.byte .lobyte(PascalEP)
.byte .lobyte(PascalEP)
.byte .lobyte(PascalEP)
.byte .lobyte(PascalEP)
.byte $00 ; "optional routines follow"
;; Mouse routine entry points
.byte .lobyte(SetMouse)
.byte .lobyte(ServeMouse)
.byte .lobyte(ReadMouse)
.byte .lobyte(ClearMouse)
.byte .lobyte(PosMouse)
.byte .lobyte(ClampMouse)
.byte .lobyte(HomeMouse)
.byte .lobyte(InitMouse)
;; ???
.byte .lobyte(PascalEP)
.byte .lobyte(LC45F)
Init: jsr pageC5_DoBankC5
bvc @l1
jsr $C806
@l1: bcc @l2
2021-11-10 02:17:23 +00:00
jmp $C838
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
@l2: jmp LC825
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
PascalEP:
ldx #$03
SETV: rts
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
SetMouse:
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C8D4
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
ServeMouse:
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C916
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
ReadMouse:
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C922
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
ClearMouse:
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C958
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
PosMouse:
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C967
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
ClampMouse:
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C969
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
HomeMouse:
2021-11-13 04:38:12 +00:00
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C93E
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
InitMouse:
jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C8AC
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
LC45F: ldx $C066 ; ???
2021-11-07 02:16:53 +00:00
ldy $C067
2021-11-07 02:41:09 +00:00
jmp $C220
2021-11-07 02:16:53 +00:00
2021-11-13 04:38:12 +00:00
LC468: jsr pageC5_DoBankC5
2021-11-07 03:06:39 +00:00
jmp $C9A0
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
.res $C4A0 - *, 0
2021-11-13 17:26:02 +00:00
;; ???
2021-11-07 02:16:53 +00:00
LC4A0: cld
phx
phy
pha
ldx $C066
ldy $C067
lda $C0BC
pha
sta $C0B9
jmp LC700
2021-11-13 17:26:02 +00:00
;; ???
2021-11-07 02:16:53 +00:00
pla
bpl LC4BE
2021-11-07 02:41:09 +00:00
sta ALTZPON
2021-11-07 02:16:53 +00:00
ldx $0101
txs
LC4BE: ldx $07FF
pla
2021-11-07 02:41:09 +00:00
jsr $C1FA
2021-11-07 02:16:53 +00:00
pla
bmi LC4CB
sta $C0B8
LC4CB: sta $C0BA
stx $07F8
pla
ply
cpx #$C1
beq LC4E4
cpx #$C3
beq LC4E7
cpx #$C5
beq LC4EA
plx
sta $C0BB
rti
2021-11-07 02:41:09 +00:00
LC4E4: jmp $C1F2
2021-11-07 02:16:53 +00:00
LC4E7: jmp LC3E2
2021-11-13 04:38:12 +00:00
LC4EA: jmp pageC5_LC5F5
2021-11-07 02:16:53 +00:00
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
2021-11-13 17:26:02 +00:00
2021-11-07 02:16:53 +00:00
LC4F8: jmp LC468
2021-11-13 17:26:02 +00:00
.byte $D6 ; $CnFB = $D6 mouse signature
.byte $00
2021-11-13 17:18:13 +00:00
jmp InitMouse
2021-11-13 04:38:12 +00:00
.endscope
;;; ============================================================
;;; Page $C5
2021-11-13 17:18:13 +00:00
;;; ============================================================
2021-11-13 04:38:12 +00:00
.scope pageC5
2021-11-07 02:16:53 +00:00
2021-11-12 04:17:21 +00:00
LC500: jsr BankC5
2021-11-07 02:16:53 +00:00
sta $067A
phx
phy
pha
bvc LC50E
2021-11-07 03:06:39 +00:00
jsr $C806
2021-11-07 02:16:53 +00:00
LC50E: bcc LC516
2021-11-07 03:06:39 +00:00
jsr $C908
2021-11-07 02:16:53 +00:00
plx
bra LC51A
2021-11-07 03:06:39 +00:00
LC516: jsr $C83B
2021-11-07 02:16:53 +00:00
pla
LC51A: ply
plx
2021-11-08 05:16:34 +00:00
jmp BankC8
2021-11-07 02:16:53 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC5
2021-11-07 03:06:39 +00:00
jsr $C8C7
2021-11-08 05:16:34 +00:00
jmp BankC8
2021-11-07 02:16:53 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC5
2021-11-13 17:18:13 +00:00
jsr $C8CD
2021-11-08 05:16:34 +00:00
bra BankC8
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC5
2021-11-07 03:06:39 +00:00
jsr $C8D2
2021-11-08 05:16:34 +00:00
bra BankC8
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC5
2021-11-07 03:06:39 +00:00
jsr $C8DA
2021-11-08 05:16:34 +00:00
bra BankC8
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-07 02:16:53 +00:00
ora #$80
2021-11-13 04:38:12 +00:00
jsr COUT1
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-07 02:16:53 +00:00
ora #$80
2021-11-13 04:38:12 +00:00
jsr COUT
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-07 02:16:53 +00:00
jsr LC3F4
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-07 02:16:53 +00:00
jsr LC3FA
and #$7F
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-13 04:38:12 +00:00
jsr CLREOLZ
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-13 04:38:12 +00:00
jsr HOME
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-07 02:16:53 +00:00
jsr LC300
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-13 04:38:12 +00:00
jsr pageC4::LC4F8
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-13 04:38:12 +00:00
jsr pageC7_LC7FD
2021-11-08 05:16:34 +00:00
bra BankC5
2021-11-07 03:06:39 +00:00
2021-11-08 05:16:34 +00:00
jsr BankC8
2021-11-13 04:38:12 +00:00
jsr VTABZ
2021-11-08 05:16:34 +00:00
;; Fall through
;;; ============================================================
;;; Hypothesis: This banks in a special "C5" C800-CFFF
BankC5: php
2021-11-07 02:16:53 +00:00
sei
pha
lda #$C5
sta $07F8
sta $C0BA
sta $C0B8
2021-11-09 04:47:22 +00:00
sta CLRROM
2021-11-07 02:16:53 +00:00
pla
plp
rts
2021-11-08 05:16:34 +00:00
;;; ============================================================
;;; Hypothesis: This banks in a special "C8" C800-CFFF
BankC8: php
2021-11-07 02:16:53 +00:00
sei
pha
lda #$C8
sta $07F8
sta $C0BB
sta $C0B9
pla
plp
rts
2021-11-08 05:16:34 +00:00
;;; ============================================================
jsr BankC8
2021-11-07 02:16:53 +00:00
LC5BC: bit $C1C1
bmi LC5BC
sta $C090
2021-11-08 05:16:34 +00:00
bra BankC5
LC5C6: jsr BankC5
2021-11-07 20:52:15 +00:00
jsr $C9A5
2021-11-08 05:16:34 +00:00
bra BankC8
2021-11-13 17:18:13 +00:00
.res $C5F5 - *, 0
2021-11-07 02:16:53 +00:00
LC5F5: plx
2021-11-09 04:47:22 +00:00
bit CLRROM
2021-11-07 02:16:53 +00:00
rti
2021-11-08 05:16:34 +00:00
;;; ============================================================
DoBankC5:
jmp BankC8
;;; ============================================================
2021-11-07 02:16:53 +00:00
jmp LC5C6
2021-11-13 04:38:12 +00:00
.endscope
pageC5_DoBankC5 := pageC5::DoBankC5
pageC5_LC5F5 := pageC5::LC5F5
;;; ============================================================
2021-11-13 17:18:13 +00:00
;;; Page $C6 - Disk II Firmware
;;; ============================================================
2021-11-07 02:16:53 +00:00
2021-11-13 04:38:12 +00:00
.scope pageC6
2021-11-13 04:49:42 +00:00
bit $20 ; $Cn01 = $20 ProDOS device sig
cpy $00 ; $Cn03 = $00 ProDOS device sig
ldx #$03 ; $Cn05 = $03 ProDOS device sig
2021-11-07 02:41:09 +00:00
asl A1L
2021-11-13 04:38:12 +00:00
jsr pageC5::DoBankC5
2021-11-07 02:16:53 +00:00
ldy #$69
2021-11-09 04:47:22 +00:00
LC60D: lda $CF26,y
2021-11-07 02:16:53 +00:00
sta $036C,y
dey
bpl LC60D
ldx #$60
2021-11-07 02:41:09 +00:00
LC618: inc BAS2H
cpx BAS2H
2021-11-07 02:16:53 +00:00
bne LC618
2021-11-07 20:52:15 +00:00
jsr $CEA6
2021-11-07 02:16:53 +00:00
LC621: dec $41
bne LC621
2021-11-07 02:41:09 +00:00
LC625: dec A1H
2021-11-07 02:16:53 +00:00
bne LC625
LC629: dec $26
bne LC629
LC62D: dec $27
lda $27
cmp #$08
bne LC62D
2021-11-13 04:49:42 +00:00
2021-11-13 17:18:13 +00:00
.res $C65C - *, ::OPC_NOP
2021-11-07 02:16:53 +00:00
pha
2021-11-13 17:18:13 +00:00
2021-11-07 02:16:53 +00:00
nop
nop
nop
nop
nop
nop
2021-11-13 17:18:13 +00:00
2021-11-07 02:16:53 +00:00
bra LC683
2021-11-13 17:18:13 +00:00
.res $C683 - *, ::OPC_NOP
2021-11-07 02:16:53 +00:00
LC683: pla
2021-11-13 04:38:12 +00:00
LC684: jsr pageC5::DoBankC5
2021-11-27 02:58:21 +00:00
jsr $CE00
2021-11-07 02:16:53 +00:00
bra LC6EA
2021-11-13 04:49:42 +00:00
2021-11-13 17:18:13 +00:00
.res $C6A6 - *, 0
2021-11-07 02:51:44 +00:00
ldy #$56 ; ???
2021-11-07 02:41:09 +00:00
sty A1L
2021-11-07 02:16:53 +00:00
sec
clv
2021-11-07 02:51:44 +00:00
jmp $CE51
2021-11-07 02:16:53 +00:00
2021-11-13 17:18:13 +00:00
.res $C6EA - *, ::OPC_NOP
2021-11-07 02:16:53 +00:00
LC6EA: nop
2021-11-07 02:41:09 +00:00
lda A1H
2021-11-07 02:16:53 +00:00
inc a
2021-11-07 02:41:09 +00:00
sta A1H
2021-11-07 02:16:53 +00:00
inc $27
cmp $0800
bcc LC684
ldy #$00
2021-11-07 02:41:09 +00:00
ldx BAS2H
jmp $0801
2021-11-07 02:16:53 +00:00
.byte $DE
2021-11-13 04:38:12 +00:00
.byte $00 ; $00 = Disk II, 16-Sector
.endscope
;;; ============================================================
;;; Page $C7 - ???
2021-11-13 17:18:13 +00:00
;;; ============================================================
2021-11-13 04:38:12 +00:00
LC700:
.scope pageC7
2021-11-07 02:41:09 +00:00
LC700: jsr $C1F7
2021-11-07 02:16:53 +00:00
pha
2021-11-07 02:41:09 +00:00
jsr $C1FD
2021-11-07 02:16:53 +00:00
lda $07F8
sta $07FF
phx
tsx
txa
clc
adc #$07
tax
lda $0100,x
plx
and #$10
bne LC747
2021-11-07 02:41:09 +00:00
jsr $C220
2021-11-07 02:16:53 +00:00
bcc LC744
jsr LC784
bcc LC744
pla
pha
bpl LC739
txa
tsx
stx $0101
ldx $0100
txs
tax
2021-11-07 02:41:09 +00:00
sta ALTZPOFF
2021-11-07 02:16:53 +00:00
lda #$80
LC739: pha
lda #$C4
pha
lda #$B4
pha
php
jmp (L03FE)
2021-11-13 04:38:12 +00:00
LC744: jmp pageC4::LC4BE
2021-11-07 02:16:53 +00:00
LC747: pla
sta $44
pla
bpl LC751
lda #$01
tsb $44
LC751: pla
ply
plx
plp
2021-11-13 04:49:42 +00:00
jsr MON_SAVE
2021-11-07 02:16:53 +00:00
pla
sta $3A
ply
sty $3B
2021-11-13 04:38:12 +00:00
bit RDALTZP
2021-11-07 02:16:53 +00:00
bpl LC781
tsx
stx $0101
ldx $0100
txs
2021-11-07 02:41:09 +00:00
sta ALTZPOFF
2021-11-07 02:16:53 +00:00
sta $3A
sty $3B
ldx #$05
2021-11-07 02:41:09 +00:00
LC774: sta ALTZPON
2021-11-07 02:16:53 +00:00
lda $44,x
2021-11-07 02:41:09 +00:00
sta ALTZPOFF
2021-11-07 02:16:53 +00:00
sta $44,x
dex
bpl LC774
LC781: jmp (L03F0)
2021-11-27 02:58:21 +00:00
;;; ============================================================
2021-11-07 02:16:53 +00:00
LC784: sec
2021-11-27 02:58:21 +00:00
lda $C0AA ; ???
2021-11-07 02:16:53 +00:00
tax
and #$0C
eor #$04
beq LC7E4
2021-11-27 02:58:21 +00:00
lda $C0A9 ; ???
2021-11-07 02:16:53 +00:00
LC792: sta $04FA
ora #$00
bpl LC7E4
and #$08
beq LC7BD
txa
and #$03
eor #$01
bne LC7BD
lda $04FF
eor #$C2
bne LC7E4
2021-11-27 02:58:21 +00:00
lda $C0A8 ; ???
2021-11-07 02:16:53 +00:00
ldx $057F
jsr LC7E5
bpl LC7B8
ldx #$00
LC7B8: stx $057F
bra LC7E3
2021-11-27 02:58:21 +00:00
LC7BD:
bit $04FA
bvc LC7E3
bit $05FA
bvs LC7E4
bpl LC7E3
2021-11-07 02:41:09 +00:00
lda KBD
2021-11-27 02:58:21 +00:00
bit $C0B4 ; Softswitch for Fkeys ???
bmi :+ ; leave high bit set for later
2021-11-07 02:16:53 +00:00
and #$7F
2021-11-27 02:58:21 +00:00
: bit KBDSTRB
2021-11-07 02:16:53 +00:00
ldx $05FF
jsr LC7E5
2021-11-27 02:58:21 +00:00
bne :+
2021-11-07 02:16:53 +00:00
ldx #$80
2021-11-27 02:58:21 +00:00
: stx $05FF
2021-11-07 02:16:53 +00:00
LC7E3: clc
LC7E4: rts
2021-11-07 02:41:09 +00:00
LC7E5: sta WRCARDRAM
2021-11-07 02:16:53 +00:00
sta $0800,x
2021-11-07 02:41:09 +00:00
sta WRMAINRAM
2021-11-07 02:16:53 +00:00
inx
rts
2021-11-27 02:58:21 +00:00
;;; ============================================================
2021-11-07 02:16:53 +00:00
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
brk
2021-11-27 02:58:21 +00:00
2021-11-07 02:16:53 +00:00
LC7FD: jmp LC792
2021-11-27 02:58:21 +00:00
2021-11-07 02:41:09 +00:00
.endscope
2021-11-13 04:38:12 +00:00
pageC7_LC7FD := pageC7::LC7FD
2021-11-07 02:41:09 +00:00
;;; ============================================================
2021-11-13 17:18:13 +00:00
.res $C800 - *, 0
2021-11-07 02:41:09 +00:00
;;; ============================================================
2021-11-12 04:17:21 +00:00
;;; Pages $C8-$CF - Enhanced 80 Column Firmware
2021-11-13 17:18:13 +00:00
;;; ============================================================
2021-11-07 02:16:53 +00:00
2021-11-07 02:41:09 +00:00
LC800: .byte $C3
2021-11-07 02:16:53 +00:00
eor $AA,x
2021-11-07 02:41:09 +00:00
jmp $C4A0 ; bad disasm?
2021-11-07 02:16:53 +00:00
2021-11-08 05:16:34 +00:00
LC806: lda #<LC305
sta KSWL
ldx #>LC305
stx KSWH
lda #<LC307
sta CSWL
stx CSWH
2021-11-10 02:17:23 +00:00
LC814: lda #M_NORMAL
2021-11-07 02:51:44 +00:00
sta MODE
jsr Enable80Col
2021-11-27 02:58:21 +00:00
jsr DoSETWND
2021-11-07 03:26:27 +00:00
jmp DoHomeAndClear
2021-11-07 02:16:53 +00:00
;;; ============================================================
2021-11-07 02:16:53 +00:00
LC822: jsr LCBE1
2021-11-07 02:41:09 +00:00
LC825: inc RNDL
2021-11-07 02:16:53 +00:00
bne LC82B
2021-11-07 02:41:09 +00:00
inc RNDH
2021-11-07 02:16:53 +00:00
LC82B: jsr LCCB8
bcc LC825
jsr LCCFB
cmp #$06
bcc LC840
2021-11-10 02:17:23 +00:00
and #$7F
sta CHAR
ora #$80
bra LC843
2021-11-07 03:56:03 +00:00
LC840: sta CHAR
2021-11-10 02:17:23 +00:00
LC843: pha
2021-11-07 02:16:53 +00:00
jsr LCBF8
2021-11-10 02:17:23 +00:00
pla
2021-11-07 02:16:53 +00:00
rts
2021-11-07 20:52:15 +00:00
;;; ============================================================
OutputChar:
sta CHAR
2021-11-07 20:52:15 +00:00
LC84C: jsr CheckPauseListing
2021-11-07 02:51:44 +00:00
lda MODE
2021-11-11 05:07:34 +00:00
and #$03 ; test low 2 bits (why???)
2021-11-07 20:52:15 +00:00
beq @l1
2021-11-07 02:16:53 +00:00
jmp LCA2F
2021-11-07 20:52:15 +00:00
@l1: lda CHAR
2021-11-07 02:16:53 +00:00
and #$7F
cmp #$20
2021-11-07 03:06:39 +00:00
bcc DoCtrlCharOut
2021-11-07 02:41:09 +00:00
ldy CH
cpy WNDWDTH
2021-11-07 20:52:15 +00:00
bcc @l2
2021-11-07 03:26:27 +00:00
jsr DoReturn
2021-11-11 05:07:34 +00:00
;; If MouseText is not active, make sure to map inverse
;; uppercase range to the control character range.
2021-11-11 07:17:24 +00:00
@l2:
.if !INCLUDE_PATCHES
lda CHAR ; char to be printed
2021-11-11 05:07:34 +00:00
bit INVFLG ; inverse?
2021-11-11 07:17:24 +00:00
.else
jsr Patch4 ; sets N flag if inverse char
nop
nop
.endif
2021-11-11 05:07:34 +00:00
bmi @l3 ; no, so not MT, just print it
2021-11-07 02:16:53 +00:00
and #$7F
2021-11-11 05:07:34 +00:00
bit MODE ; MT active? (bit 6 = M_MOUSE)
bvs @l3 ; yes, so skip correction
bit ALTCHARSET ; also skip correction if
bpl @l3 ; alt charset is disabled
;; If within "@ABC...XYZ[\]^_" range, map to $00-$1F
;; so it shows as inverse uppercase, not MouseText.
cmp #'@'
bcc :+
cmp #'_'+1
bcs :+
2021-11-07 02:16:53 +00:00
and #$1F
2021-11-11 05:07:34 +00:00
:
2021-11-07 20:52:15 +00:00
@l3: jsr LCC13
2021-11-07 03:26:27 +00:00
jmp DoForwardSpace
2021-11-07 02:16:53 +00:00
2021-11-07 03:06:39 +00:00
;;; ============================================================
DoNothing:
rts
2021-11-07 02:16:53 +00:00
2021-11-07 03:06:39 +00:00
;;; ============================================================
;;; Output control character handling
;; Input is char, < $20
DoCtrlCharOut:
sec
2021-11-07 02:16:53 +00:00
sbc #$07
2021-11-07 03:06:39 +00:00
bcc DoNothing
2021-11-07 02:16:53 +00:00
asl a
tax
2021-11-07 20:52:15 +00:00
jmp (@jt,x)
2021-11-07 03:06:39 +00:00
2021-11-07 20:52:15 +00:00
@jt:
2021-11-07 03:26:27 +00:00
.addr DoBell ; $07 Ctrl-G Bell
.addr DoBackspace ; $08 Ctrl-H Backspace
.addr DoNothing ; $09 Ctrl-I
.addr DoLineFeed ; $0A Ctrl-J Line feed
.addr DoClearEOS ; $0B Ctrl-K Clear EOS
.addr DoHomeAndClear ; $0C Ctrl-L Home and clear
.addr DoReturn ; $0D Ctrl-M Return
.addr DoNormal ; $0E Ctrl-N Normal
.addr DoInverse ; $0F Ctrl-O Inverse
.addr DoNothing ; $10 Ctrl-P
.addr Do40Col ; $11 Ctrl-Q 40-column
.addr Do80Col ; $12 Ctrl-R 80-column
.addr DoNothing ; $13 Ctrl-S
.addr DoNothing ; $14 Ctrl-T
.addr DoQuit ; $15 Ctrl-U Quit
.addr DoScroll ; $16 Ctrl-V Scroll
.addr DoScrollUp ; $17 Ctrl-W Scroll-up
.addr DoDisableMouseText ; $18 Ctrl-X Disable MouseText
.addr DoHome ; $19 Ctrl-Y Home
.addr DoClearLine ; $1A Ctrl-Z Clear line
.addr DoEnableMouseText ; $1B Ctrl-[ Enable MouseText
.addr DoForwardSpace ; $1C Ctrl-\ Forward space
.addr DoClearEOL ; $1D Ctrl-] Clear EOL
2021-11-07 03:27:30 +00:00
.addr DoCtrlCaret ; $1E Ctrl-^ ???
2021-11-07 03:26:27 +00:00
.addr DoUp ; $1F Ctrl-_ Up
2021-11-07 03:06:39 +00:00
;;; ============================================================
;;; For Escape key sequences
2021-11-07 20:52:15 +00:00
ProcessEscapeModeKey:
pha
2021-11-07 03:06:39 +00:00
lda #M_ESC
trb MODE
pla
and #$7F
2021-11-07 20:52:15 +00:00
cmp #'a'
bcc @l1
cmp #'z'+1
bcs @l1
and #$DF ; convert to uppercase
;; Scan table for match
@l1: ldx #$00
@l2: ldy @code_table,x
2021-11-07 03:06:39 +00:00
beq DoNothing
2021-11-07 20:52:15 +00:00
cmp @code_table,x
beq @l3
2021-11-07 02:16:53 +00:00
inx
2021-11-07 20:52:15 +00:00
bra @l2
2021-11-07 03:06:39 +00:00
2021-11-07 20:52:15 +00:00
@l3: txa
2021-11-07 02:16:53 +00:00
asl a
tax
2021-11-07 20:52:15 +00:00
jmp (@jt,x)
2021-11-07 02:16:53 +00:00
2021-11-07 20:52:15 +00:00
@code_table:
2021-11-07 03:06:39 +00:00
.byte '@' ; Escape @ - clear, home & exit mode
.byte 'A' ; Escape A - right & exit mode
.byte 'B' ; Escape B - left & exit mode
.byte 'C' ; Escape C - down & exit mode
.byte 'D' ; Escape D - up & exit mode
.byte 'E' ; Escape E - clear EOL & exit mode
.byte 'F' ; Escape F - clear EOS & exit mode
.byte 'I' ; Escape I - up
.byte 'J' ; Escape J - left
.byte 'K' ; Escape K - right
.byte 'M' ; Escape M - down
.byte $0b ; Escape up - up
.byte $0a ; Escape down - down
.byte $08 ; Escape left - left
.byte $15 ; Escape right - right
.byte '4' ; Escape 4 - 40 col mode
.byte '8' ; Escape 8 - 80 col mode
.byte $11 ; Escape Ctrl+Q - deactivate
.byte $00 ; sentinel
2021-11-07 20:52:15 +00:00
@jt:
2021-11-07 03:56:03 +00:00
.addr DoHomeAndClear ; Escape @ - clear, home & exit mode
.addr DoForwardSpace ; Escape A - right & exit mode
.addr DoBackspace ; Escape B - left & exit mode
.addr DoLineFeed ; Escape C - down & exit mode
.addr DoUp ; Escape D - up & exit mode
.addr DoClearEOL ; Escape E - clear EOL & exit mode
.addr DoClearEOS ; Escape F - clear EOS & exit mode
.addr DoUpRemain ; Escape I - up
.addr DoLeftRemain ; Escape J - left
.addr DoRightRemain ; Escape K - right
.addr DoDownRemain ; Escape M - down
.addr DoUpRemain ; Escape up - up
.addr DoDownRemain ; Escape down - down
.addr DoLeftRemain ; Escape left - left
.addr DoRightRemain ; Escape right - right
.addr Do40Col ; Escape 4 - 40 col mode
.addr Do80Col ; Escape 8 - 80 col mode
.addr DoQuit ; Escape Ctrl+Q - deactivate
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 20:52:15 +00:00
CheckPauseListing:
2021-11-07 03:06:39 +00:00
lda KBD
2021-11-07 04:07:03 +00:00
cmp #$93 ; Ctrl-S
bne @l3
2021-11-07 02:41:09 +00:00
bit KBDSTRB
2021-11-07 04:07:03 +00:00
@l1: lda KBD
bpl @l1
cmp #$83 ; Ctrl-C
beq @l3
2021-11-07 02:16:53 +00:00
.byte $2C
2021-11-07 04:07:03 +00:00
@l2: bpl $C900
@l3: rts
;;; ============================================================
2021-11-07 02:16:53 +00:00
LC941: ldy #$00
ldx #$00
2021-11-07 20:52:15 +00:00
@l1: cpy WNDWDTH
bcs @l2
2021-11-07 02:16:53 +00:00
jsr LC9A8
sta $0200,x
inx
iny
2021-11-07 20:52:15 +00:00
bra @l1
@l2: dey
2021-11-07 02:41:09 +00:00
sty CH
2021-11-10 02:17:23 +00:00
stx SAVEX
lda #$8D ; return
2021-11-07 02:16:53 +00:00
LC95B: rts
2021-11-07 03:26:27 +00:00
;;; ============================================================
Do40Col:
bit RD80VID
2021-11-07 02:16:53 +00:00
php
jsr Disable80Col
2021-11-07 02:16:53 +00:00
jsr LCAFA
2021-11-27 02:58:21 +00:00
jsr DoSETWND
2021-11-07 04:07:03 +00:00
plp
2021-11-07 02:16:53 +00:00
bpl LC95B
jmp LCC68
2021-11-07 04:07:03 +00:00
;;; ============================================================
2021-11-07 02:16:53 +00:00
LC96F: jsr LC822
cmp #$00
2021-11-07 20:52:15 +00:00
beq @l4
2021-11-07 02:16:53 +00:00
cmp #$02
beq LC941
cmp #$05
bne LC95B
2021-11-07 02:41:09 +00:00
ldy CH
2021-11-07 20:52:15 +00:00
@l1: iny
2021-11-07 02:41:09 +00:00
cpy WNDWDTH
2021-11-07 20:52:15 +00:00
beq @l2
2021-11-07 02:16:53 +00:00
jsr LC9A8
dey
jsr LCEC8
iny
2021-11-07 20:52:15 +00:00
bra @l1
2021-11-07 04:07:03 +00:00
2021-11-07 20:52:15 +00:00
@l2: dey
@l3: lda #$A0
2021-11-07 02:16:53 +00:00
jsr LCEC8
bra LC96F
2021-11-07 04:07:03 +00:00
2021-11-07 20:52:15 +00:00
@l4: ldy WNDWDTH
2021-11-10 02:17:23 +00:00
@l5: dey
2021-11-07 02:41:09 +00:00
cpy CH
2021-11-07 20:52:15 +00:00
beq @l3
2021-11-07 02:16:53 +00:00
dey
2021-11-10 02:17:23 +00:00
jsr LC9A8
2021-11-07 02:16:53 +00:00
iny
2021-11-10 02:17:23 +00:00
jsr LCEC8
bra @l5
2021-11-07 20:52:15 +00:00
;;; ============================================================
2021-11-07 02:16:53 +00:00
LC9A8: jsr LCEBD
ora #$80
cmp #$A0
2021-11-07 20:52:15 +00:00
bcs @l1
2021-11-07 02:16:53 +00:00
ora #$40
2021-11-07 20:52:15 +00:00
@l1: rts
;;; ============================================================
2021-11-07 02:16:53 +00:00
2021-11-07 02:41:09 +00:00
LC9B4: bit RD80VID
2021-11-07 02:16:53 +00:00
bpl LC9CC
2021-11-07 02:41:09 +00:00
lsr WNDWDTH
asl WNDWDTH
sta SET80COL
2021-11-09 04:59:50 +00:00
;; This is CH fix described in source fragment below!
LC9C0: lda CH ; HAVE THEY CHANGED COL?
2021-11-07 02:51:44 +00:00
cmp XCOORD
2021-11-09 04:59:50 +00:00
bne LC9CA ; YES - USE THEIRS
lda OURCH ; ELSE USE OURS (THEY MIGHT HAVE
; CHANGED THIS TOO)
2021-11-07 02:41:09 +00:00
LC9CA: sta CH
2021-11-07 02:16:53 +00:00
LC9CC: rts
2021-11-07 03:56:03 +00:00
;;; ============================================================
DoUpRemain:
jsr DoUp
bra Remain
DoDownRemain:
2021-11-07 03:26:27 +00:00
jsr DoLineFeed
2021-11-07 03:56:03 +00:00
bra Remain
2021-11-07 03:26:27 +00:00
2021-11-07 03:56:03 +00:00
DoRightRemain:
jsr DoForwardSpace
bra Remain
2021-11-07 03:26:27 +00:00
2021-11-07 03:56:03 +00:00
DoLeftRemain:
2021-11-07 03:26:27 +00:00
jsr DoBackspace
2021-11-07 03:56:03 +00:00
;; fall through
Remain: lda #$80
bra SetModeBits
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoInverse:
2021-11-07 02:16:53 +00:00
ldy #$3F
2021-11-07 03:26:27 +00:00
.byte OPC_BIT_abs ; skip next instruction
DoNormal:
ldy #$FF
2021-11-07 02:41:09 +00:00
sty INVFLG
2021-11-07 02:16:53 +00:00
LC9EA: rts
2021-11-07 03:26:27 +00:00
;;; ============================================================
Do80Col:
2021-11-07 02:41:09 +00:00
bit RD80VID
2021-11-07 02:16:53 +00:00
php
jsr Enable80Col
2021-11-07 02:16:53 +00:00
jsr LCAFA
2021-11-27 02:58:21 +00:00
jsr DoSETWND
2021-11-07 02:16:53 +00:00
plp
bmi LC9EA
jmp LCC18
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoQuit:
jsr Do40Col
2021-11-07 02:51:44 +00:00
jsr DoSETVID
jsr DoSETKBD
2021-11-10 02:17:23 +00:00
lda #23
ldx #0
2021-11-07 02:16:53 +00:00
jsr LCAA1
2021-11-10 02:17:23 +00:00
lda #M_INACTIVE
2021-11-07 02:51:44 +00:00
sta MODE
2021-11-10 02:17:23 +00:00
2021-11-07 02:16:53 +00:00
lda #$98
rts
2021-11-07 03:26:27 +00:00
;;; ============================================================
2021-11-07 03:56:03 +00:00
;;; Adusting MODE Bits
2021-11-07 03:26:27 +00:00
2021-11-07 03:27:30 +00:00
DoCtrlCaret:
2021-11-10 02:17:23 +00:00
lda #$FC ; clear mode bits %xxxxxx00
2021-11-07 03:56:03 +00:00
jsr PreserveModeBits
2021-11-10 02:17:23 +00:00
lda #$32 ; set mode bits %xx11xx1x
2021-11-07 03:56:03 +00:00
bra SetModeBits
2021-11-07 03:26:27 +00:00
DoDisableMouseText:
2021-11-10 02:17:23 +00:00
.if !INCLUDE_PATCHES
2021-11-07 03:56:03 +00:00
lda #M_MOUSE ; BUG! Should be ~M_MOUSE
2021-11-10 02:17:23 +00:00
.else
lda #.lobyte(~M_MOUSE)
.endif
2021-11-07 03:56:03 +00:00
PreserveModeBits:
and MODE
bra StoreMode
2021-11-07 03:26:27 +00:00
DoEnableMouseText:
2021-11-07 03:56:03 +00:00
lda #M_MOUSE
2021-11-10 02:17:23 +00:00
2021-11-07 03:56:03 +00:00
SetModeBits:
ora MODE
StoreMode:
sta MODE
2021-11-07 02:16:53 +00:00
rts
2021-11-07 03:56:03 +00:00
;;; ============================================================
LCA2F: lda CHAR
2021-11-07 02:16:53 +00:00
sec
sbc #$20
and #$7F
pha
2021-11-07 02:51:44 +00:00
dec MODE
lda MODE
2021-11-07 02:16:53 +00:00
and #$03
2021-11-07 04:07:03 +00:00
bne @l2
2021-11-07 02:16:53 +00:00
pla
cmp #$18
2021-11-07 04:07:03 +00:00
bcs @l1
2021-11-07 02:16:53 +00:00
jsr LCAA3
2021-11-07 04:07:03 +00:00
@l1: lda $05F8
2021-11-07 02:41:09 +00:00
cmp WNDWDTH
2021-11-07 03:56:03 +00:00
bcs :+
2021-11-07 02:41:09 +00:00
sta CH
2021-11-07 03:56:03 +00:00
: rts
2021-11-07 02:16:53 +00:00
2021-11-07 04:07:03 +00:00
@l2: pla
2021-11-07 02:16:53 +00:00
sta $05F8
rts
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoBackspace:
lda CH
2021-11-07 02:16:53 +00:00
beq LCA60
2021-11-07 02:41:09 +00:00
dec CH
2021-11-07 02:16:53 +00:00
LCA5F: rts
2021-11-07 03:26:27 +00:00
;;; ============================================================
2021-11-07 02:41:09 +00:00
LCA60: lda CV
2021-11-07 02:16:53 +00:00
beq LCA5F
2021-11-07 02:41:09 +00:00
lda WNDWDTH
2021-11-07 02:16:53 +00:00
dec a
2021-11-07 02:41:09 +00:00
sta CH
2021-11-07 03:26:27 +00:00
DoUp: lda CV
2021-11-07 02:16:53 +00:00
beq LCA5F
2021-11-07 02:41:09 +00:00
dec CV
2021-11-07 02:16:53 +00:00
bra LCAA5
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoForwardSpace:
inc CH
2021-11-07 02:41:09 +00:00
lda CH
cmp WNDWDTH
2021-11-07 02:16:53 +00:00
bcc LCA5F
2021-11-07 03:26:27 +00:00
;; fall through
;;; ============================================================
DoReturn:
stz CH
;; fall through
;;; ============================================================
DoLineFeed:
lda CV
2021-11-07 02:16:53 +00:00
cmp #$FF
2021-11-07 04:07:03 +00:00
beq @l1
2021-11-07 02:16:53 +00:00
cmp #$17
2021-11-07 03:26:27 +00:00
bcs DoScrollUp
2021-11-07 04:07:03 +00:00
@l1: inc CV
2021-11-07 02:16:53 +00:00
bra LCAA5
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoHome:
lda WNDTOP
2021-11-07 02:16:53 +00:00
ldx #$00
bra LCAA1
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoClearLine:
lda CH
2021-11-07 02:16:53 +00:00
pha
2021-11-07 02:41:09 +00:00
stz CH
2021-11-07 03:26:27 +00:00
jsr DoClearEOL
2021-11-07 02:16:53 +00:00
pla
2021-11-07 02:41:09 +00:00
sta CH
2021-11-07 02:16:53 +00:00
rts
2021-11-07 03:26:27 +00:00
;;; ============================================================
2021-11-07 02:16:53 +00:00
LCA9B: lda $06F8
ldx $0778
2021-11-07 02:41:09 +00:00
LCAA1: stx CH
LCAA3: sta CV
2021-11-07 02:51:44 +00:00
LCAA5: jmp DoMON_VTAB
2021-11-07 02:16:53 +00:00
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoScrollUp:
lda CH
2021-11-07 02:16:53 +00:00
pha
2021-11-07 03:26:27 +00:00
jsr DoHome
2021-11-07 04:07:03 +00:00
@l1: ldy BASH
2021-11-07 02:41:09 +00:00
sty BAS2H
ldy BASL
sty BAS2L
lda WNDBTM
2021-11-07 04:07:03 +00:00
beq @l5
2021-11-07 02:16:53 +00:00
dec a
2021-11-07 02:41:09 +00:00
cmp CV
2021-11-07 04:07:03 +00:00
beq @l5
bcc @l5
2021-11-07 02:41:09 +00:00
inc CV
2021-11-07 02:16:53 +00:00
jsr LCAA5
2021-11-07 02:41:09 +00:00
ldy WNDWDTH
2021-11-07 02:16:53 +00:00
dey
2021-11-07 02:41:09 +00:00
bit RD80VID
2021-11-07 04:07:03 +00:00
bmi @l3
@l2: lda (BASL),y
2021-11-07 02:41:09 +00:00
sta (BAS2L),y
2021-11-07 02:16:53 +00:00
dey
2021-11-07 04:07:03 +00:00
bpl @l2
bra @l1
@l3: tya
2021-11-07 02:16:53 +00:00
lsr a
tay
2021-11-07 04:07:03 +00:00
@l4: bit TXTPAGE1
2021-11-07 02:41:09 +00:00
lda (BASL),y
sta (BAS2L),y
bit TXTPAGE2
lda (BASL),y
sta (BAS2L),y
2021-11-07 02:16:53 +00:00
dey
2021-11-07 04:07:03 +00:00
bpl @l4
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
2021-11-07 04:07:03 +00:00
bra @l1
@l5: stz CH
2021-11-07 03:26:27 +00:00
jsr DoClearEOL
2021-11-07 02:16:53 +00:00
plx
2021-11-07 02:41:09 +00:00
lda CV
2021-11-07 02:16:53 +00:00
bra LCAA1
2021-11-07 04:07:03 +00:00
2021-11-07 02:41:09 +00:00
LCAFA: lda CV
2021-11-07 02:16:53 +00:00
sta $06F8
2021-11-07 02:41:09 +00:00
lda CH
2021-11-07 02:16:53 +00:00
sta $0778
rts
2021-11-07 03:26:27 +00:00
;;; ============================================================
DoScroll:
2021-11-07 02:16:53 +00:00
jsr LCAFA
2021-11-07 02:41:09 +00:00
lda WNDBTM
2021-11-07 02:16:53 +00:00
dec a
dec a
sta $05F8
LCB0F: lda $05F8
jsr LCAA3
2021-11-07 02:41:09 +00:00
lda BASL
sta BAS2L
lda BASH
sta BAS2H
2021-11-07 02:16:53 +00:00
lda $05F8
inc a
jsr LCAA3
2021-11-07 02:41:09 +00:00
ldy WNDWDTH
2021-11-07 02:16:53 +00:00
dey
LCB27: phy
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
bit RD80VID
2021-11-07 02:16:53 +00:00
bpl LCB38
tya
lsr a
tay
bcs LCB38
2021-11-07 02:41:09 +00:00
bit TXTPAGE2
LCB38: lda (BAS2L),y
sta (BASL),y
2021-11-07 02:16:53 +00:00
ply
dey
bpl LCB27
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
2021-11-07 02:16:53 +00:00
lda $05F8
2021-11-07 02:41:09 +00:00
cmp WNDTOP
2021-11-07 02:16:53 +00:00
beq LCB4F
dec $05F8
bra LCB0F
LCB4F: lda #$00
jsr LCAA3
2021-11-07 03:26:27 +00:00
jsr DoClearLine
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
2021-11-07 02:16:53 +00:00
jmp LCA9B
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalInit:
jsr LC814
2021-11-07 02:16:53 +00:00
LCB60: jsr LCBE1
2021-11-07 02:41:09 +00:00
LCB63: ldx CH
2021-11-07 02:51:44 +00:00
stx OURCH
stx XCOORD
2021-11-07 02:16:53 +00:00
ldx #$00
rts
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalRead:
jsr InitTextWindow
2021-11-07 02:16:53 +00:00
jsr LC822
2021-11-07 03:56:03 +00:00
lda CHAR
2021-11-07 02:16:53 +00:00
bra LCB63
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalWrite:
sta CHAR
jsr InitTextWindow
2021-11-07 02:16:53 +00:00
jsr LCBF8
2021-11-07 03:56:03 +00:00
lda CHAR
2021-11-07 02:16:53 +00:00
ora #$80
2021-11-07 03:56:03 +00:00
sta CHAR
2021-11-07 02:16:53 +00:00
and #$7F
cmp #$15
beq LCB63
cmp #$0D
2021-11-08 05:16:34 +00:00
beq @l1
2021-11-07 02:16:53 +00:00
jsr LC84C
bra LCB60
2021-11-08 05:16:34 +00:00
@l1: stz CH
2021-11-07 02:16:53 +00:00
bra LCB60
2021-11-08 05:16:34 +00:00
;;; ============================================================
PascalStatus:
cmp #$00
beq @l1
2021-11-07 02:16:53 +00:00
cmp #$01
2021-11-08 05:16:34 +00:00
bne @l2
2021-11-07 02:16:53 +00:00
jsr LCCB8
bra LCB63
2021-11-08 05:16:34 +00:00
@l1: sec
2021-11-07 02:16:53 +00:00
bra LCB63
2021-11-08 05:16:34 +00:00
@l2: ldx #$03
2021-11-07 02:16:53 +00:00
clc
rts
2021-11-08 05:16:34 +00:00
;;; ============================================================
InitTextWindow:
pha
2021-11-07 02:51:44 +00:00
lda OLDBASL
2021-11-07 02:41:09 +00:00
sta BASL
2021-11-07 02:51:44 +00:00
lda OLDBASH
2021-11-07 02:41:09 +00:00
sta BASH
stz WNDTOP
stz WNDLFT
lda #80
2021-11-07 02:41:09 +00:00
sta WNDWDTH
lda #24
2021-11-07 02:41:09 +00:00
sta WNDBTM
2021-11-07 02:16:53 +00:00
jsr LC9C0
pla
rts
;;; ============================================================
;; ???
2021-11-07 02:41:09 +00:00
sta CLRALTCHAR
Disable80Col:
sta CLR80COL
2021-11-07 02:41:09 +00:00
sta CLR80VID
2021-11-07 02:16:53 +00:00
rts
Enable80Col:
sta SET80COL
2021-11-07 02:41:09 +00:00
sta SET80VID
sta SETALTCHAR
2021-11-07 02:16:53 +00:00
rts
;;; ============================================================
2021-11-07 02:51:44 +00:00
LCBE1: lda MODE
2021-11-10 02:17:23 +00:00
cmp #M_INACTIVE
2021-11-07 02:16:53 +00:00
beq LCC04
and #M_ESC
2021-11-07 02:16:53 +00:00
beq LCC04
jsr LCEBB
2021-11-07 02:51:44 +00:00
sta OLDCH
2021-11-07 02:16:53 +00:00
and #$80
eor #$AB
bra LCC13
2021-11-08 05:16:34 +00:00
;;; ============================================================
2021-11-10 02:17:23 +00:00
LCBF8: lda MODE
and #M_ESC
beq LCC04
lda OLDCH
bra LCC13
LCC04: jsr LCEBB
eor #$80
2021-11-11 05:07:34 +00:00
;; If within "@ABC...XYZ[\]^_" range, map to $00-$1F
;; so it shows as inverse uppercase, not MouseText.
cmp #'@'
bcc :+
cmp #'_'+1
bcs :+
2021-11-07 02:16:53 +00:00
and #$1F
2021-11-11 05:07:34 +00:00
:
2021-11-07 02:41:09 +00:00
LCC13: ldy CH
2021-11-07 02:16:53 +00:00
jmp LCEC8
LCC18: php
sei
2021-11-07 02:41:09 +00:00
lda WNDTOP
2021-11-07 02:16:53 +00:00
sta $05F8
LCC1F: lda $05F8
jsr LCAA3
2021-11-07 02:41:09 +00:00
lda BASL
sta BAS2L
lda BASH
sta BAS2H
2021-11-07 02:16:53 +00:00
ldy #$00
2021-11-07 02:41:09 +00:00
LCC2F: bit TXTPAGE1
lda (BAS2L)
bit TXTPAGE2
sta (BASL),y
bit TXTPAGE1
inc BAS2L
lda (BAS2L)
sta (BASL),y
2021-11-07 02:16:53 +00:00
iny
2021-11-07 02:41:09 +00:00
inc BAS2L
2021-11-07 02:16:53 +00:00
cpy #$14
bcc LCC2F
lda #$A0
2021-11-07 02:41:09 +00:00
LCC4B: bit TXTPAGE2
sta (BASL),y
bit TXTPAGE1
sta (BASL),y
2021-11-07 02:16:53 +00:00
iny
cpy #$28
bcc LCC4B
inc $05F8
lda $05F8
cmp #$18
bcc LCC1F
LCC64: plp
jmp LCA9B
LCC68: php
sei
2021-11-07 02:41:09 +00:00
sta SET80COL
lda WNDTOP
2021-11-07 02:16:53 +00:00
sta $05F8
LCC72: lda $05F8
jsr LCAA3
ldy #$13
2021-11-07 02:41:09 +00:00
bit TXTPAGE1
LCC7D: lda (BASL),y
2021-11-07 02:16:53 +00:00
pha
dey
bpl LCC7D
ldy #$00
2021-11-07 02:41:09 +00:00
lda BASL
sta BAS2L
lda BASH
sta BAS2H
LCC8D: bit TXTPAGE2
lda (BASL),y
bit TXTPAGE1
sta (BAS2L)
inc BAS2L
2021-11-07 02:16:53 +00:00
pla
2021-11-07 02:41:09 +00:00
sta (BAS2L)
inc BAS2L
2021-11-07 02:16:53 +00:00
iny
cpy #$14
bcc LCC8D
inc $05F8
lda $05F8
cmp #$18
bcc LCC72
2021-11-07 02:41:09 +00:00
sta CLR80COL
2021-11-07 02:16:53 +00:00
bra LCC64
LCCB2: jsr LCCB8
2021-11-13 04:38:12 +00:00
jmp pageC5::DoBankC5 ; bad disasm or ...?
2021-11-07 02:16:53 +00:00
LCCB8: bit $0579
bmi LCCD7
LCCBD: bit $05FA
bvs LCCCE
bpl LCCCE
lda $05FF
cmp $06FF
beq LCCD3
bra LCCD5
2021-11-07 02:41:09 +00:00
LCCCE: bit KBD
2021-11-07 02:16:53 +00:00
bmi LCCD5
LCCD3: clc
rts
LCCD5: sec
rts
LCCD7: jsr LCDA8
beq LCCE1
LCCDC: stz $0579
bra LCCBD
LCCE1: phx
2021-11-27 02:58:21 +00:00
ldx FKEYPTR
jsr ReadAuxRAM
2021-11-07 02:16:53 +00:00
lda $0200,x
2021-11-27 02:58:21 +00:00
jsr ReadPreviousRAM
2021-11-07 02:16:53 +00:00
plx
cmp #$00
beq LCCDC
bra LCCD5
LCCF5: jsr LCCFB
2021-11-13 04:38:12 +00:00
jmp pageC5::DoBankC5
2021-11-07 02:16:53 +00:00
LCCFB: bit $0579
bpl LCD03
jmp LCD85
LCD03: bit $05FA
2021-11-27 02:58:21 +00:00
bvs HandleSpecialKeys
bpl HandleSpecialKeys
2021-11-07 02:16:53 +00:00
phx
ldx $06FF
2021-11-07 02:41:09 +00:00
bit RDRAMRD
2021-11-07 02:16:53 +00:00
php
2021-11-07 02:41:09 +00:00
sta RDCARDRAM
2021-11-07 02:16:53 +00:00
lda $0800,x
plp
bmi LCD1E
2021-11-07 02:41:09 +00:00
sta RDMAINRAM
2021-11-07 02:16:53 +00:00
LCD1E: inx
bne LCD23
ldx #$80
LCD23: stx $06FF
plx
pha
pla
php
ora #$80
plp
bra LCD38
2021-11-27 02:58:21 +00:00
;;; ============================================================
HandleSpecialKeys:
lda KBD
2021-11-07 02:41:09 +00:00
bit KBDSTRB
2021-11-27 02:58:21 +00:00
bit $C0B4 ; Softswitch for Fkeys???
2021-11-07 02:16:53 +00:00
LCD38: bpl LCD41
LCD3A: cmp #$06
bcc LCD40
ora #$80
LCD40: rts
2021-11-27 02:58:21 +00:00
;; Deal with special keys
2021-11-07 02:16:53 +00:00
LCD41: and #$7F
2021-11-27 02:58:21 +00:00
cmp #$01 ; CLRL
2021-11-07 02:16:53 +00:00
bne LCD4B
lda #$1A
bra LCD3A
2021-11-27 02:58:21 +00:00
LCD4B: cmp #$03 ; CLRS
2021-11-07 02:16:53 +00:00
bne LCD53
lda #$0C
bra LCD3A
2021-11-27 02:58:21 +00:00
LCD53: cmp #$04 ; HOME
2021-11-07 02:16:53 +00:00
bne LCD5B
lda #$19
bra LCD3A
2021-11-27 02:58:21 +00:00
;; "Macro" keys
LCD5B: cmp #$06 ; RUN
2021-11-07 02:16:53 +00:00
bne LCD63
2021-11-27 02:58:21 +00:00
lda #$2C ; Like F13
2021-11-07 02:16:53 +00:00
bra LCD73
2021-11-27 02:58:21 +00:00
LCD63: cmp #$1F ; LIST
2021-11-07 02:16:53 +00:00
bne LCD6B
2021-11-27 02:58:21 +00:00
lda #$2D ; Like F4
2021-11-07 02:16:53 +00:00
bra LCD73
2021-11-27 02:58:21 +00:00
LCD6B: cmp #$20 ; F1
2021-11-07 02:16:53 +00:00
bcc LCD3A
2021-11-27 02:58:21 +00:00
cmp #$2C ; F12+1
2021-11-07 02:16:53 +00:00
bcs LCD3A
2021-11-27 02:58:21 +00:00
LCD73: pha ; Handle Fkeys
2021-11-07 02:16:53 +00:00
jsr LCDA8
beq LCD7C
pla
bra LCD3A
2021-11-27 02:58:21 +00:00
2021-11-07 02:16:53 +00:00
LCD7C: lda #$FF
sta $0579
pla
2021-11-27 02:58:21 +00:00
jsr FindFKEYDefnOffset
2021-11-07 02:16:53 +00:00
LCD85: jsr LCDA8
beq LCD91
LCD8A: stz $0579
lda #$A0
bra LCD3A
2021-11-27 02:58:21 +00:00
2021-11-07 02:16:53 +00:00
LCD91: phx
2021-11-27 02:58:21 +00:00
ldx FKEYPTR
jsr ReadAuxRAM
2021-11-07 02:16:53 +00:00
lda $0200,x
2021-11-27 02:58:21 +00:00
jsr ReadPreviousRAM
2021-11-07 02:16:53 +00:00
plx
2021-11-27 02:58:21 +00:00
inc FKEYPTR
2021-11-07 02:16:53 +00:00
cmp #$00
beq LCD8A
bra LCD3A
2021-11-27 02:58:21 +00:00
;;; ============================================================
LCDA8: jsr ReadAuxRAM
2021-11-07 02:16:53 +00:00
lda #$00
phx
tax
clc
LCDB0: adc $0200,x
inx
bne LCDB0
plx
2021-11-27 02:58:21 +00:00
jsr ReadPreviousRAM
2021-11-07 02:16:53 +00:00
cmp $04F9
rts
2021-11-27 02:58:21 +00:00
;;; ============================================================
;;; Given FKEY in A ($20...$2D), get definition offset
;;; (from Aux $200) into FKEYPTR
FindFKEYDefnOffset:
phx
2021-11-07 02:16:53 +00:00
phy
2021-11-27 02:58:21 +00:00
jsr ReadAuxRAM
2021-11-07 02:16:53 +00:00
sec
2021-11-27 02:58:21 +00:00
sbc #$20 ; Map F1 to $00, etc
2021-11-07 02:16:53 +00:00
ldy #$00
tax
2021-11-27 02:58:21 +00:00
beq @l4
@l1: lda $0200,y
beq @l2
2021-11-07 02:16:53 +00:00
iny
2021-11-27 02:58:21 +00:00
bra @l1
@l2: iny
@l3: dex
bne @l1
@l4: jsr ReadPreviousRAM
sty FKEYPTR
2021-11-07 02:16:53 +00:00
ply
plx
rts
2021-11-27 02:58:21 +00:00
;;; ============================================================
;;; Initialize FKEY definitions
;;; Copied to Aux $200 by `InitFKEYDefinitions`
SpecialStrings:
.byte "RUN\r", 0
.byte "LIST\r", 0
.byte $FF
2021-11-07 02:16:53 +00:00
2021-11-27 02:58:21 +00:00
InitFKEYDefinitions:
sta WRCARDRAM
2021-11-07 02:16:53 +00:00
lda #$00
tax
2021-11-27 02:58:21 +00:00
@l1: sta $0200,x
2021-11-07 02:16:53 +00:00
inx
cpx #$0C
2021-11-27 02:58:21 +00:00
bcc @l1
@l2: lda SpecialStrings - 12,x
2021-11-07 02:16:53 +00:00
cmp #$FF
2021-11-27 02:58:21 +00:00
beq @l3
sta $0200,x
2021-11-07 02:16:53 +00:00
inx
2021-11-27 02:58:21 +00:00
bra @l2
@l3: sta WRMAINRAM
2021-11-07 02:16:53 +00:00
stz $0579
2021-11-27 02:58:21 +00:00
;; fall through
2021-11-07 02:16:53 +00:00
LCE0D: jsr LCDA8
sta $04F9
2021-11-13 04:38:12 +00:00
jmp pageC5::DoBankC5
2021-11-07 02:16:53 +00:00
2021-11-27 02:58:21 +00:00
;;; ============================================================
;;; Read from Aux (saving previous state)
ReadAuxRAM:
pha
2021-11-07 02:41:09 +00:00
lda RDRAMRD
sta RDMAINRAM
2021-11-07 02:51:44 +00:00
sta OURCV
2021-11-07 02:41:09 +00:00
sta RDCARDRAM
2021-11-07 02:16:53 +00:00
pla
rts
2021-11-27 02:58:21 +00:00
;;; Restore previous read bank state
ReadPreviousRAM:
pha
2021-11-07 02:41:09 +00:00
sta RDMAINRAM
2021-11-07 02:51:44 +00:00
lda OURCV
2021-11-27 02:58:21 +00:00
bpl @l1
2021-11-07 02:41:09 +00:00
sta RDCARDRAM
2021-11-27 02:58:21 +00:00
@l1: pla
2021-11-07 02:16:53 +00:00
rts
2021-11-07 02:51:44 +00:00
;;; ============================================================
;;; Load X,Y with address of a routine -1 (for `ROMCall`)
.macro LDXY addr
ldx #.hibyte(addr-1)
ldy #.lobyte(addr-1)
.endmacro
;;; ============================================================
DoSETWND:
2021-11-27 02:58:21 +00:00
lda #0 ; set cursor to row 0
bit RDTEXT ; unless graphics mode
bmi :+
lda #20 ; then use row 20
: LDXY SETWND
2021-11-07 02:51:44 +00:00
bra ROMCall
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 02:51:44 +00:00
DoBell:
LDXY BELLB
bra ROMCall
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 02:51:44 +00:00
DoSETKBD:
LDXY SETKBD
bra ROMCall
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 02:51:44 +00:00
DoSETVID:
LDXY SETVID
bra ROMCall
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 02:51:44 +00:00
DoMON_VTAB:
LDXY MON_VTAB
bra ROMCall
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 03:26:27 +00:00
DoClearEOS:
2021-11-07 02:51:44 +00:00
LDXY CLREOP
bra ROMCall
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 03:26:27 +00:00
DoHomeAndClear:
2021-11-07 02:51:44 +00:00
LDXY HOME
bra ROMCall
2021-11-07 03:06:39 +00:00
;;; ============================================================
2021-11-07 03:26:27 +00:00
DoClearEOL:
2021-11-07 02:51:44 +00:00
LDXY CLREOL
;; fall through
;;; ============================================================
2021-11-07 03:06:39 +00:00
;;; A = character, X,Y = ROM address-1 (return value to push to stack)
2021-11-07 02:51:44 +00:00
ROMCall:
sta TEMP2
2021-11-07 02:41:09 +00:00
bit RDLCRAM
2021-11-07 02:16:53 +00:00
php
2021-11-07 02:41:09 +00:00
bit RDLCBNK2
2021-11-07 02:16:53 +00:00
php
2021-11-07 20:52:15 +00:00
lda #.hibyte(ROMCallReturn-1)
2021-11-07 02:16:53 +00:00
pha
2021-11-07 20:52:15 +00:00
lda #.lobyte(ROMCallReturn-1)
2021-11-07 02:16:53 +00:00
pha
phx
phy
2021-11-07 02:41:09 +00:00
bit ROMIN2
2021-11-07 02:51:44 +00:00
lda TEMP2
2021-11-07 02:16:53 +00:00
rts
2021-11-07 20:52:15 +00:00
ROMCallReturn:
2021-11-07 02:16:53 +00:00
plp
2021-11-07 20:52:15 +00:00
bpl @l2
plp
bpl @l1
2021-11-07 02:41:09 +00:00
bit LCBANK2
bit LCBANK2
2021-11-07 20:52:15 +00:00
bra @l4
2021-11-07 03:06:39 +00:00
2021-11-07 20:52:15 +00:00
@l1: bit ROMIN
2021-11-07 02:41:09 +00:00
bit ROMIN
2021-11-07 20:52:15 +00:00
bra @l4
2021-11-07 03:06:39 +00:00
2021-11-07 20:52:15 +00:00
@l2: plp
bpl @l3
2021-11-07 02:41:09 +00:00
bit LCBANK1
bit LCBANK1
2021-11-07 20:52:15 +00:00
bra @l4
2021-11-07 03:06:39 +00:00
2021-11-07 20:52:15 +00:00
@l3: bit $C089 ; ???
bit $C089 ; ???
@l4: lda BASL
2021-11-07 02:51:44 +00:00
sta OLDBASL
2021-11-07 02:41:09 +00:00
lda BASH
2021-11-07 02:51:44 +00:00
sta OLDBASH
2021-11-07 02:41:09 +00:00
lda CH
2021-11-07 02:51:44 +00:00
sta OURCH
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rts
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;;; ============================================================
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LCEBB: ldy CH
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LCEBD: phy
jsr LCED2
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lda (BASL),y
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LCEC3: ply
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bit TXTPAGE1
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rts
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;;; ============================================================
LCEC8:
phy
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pha
jsr LCED2
pla
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sta (BASL),y
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bra LCEC3
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;;; ============================================================
LCED2:
bit RD80VID
bpl @l1
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tya
lsr a
tay
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bcc @l2
@l1: bit TXTPAGE1
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rts
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@l2: bit TXTPAGE2
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rts
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;;; ============================================================
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.if !INCLUDE_PATCHES
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.byte "EN\r"
.byte "\tASL\tWIDTH\r"
.byte "\tSTA\tON80ST\tMAKE SURE 80 STORE IS ENABLED\r"
.byte "\r"
.byte ";CHANGED THIS 9/15/86 FOR HABA MERGE AND MOUSE WRITE:\r"
.byte "\r"
.byte "FIXCOL\tLDA\tCOL\tHAVE THEY CHANGED COL ?\r"
.byte "\tCMP\tOLDCOL\r"
.byte "\tBNE\t.2\tYES - USE THEIRS\r"
.byte "\tLDA\tAPPLECOL\tELSE USE OURS (THEY MIGHT HAVE\r"
.byte ";\t\t\t CHANGED THIS TOO)\r"
.byte ".2\tSTA\tCOL\r"
.byte "\r"
.byte ".END\tRTS\r"
.byte "\r"
.byte "\x1F"
.byte "\r;E"
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.else
Patch4:
lda CHAR ; char to be printed
bit INVFLG
bmi :+ ; normal
and #$7F ; clear high bit
: and #$FF ; set N flag
rts
.endif
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;;; ============================================================
.res $D000 - *, 0
;;; ============================================================
.assert * = $D000, error, "Length changed"