experimental Commodore PET target

codeCore/src/prog8/code/target/PETTarget.kt

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+package prog8.code.target
+
+import prog8.code.core.Encoding
+import prog8.code.core.ICompilationTarget
+import prog8.code.core.IMemSizer
+import prog8.code.core.IStringEncoding
+import prog8.code.target.cbm.CbmMemorySizer
+import prog8.code.target.pet.PETMachineDefinition
+
+
+class PETTarget: ICompilationTarget, IStringEncoding by Encoder, IMemSizer by CbmMemorySizer {
+    override val name = NAME
+    override val machine = PETMachineDefinition()
+    override val supportedEncodings = setOf(Encoding.PETSCII, Encoding.SCREENCODES)
+    override val defaultEncoding = Encoding.PETSCII
+
+    companion object {
+        const val NAME = "pet32"
+    }
+}

codeCore/src/prog8/code/target/pet/PETMachineDefinition.kt

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+package prog8.code.target.pet
+
+import prog8.code.core.*
+import prog8.code.target.C64Target
+import prog8.code.target.cbm.Mflpt5
+import java.nio.file.Path
+
+
+class PETMachineDefinition: IMachineDefinition {
+
+    override val cpu = CpuType.CPU6502
+
+    override val FLOAT_MAX_POSITIVE = Mflpt5.FLOAT_MAX_POSITIVE
+    override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
+    override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
+    override val PROGRAM_LOAD_ADDRESS = 0x0401u
+
+    override val BSSHIGHRAM_START = 0xffffu
+    override val BSSHIGHRAM_END = 0xffffu
+
+    override lateinit var zeropage: Zeropage
+    override lateinit var golden: GoldenRam
+
+    override fun getFloatAsmBytes(num: Number) = Mflpt5.fromNumber(num).makeFloatFillAsm()
+
+    override fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String> {
+        return if (compilerOptions.launcher == CbmPrgLauncherType.BASIC || compilerOptions.output == OutputType.PRG)
+            listOf("syslib")
+        else
+            emptyList()
+    }
+
+    override fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path) {
+        if(selectedEmulator!=1) {
+            System.err.println("The pet target only supports the main emulator (Vice).")
+            return
+        }
+
+        println("\nStarting PET emulator...")
+        val viceMonlist = C64Target.viceMonListName(programNameWithPath.toString())
+        val cmdline = listOf("xpet", "-model", "4032", "-ramsize", "32", "-videosize", "40", "-silent", "-moncommands", viceMonlist,
+                "-autostartprgmode", "1", "-autostart-warp", "-autostart", "${programNameWithPath}.prg")
+        val processb = ProcessBuilder(cmdline).inheritIO()
+        val process=processb.start()
+        process.waitFor()
+    }
+
+    override fun isIOAddress(address: UInt): Boolean = address in 0xe800u..0xe8ffu
+
+    override fun initializeMemoryAreas(compilerOptions: CompilationOptions) {
+        zeropage = PETZeropage(compilerOptions)
+        // there's no golden ram.
+    }
+
+}

codeCore/src/prog8/code/target/pet/PETZeropage.kt

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+package prog8.code.target.pet
+
+import prog8.code.core.CompilationOptions
+import prog8.code.core.InternalCompilerException
+import prog8.code.core.Zeropage
+import prog8.code.core.ZeropageType
+
+
+// reference: http://www.zimmers.net/cbmpics/cbm/PETx/petmem.txt
+
+class PETZeropage(options: CompilationOptions) : Zeropage(options) {
+
+    override val SCRATCH_B1 = 0xb3u      // temp storage for a single byte
+    override val SCRATCH_REG = 0xb4u     // temp storage for a register, must be B1+1
+    override val SCRATCH_W1 = 0xb6u      // temp storage 1 for a word
+    override val SCRATCH_W2 = 0xb8u      // temp storage 2 for a word
+
+    init {
+        if (options.floats) {
+            throw InternalCompilerException("PET target doesn't yet support floating point routines")
+        }
+
+        if (options.floats && options.zeropage !in arrayOf(
+                ZeropageType.FLOATSAFE,
+                ZeropageType.BASICSAFE,
+                ZeropageType.DONTUSE
+            ))
+            throw InternalCompilerException("when floats are enabled, zero page type should be 'floatsafe' or 'basicsafe' or 'dontuse'")
+
+        when (options.zeropage) {
+            ZeropageType.FULL -> {
+                free.addAll(0x00u..0xffu)
+                free.removeAll(listOf(0x8du, 0x8eu, 0x8fu, 0x97u, 0x98u, 0x99u, 0x9au, 0x9bu, 0x9eu, 0xa7u, 0xa8u, 0xa9u, 0xaau))        // these are updated/used by IRQ
+            }
+            ZeropageType.KERNALSAFE -> {
+                free.addAll(0x00u..0xffu)
+                free.removeAll(listOf(0x8du, 0x8eu, 0x8fu, 0x97u, 0x98u, 0x99u, 0x9au, 0x9bu, 0x9eu, 0xa7u, 0xa8u, 0xa9u, 0xaau))        // these are updated/used by IRQ
+            }
+            ZeropageType.FLOATSAFE,
+            ZeropageType.BASICSAFE -> {
+                free.addAll(0xb3u..0xbau)       // TODO more?
+            }
+            ZeropageType.DONTUSE -> {
+                free.clear()  // don't use zeropage at all
+            }
+        }
+
+        val distinctFree = free.distinct()
+        free.clear()
+        free.addAll(distinctFree)
+
+        removeReservedFromFreePool()
+    }
+
+    override fun allocateCx16VirtualRegisters() {
+        TODO("Not known if C128 can put the virtual regs in ZP")
+    }
+}