mirror of
https://github.com/irmen/prog8.git
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implement some more missing codegen for inplace Prefix expressions
This commit is contained in:
parent
4270c04856
commit
26e66f046f
@ -11,7 +11,6 @@ import prog8.compiler.target.C64Target
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import prog8.compiler.target.Cx16Target
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import prog8.compiler.target.cbm.AssemblyProgram
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import prog8.compiler.target.cbm.loadAsmIncludeFile
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import prog8.compiler.target.cpu6502.codegen.assignment.*
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import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignSource
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import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget
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import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignment
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@ -852,14 +851,14 @@ class AsmGen(private val program: Program,
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internal fun translateNormalAssignment(assign: AsmAssignment) =
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assignmentAsmGen.translateNormalAssignment(assign)
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internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair) =
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assignmentAsmGen.assignExpressionToRegister(expr, register)
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internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair, signed: Boolean=false) =
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assignmentAsmGen.assignExpressionToRegister(expr, register, signed)
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internal fun assignExpressionToVariable(expr: Expression, asmVarName: String, dt: DataType, scope: Subroutine?) =
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assignmentAsmGen.assignExpressionToVariable(expr, asmVarName, dt, scope)
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internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair) =
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assignmentAsmGen.assignVariableToRegister(asmVarName, register)
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internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair, signed: Boolean=false) =
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assignmentAsmGen.assignVariableToRegister(asmVarName, register, signed)
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internal fun assignRegister(reg: RegisterOrPair, target: AsmAssignTarget) {
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when(reg) {
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@ -1400,7 +1399,7 @@ $label nop""")
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else -> {
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// all else take its address and assign that also to AY register pair
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val addrofValue = AddressOf(returnvalue as IdentifierReference, returnvalue.position)
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assignmentAsmGen.assignExpressionToRegister(addrofValue, returnReg.registerOrPair!!)
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assignmentAsmGen.assignExpressionToRegister(addrofValue, returnReg.registerOrPair!!, false)
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}
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}
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}
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@ -261,7 +261,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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if(resultToStack)
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AsmAssignTarget(TargetStorageKind.STACK, program, asmgen, DataType.UWORD, null)
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else
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AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, null, program, asmgen)
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AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, null, program, asmgen)
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val assign = AsmAssignment(src, target, false, program.memsizer, fcall.position)
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asmgen.translateNormalAssignment(assign)
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asmgen.slabs[name] = size
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@ -273,7 +273,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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asmgen.out(" jsr prog8_lib.func_sqrt16_stack")
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else {
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asmgen.out(" jsr prog8_lib.func_sqrt16_into_A")
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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}
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@ -285,11 +285,11 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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when(func.name) {
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"sin8", "sin8u", "cos8", "cos8u" -> {
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asmgen.out(" jsr prog8_lib.func_${func.name}_into_A")
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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"sin16", "sin16u", "cos16", "cos16u" -> {
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asmgen.out(" jsr prog8_lib.func_${func.name}_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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}
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}
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@ -578,7 +578,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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asmgen.out(" jsr floats.func_${func.name}_stack")
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else {
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asmgen.out(" jsr floats.func_${func.name}_fac1")
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen))
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen))
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}
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}
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@ -603,7 +603,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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DataType.FLOAT -> asmgen.out(" jsr floats.func_sign_f_into_A")
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else -> throw AssemblyError("weird type $dt")
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}
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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}
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@ -624,7 +624,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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DataType.ARRAY_F -> asmgen.out(" jsr floats.func_${function.name}_f_into_A")
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else -> throw AssemblyError("weird type $dt")
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}
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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}
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@ -644,23 +644,23 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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when (dt.getOr(DataType.UNDEFINED)) {
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DataType.ARRAY_UB, DataType.STR -> {
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asmgen.out(" jsr prog8_lib.func_${function.name}_ub_into_A")
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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DataType.ARRAY_B -> {
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asmgen.out(" jsr prog8_lib.func_${function.name}_b_into_A")
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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DataType.ARRAY_UW -> {
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asmgen.out(" jsr prog8_lib.func_${function.name}_uw_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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DataType.ARRAY_W -> {
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asmgen.out(" jsr prog8_lib.func_${function.name}_w_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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DataType.ARRAY_F -> {
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asmgen.out(" jsr floats.func_${function.name}_f_fac1")
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen))
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen))
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}
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else -> throw AssemblyError("weird type $dt")
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}
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@ -683,23 +683,23 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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when (dt.getOr(DataType.UNDEFINED)) {
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DataType.ARRAY_UB, DataType.STR -> {
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asmgen.out(" jsr prog8_lib.func_sum_ub_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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DataType.ARRAY_B -> {
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asmgen.out(" jsr prog8_lib.func_sum_b_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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DataType.ARRAY_UW -> {
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asmgen.out(" jsr prog8_lib.func_sum_uw_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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DataType.ARRAY_W -> {
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asmgen.out(" jsr prog8_lib.func_sum_w_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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DataType.ARRAY_F -> {
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asmgen.out(" jsr floats.func_sum_f_fac1")
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen))
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen))
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}
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else -> throw AssemblyError("weird type $dt")
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}
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@ -1141,15 +1141,15 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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when (dt) {
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in ByteDatatypes -> {
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asmgen.out(" jsr prog8_lib.abs_b_into_A")
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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in WordDatatypes -> {
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asmgen.out(" jsr prog8_lib.abs_w_into_AY")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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DataType.FLOAT -> {
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asmgen.out(" jsr floats.abs_f_fac1")
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen))
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assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen))
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}
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else -> throw AssemblyError("weird type")
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}
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@ -1163,7 +1163,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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asmgen.out(" jsr prog8_lib.func_rnd_stack")
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else {
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asmgen.out(" jsr math.randbyte")
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A)
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assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A)
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}
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}
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"rndw" -> {
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@ -1171,7 +1171,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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asmgen.out(" jsr prog8_lib.func_rndw_stack")
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else {
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asmgen.out(" jsr math.randword")
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY)
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assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY)
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}
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}
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else -> throw AssemblyError("wrong func")
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@ -1534,7 +1534,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
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AsmAssignSource.fromAstSource(value, program, asmgen)
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}
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}
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val tgt = AsmAssignTarget.fromRegisters(conv.reg!!, null, program, asmgen)
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val tgt = AsmAssignTarget.fromRegisters(conv.reg!!, false, null, program, asmgen)
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val assign = AsmAssignment(src, tgt, false, program.memsizer, value.position)
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asmgen.translateNormalAssignment(assign)
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}
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@ -86,11 +86,11 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
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return
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}
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if(dt==DataType.UBYTE) {
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asmgen.assignExpressionToRegister(left, RegisterOrPair.A)
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asmgen.assignExpressionToRegister(left, RegisterOrPair.A, false)
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if (left is FunctionCall && !left.isSimple)
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asmgen.out(" cmp #0")
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} else {
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asmgen.assignExpressionToRegister(left, RegisterOrPair.AY)
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asmgen.assignExpressionToRegister(left, RegisterOrPair.AY, false)
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asmgen.out(" sty P8ZP_SCRATCH_B1 | ora P8ZP_SCRATCH_B1")
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}
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when (operator) {
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@ -102,7 +102,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
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}
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}
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DataType.BYTE -> {
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asmgen.assignExpressionToRegister(left, RegisterOrPair.A)
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asmgen.assignExpressionToRegister(left, RegisterOrPair.A, true)
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if (left is FunctionCall && !left.isSimple)
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asmgen.out(" cmp #0")
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when (operator) {
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@ -119,7 +119,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
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}
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}
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DataType.WORD -> {
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asmgen.assignExpressionToRegister(left, RegisterOrPair.AY)
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asmgen.assignExpressionToRegister(left, RegisterOrPair.AY, true)
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when (operator) {
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"==" -> asmgen.out(" bne $jumpIfFalseLabel | cpy #0 | bne $jumpIfFalseLabel")
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"!=" -> asmgen.out(" sty P8ZP_SCRATCH_B1 | ora P8ZP_SCRATCH_B1 | beq $jumpIfFalseLabel")
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@ -336,7 +336,7 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
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if(parameter.value.type in ByteDatatypes && (register==RegisterOrPair.AX || register == RegisterOrPair.AY || register==RegisterOrPair.XY || register in Cx16VirtualRegisters))
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AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, parameter.value.type, sub, register = register)
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else
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AsmAssignTarget.fromRegisters(register, sub, program, asmgen)
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AsmAssignTarget.fromRegisters(register, false, sub, program, asmgen)
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val src = if(valueDt in PassByReferenceDatatypes) {
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if(value is IdentifierReference) {
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val addr = AddressOf(value, Position.DUMMY)
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@ -62,21 +62,21 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
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throw AssemblyError("unknown dt")
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val dt = idt.getOr(DataType.UNDEFINED)
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when {
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identifier != null -> AsmAssignTarget(prog8.compiler.target.cpu6502.codegen.assignment.TargetStorageKind.VARIABLE, program, asmgen, dt, assign.definingSubroutine, variableAsmName = asmgen.asmVariableName(identifier!!), origAstTarget = this)
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arrayindexed != null -> AsmAssignTarget(prog8.compiler.target.cpu6502.codegen.assignment.TargetStorageKind.ARRAY, program, asmgen, dt, assign.definingSubroutine, array = arrayindexed, origAstTarget = this)
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memoryAddress != null -> AsmAssignTarget(prog8.compiler.target.cpu6502.codegen.assignment.TargetStorageKind.MEMORY, program, asmgen, dt, assign.definingSubroutine, memory = memoryAddress, origAstTarget = this)
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identifier != null -> AsmAssignTarget(TargetStorageKind.VARIABLE, program, asmgen, dt, assign.definingSubroutine, variableAsmName = asmgen.asmVariableName(identifier!!), origAstTarget = this)
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arrayindexed != null -> AsmAssignTarget(TargetStorageKind.ARRAY, program, asmgen, dt, assign.definingSubroutine, array = arrayindexed, origAstTarget = this)
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memoryAddress != null -> AsmAssignTarget(TargetStorageKind.MEMORY, program, asmgen, dt, assign.definingSubroutine, memory = memoryAddress, origAstTarget = this)
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else -> throw AssemblyError("weird target")
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}
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}
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fun fromRegisters(registers: RegisterOrPair, scope: Subroutine?, program: Program, asmgen: AsmGen): AsmAssignTarget =
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fun fromRegisters(registers: RegisterOrPair, signed: Boolean, scope: Subroutine?, program: Program, asmgen: AsmGen): AsmAssignTarget =
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when(registers) {
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RegisterOrPair.A,
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RegisterOrPair.X,
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RegisterOrPair.Y -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UBYTE, scope, register = registers)
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RegisterOrPair.Y -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.BYTE else DataType.UBYTE, scope, register = registers)
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RegisterOrPair.AX,
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RegisterOrPair.AY,
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RegisterOrPair.XY -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UWORD, scope, register = registers)
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RegisterOrPair.XY -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers)
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RegisterOrPair.FAC1,
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RegisterOrPair.FAC2 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.FLOAT, scope, register = registers)
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RegisterOrPair.R0,
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@ -94,7 +94,7 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
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RegisterOrPair.R12,
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RegisterOrPair.R13,
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RegisterOrPair.R14,
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RegisterOrPair.R15 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UWORD, scope, register = registers)
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RegisterOrPair.R15 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers)
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}
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}
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}
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@ -379,15 +379,15 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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when (valueDt) {
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in ByteDatatypes -> {
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assignExpressionToRegister(value, RegisterOrPair.A)
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assignExpressionToRegister(value, RegisterOrPair.A, valueDt==DataType.BYTE)
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assignTypeCastedRegisters(target.asmVarname, targetDt, RegisterOrPair.A, valueDt)
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}
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in WordDatatypes -> {
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assignExpressionToRegister(value, RegisterOrPair.AY)
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assignExpressionToRegister(value, RegisterOrPair.AY, valueDt==DataType.WORD)
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assignTypeCastedRegisters(target.asmVarname, targetDt, RegisterOrPair.AY, valueDt)
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}
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DataType.FLOAT -> {
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assignExpressionToRegister(value, RegisterOrPair.FAC1)
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assignExpressionToRegister(value, RegisterOrPair.FAC1, true)
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assignTypeCastedFloatFAC1(target.asmVarname, targetDt)
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}
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in PassByReferenceDatatypes -> {
|
||||
@ -414,14 +414,14 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
|
||||
RegisterOrPair.X,
|
||||
RegisterOrPair.Y -> {
|
||||
// 'cast' an ubyte value to a byte register; no cast needed at all
|
||||
return assignExpressionToRegister(value, target.register)
|
||||
return assignExpressionToRegister(value, target.register, false)
|
||||
}
|
||||
RegisterOrPair.AX,
|
||||
RegisterOrPair.AY,
|
||||
RegisterOrPair.XY,
|
||||
in Cx16VirtualRegisters -> {
|
||||
// cast an ubyte value to a 16 bits register, just assign it and make use of the value extension
|
||||
return assignExpressionToRegister(value, target.register!!)
|
||||
return assignExpressionToRegister(value, target.register!!, false)
|
||||
}
|
||||
else -> {}
|
||||
}
|
||||
@ -439,7 +439,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
|
||||
RegisterOrPair.XY,
|
||||
in Cx16VirtualRegisters -> {
|
||||
// 'cast' uword into a 16 bits register, just assign it
|
||||
return assignExpressionToRegister(value, target.register!!)
|
||||
return assignExpressionToRegister(value, target.register!!, false)
|
||||
}
|
||||
else -> {}
|
||||
}
|
||||
@ -2169,9 +2169,9 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
|
||||
}
|
||||
}
|
||||
|
||||
internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair) {
|
||||
internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair, signed: Boolean) {
|
||||
val src = AsmAssignSource.fromAstSource(expr, program, asmgen)
|
||||
val tgt = AsmAssignTarget.fromRegisters(register, null, program, asmgen)
|
||||
val tgt = AsmAssignTarget.fromRegisters(register, signed, null, program, asmgen)
|
||||
val assign = AsmAssignment(src, tgt, false, program.memsizer, expr.position)
|
||||
translateNormalAssignment(assign)
|
||||
}
|
||||
@ -2183,8 +2183,8 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
|
||||
translateNormalAssignment(assign)
|
||||
}
|
||||
|
||||
internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair) {
|
||||
val tgt = AsmAssignTarget.fromRegisters(register, null, program, asmgen)
|
||||
internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair, signed: Boolean) {
|
||||
val tgt = AsmAssignTarget.fromRegisters(register, signed, null, program, asmgen)
|
||||
val src = AsmAssignSource(SourceStorageKind.VARIABLE, program, asmgen, tgt.datatype, variableAsmName = asmVarName)
|
||||
val assign = AsmAssignment(src, tgt, false, program.memsizer, Position.DUMMY)
|
||||
translateNormalAssignment(assign)
|
||||
|
@ -248,9 +248,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
|
||||
when (target.datatype) {
|
||||
in ByteDatatypes -> {
|
||||
val tgt =
|
||||
prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget.fromRegisters(
|
||||
AsmAssignTarget.fromRegisters(
|
||||
RegisterOrPair.A,
|
||||
null,
|
||||
target.datatype == DataType.BYTE, null,
|
||||
program,
|
||||
asmgen
|
||||
)
|
||||
@ -260,9 +260,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
|
||||
}
|
||||
in WordDatatypes -> {
|
||||
val tgt =
|
||||
prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget.fromRegisters(
|
||||
AsmAssignTarget.fromRegisters(
|
||||
RegisterOrPair.AY,
|
||||
null,
|
||||
target.datatype == DataType.WORD, null,
|
||||
program,
|
||||
asmgen
|
||||
)
|
||||
@ -272,9 +272,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
|
||||
}
|
||||
DataType.FLOAT -> {
|
||||
val tgt =
|
||||
prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget.fromRegisters(
|
||||
AsmAssignTarget.fromRegisters(
|
||||
RegisterOrPair.FAC1,
|
||||
null,
|
||||
true, null,
|
||||
program,
|
||||
asmgen
|
||||
)
|
||||
@ -1945,7 +1945,14 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
|
||||
sbc ${target.asmVarname}
|
||||
sta ${target.asmVarname}""")
|
||||
}
|
||||
TargetStorageKind.REGISTER -> TODO("missing codegen for byte reg negate")
|
||||
TargetStorageKind.REGISTER -> {
|
||||
when(target.register!!) {
|
||||
RegisterOrPair.A -> asmgen.out(" sta P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1")
|
||||
RegisterOrPair.X -> asmgen.out(" stx P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1 | tax")
|
||||
RegisterOrPair.Y -> asmgen.out(" sty P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1 | tay")
|
||||
else -> throw AssemblyError("invalid reg dt for byte negate")
|
||||
}
|
||||
}
|
||||
TargetStorageKind.MEMORY -> TODO("can't in-place negate memory ubyte")
|
||||
TargetStorageKind.STACK -> TODO("missing codegen for byte stack negate")
|
||||
else -> throw AssemblyError("missing codegen for in-place negate byte array")
|
||||
@ -1963,7 +1970,52 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
|
||||
sbc ${target.asmVarname}+1
|
||||
sta ${target.asmVarname}+1""")
|
||||
}
|
||||
TargetStorageKind.REGISTER -> TODO("missing codegen for word reg negate")
|
||||
TargetStorageKind.REGISTER -> {
|
||||
when(target.register!!) { //P8ZP_SCRATCH_REG
|
||||
RegisterOrPair.AX -> {
|
||||
asmgen.out("""
|
||||
sta P8ZP_SCRATCH_REG
|
||||
stx P8ZP_SCRATCH_REG+1
|
||||
lda #0
|
||||
sec
|
||||
sbc P8ZP_SCRATCH_REG
|
||||
pha
|
||||
lda #0
|
||||
sbc P8ZP_SCRATCH_REG+1
|
||||
tax
|
||||
pla""")
|
||||
}
|
||||
RegisterOrPair.AY -> {
|
||||
asmgen.out("""
|
||||
sta P8ZP_SCRATCH_REG
|
||||
sty P8ZP_SCRATCH_REG+1
|
||||
lda #0
|
||||
sec
|
||||
sbc P8ZP_SCRATCH_REG
|
||||
pha
|
||||
lda #0
|
||||
sbc P8ZP_SCRATCH_REG+1
|
||||
tay
|
||||
pla""")
|
||||
}
|
||||
RegisterOrPair.XY -> {
|
||||
asmgen.out("""
|
||||
stx P8ZP_SCRATCH_REG
|
||||
sty P8ZP_SCRATCH_REG+1
|
||||
lda #0
|
||||
sec
|
||||
sbc P8ZP_SCRATCH_REG
|
||||
tax
|
||||
lda #0
|
||||
sbc P8ZP_SCRATCH_REG+1
|
||||
tay""")
|
||||
}
|
||||
in Cx16VirtualRegisters -> {
|
||||
TODO("codegen for cx16 word register negate")
|
||||
}
|
||||
else -> throw AssemblyError("invalid reg dt for word neg")
|
||||
}
|
||||
}
|
||||
TargetStorageKind.MEMORY -> TODO("no asm gen for word memory negate")
|
||||
TargetStorageKind.STACK -> TODO("missing codegen for word stack negate")
|
||||
else -> throw AssemblyError("missing codegen for in-place negate word array")
|
||||
|
@ -4,7 +4,23 @@
|
||||
|
||||
main {
|
||||
sub start() {
|
||||
uword xx=$2000
|
||||
ubyte xx=$20
|
||||
|
||||
if not xx {
|
||||
xx++
|
||||
}
|
||||
|
||||
if ~xx {
|
||||
xx++
|
||||
}
|
||||
|
||||
byte yy=3
|
||||
|
||||
if -yy {
|
||||
xx++
|
||||
}
|
||||
|
||||
|
||||
|
||||
@(~xx) *= 2
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user