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tweak IR

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This commit is contained in:
Irmen de Jong 2024-01-07 22:10:43 +01:00
parent f8084e7955
commit 37fa3b34a2
2 changed files with 28 additions and 6 deletions
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2
codeGenIntermediate/src/prog8/codegen/intermediate/IRPeepholeOptimizer.kt
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@ -330,7 +330,7 @@ class IRPeepholeOptimizer(private val irprog: IRProgram) {
changed = true changed = true
} else if (previous.opcode in OpcodesThatSetStatusbitsButNotCarry) { } else if (previous.opcode in OpcodesThatSetStatusbitsButNotCarry) {
val next = indexedInstructions[idx + 1].value val next = indexedInstructions[idx + 1].value
if (next.opcode !in arrayOf(Opcode.BSTCC, Opcode.BSTCS, Opcode.BSTPOS, Opcode.BSTNEG)) { if (next.opcode !in OpcodesThatDependOnCarry) {
chunk.instructions.removeAt(idx) chunk.instructions.removeAt(idx)
changed = true changed = true
} }

32
intermediate/src/prog8/intermediate/IRInstructions.kt
View File

@ -18,6 +18,7 @@ Status flags: Carry, Zero, Negative. NOTE: status flags are only affected by t
LOAD instructions DO affect the Z and N flags. LOAD instructions DO affect the Z and N flags.
INC/DEC instructions DO affect the Z and N flags, INC/DEC instructions DO affect the Z and N flags,
other instructions only affect Z an N flags if the value in a result register is written. other instructions only affect Z an N flags if the value in a result register is written.
See OpcodesThatSetStatusbits
Instruction set is mostly a load/store architecture, there are few instructions operating on memory directly. Instruction set is mostly a load/store architecture, there are few instructions operating on memory directly.
@ -387,14 +388,14 @@ enum class Opcode {
BREAKPOINT BREAKPOINT
} }
val OpcodesThatJump = setOf( val OpcodesThatJump = arrayOf(
Opcode.JUMP, Opcode.JUMP,
Opcode.JUMPI, Opcode.JUMPI,
Opcode.RETURN, Opcode.RETURN,
Opcode.RETURNR Opcode.RETURNR
) )
val OpcodesThatBranch = setOf( val OpcodesThatBranch = arrayOf(
Opcode.JUMP, Opcode.JUMP,
Opcode.JUMPI, Opcode.JUMPI,
Opcode.RETURN, Opcode.RETURN,
@ -424,11 +425,11 @@ val OpcodesThatBranch = setOf(
Opcode.BLES Opcode.BLES
) )
val OpcodesThatSetStatusbitsIncludingCarry = setOf( val OpcodesThatSetStatusbitsIncludingCarry = arrayOf(
Opcode.CMP, Opcode.CMP,
Opcode.CMPI Opcode.CMPI
) )
val OpcodesThatSetStatusbitsButNotCarry = setOf( val OpcodesThatSetStatusbitsButNotCarry = arrayOf(
Opcode.LOAD, Opcode.LOAD,
Opcode.LOADM, Opcode.LOADM,
Opcode.LOADI, Opcode.LOADI,
@ -438,8 +439,29 @@ val OpcodesThatSetStatusbitsButNotCarry = setOf(
Opcode.INC, Opcode.INC,
Opcode.INCM, Opcode.INCM,
Opcode.DEC, Opcode.DEC,
Opcode.DECM Opcode.DECM,
Opcode.ANDM,
Opcode.ANDR,
Opcode.AND,
Opcode.ORM,
Opcode.ORR,
Opcode.OR,
Opcode.XORM,
Opcode.XORR,
Opcode.XOR
) )
val OpcodesThatDependOnCarry = arrayOf(
Opcode.BSTCC,
Opcode.BSTCS,
Opcode.BSTPOS,
Opcode.BSTNEG,
Opcode.ROXL,
Opcode.ROXLM,
Opcode.ROXR,
Opcode.ROXRM,
)
val OpcodesThatSetStatusbits = OpcodesThatSetStatusbitsButNotCarry + OpcodesThatSetStatusbitsIncludingCarry val OpcodesThatSetStatusbits = OpcodesThatSetStatusbitsButNotCarry + OpcodesThatSetStatusbitsIncludingCarry