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https://github.com/irmen/prog8.git
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refactor IR returnregs 4
This commit is contained in:
Irmen de Jong
parent
54dd3a00df
commit
451e527b7c
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@ -141,17 +141,16 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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if(!zero) {
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// calculate the assignment value
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if (vmDt == IRDataType.FLOAT) {
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resultFpRegister = codeGen.registers.nextFreeFloat()
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val tr = expressionEval.translateExpression(assignment.value)
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addToResult(result, tr, -1, resultFpRegister)
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resultFpRegister = tr.resultFpReg
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addToResult(result, tr, -1, tr.resultFpReg)
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} else {
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resultRegister = if (assignment.value is PtMachineRegister) {
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(assignment.value as PtMachineRegister).register
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} else {
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val reg = codeGen.registers.nextFree()
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val tr = expressionEval.translateExpression(assignment.value)
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addToResult(result, tr, reg, -1)
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reg
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addToResult(result, tr, tr.resultReg, -1)
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tr.resultReg
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}
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}
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}
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@ -10,118 +10,56 @@ import prog8.intermediate.*
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internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGen: ExpressionGen) {
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fun translate(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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when(call.name) {
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"any" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcAny(call, resultRegister), IRDataType.BYTE, resultRegister, -1)
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}
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"all" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcAll(call, resultRegister), IRDataType.BYTE, resultRegister, -1)
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}
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"abs" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcAbs(call, resultRegister), codeGen.irType(call.args[0].type), resultRegister, -1)
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}
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"cmp" -> {
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return ExpressionCodeResult(funcCmp(call), codeGen.irType(call.args[0].type), -1, -1)
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}
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"sgn" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcSgn(call, resultRegister), codeGen.irType(call.type), resultRegister, -1)
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}
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"sqrt16" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcSqrt16(call, resultRegister), IRDataType.WORD, resultRegister, -1)
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}
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"pop" -> {
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return ExpressionCodeResult(funcPop(call), IRDataType.BYTE, -1, -1)
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}
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"popw" -> {
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return ExpressionCodeResult(funcPopw(call), IRDataType.WORD, -1, -1)
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}
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"push" -> {
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return ExpressionCodeResult(funcPush(call), IRDataType.BYTE, -1, -1)
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}
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"pushw" -> {
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return ExpressionCodeResult(funcPushw(call), IRDataType.BYTE,-1, -1)
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}
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return when(call.name) {
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"any" -> funcAny(call)
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"all" -> funcAll(call)
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"abs" -> funcAbs(call)
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"cmp" -> funcCmp(call)
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"sgn" -> funcSgn(call)
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"sqrt16" -> funcSqrt16(call)
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"pop" -> funcPop(call)
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"popw" -> funcPopw(call)
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"push" -> funcPush(call)
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"pushw" -> funcPushw(call)
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"rsave",
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"rsavex",
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"rrestore",
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"rrestorex" -> {
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return ExpressionCodeResult.EMPTY // vm doesn't have registers to save/restore
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}
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"rrestorex" -> ExpressionCodeResult.EMPTY // vm doesn't have registers to save/restore
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"callfar" -> throw AssemblyError("callfar() is for cx16 target only")
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"msb" -> return funcMsb(call)
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"lsb" -> return funcLsb(call)
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"memory" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcMemory(call, resultRegister), IRDataType.WORD, resultRegister, -1)
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}
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"peek" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcPeek(call, resultRegister), IRDataType.BYTE, resultRegister, -1)
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}
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"peekw" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcPeekW(call, resultRegister), IRDataType.WORD, resultRegister, -1)
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}
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"poke" -> {
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return ExpressionCodeResult(funcPoke(call), IRDataType.BYTE, -1, -1)
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}
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"pokew" -> {
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return ExpressionCodeResult(funcPokeW(call), IRDataType.BYTE,-1, -1)
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}
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"pokemon" -> {
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return ExpressionCodeResult(emptyList(), IRDataType.BYTE, -1, -1)
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}
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"mkword" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcMkword(call, resultRegister), IRDataType.WORD, resultRegister, -1)
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}
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"sort" -> {
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return ExpressionCodeResult(funcSort(call), IRDataType.BYTE, -1, -1)
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}
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"reverse" -> {
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return ExpressionCodeResult(funcReverse(call), IRDataType.BYTE, -1, -1)
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}
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"rol" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcRolRor(Opcode.ROXL, call, resultRegister), codeGen.irType(call.args[0].type), resultRegister, -1)
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}
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"ror" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcRolRor(Opcode.ROXR, call, resultRegister), codeGen.irType(call.args[0].type), resultRegister, -1)
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}
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"rol2" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcRolRor(Opcode.ROL, call, resultRegister), codeGen.irType(call.args[0].type), resultRegister, -1)
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}
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"ror2" -> {
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val resultRegister = codeGen.registers.nextFree()
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return ExpressionCodeResult(funcRolRor(Opcode.ROR, call, resultRegister), codeGen.irType(call.args[0].type), resultRegister, -1)
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}
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"msb" -> funcMsb(call)
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"lsb" -> funcLsb(call)
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"memory" -> funcMemory(call)
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"peek" -> funcPeek(call)
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"peekw" -> funcPeekW(call)
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"poke" -> funcPoke(call)
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"pokew" -> funcPokeW(call)
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"pokemon" -> ExpressionCodeResult.EMPTY // easter egg function
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"mkword" -> funcMkword(call)
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"sort" -> funcSort(call)
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"reverse" -> funcReverse(call)
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"rol" -> funcRolRor(Opcode.ROXL, call)
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"ror" -> funcRolRor(Opcode.ROXR, call)
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"rol2" -> funcRolRor(Opcode.ROL, call)
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"ror2" -> funcRolRor(Opcode.ROR, call)
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else -> throw AssemblyError("missing builtinfunc for ${call.name}")
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}
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}
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// TODO let all funcs return ExpressionCodeResult as well
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private fun funcCmp(call: PtBuiltinFunctionCall): IRCodeChunks {
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private fun funcCmp(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val result = mutableListOf<IRCodeChunkBase>()
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val leftTr = exprGen.translateExpression(call.args[0])
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addToResult(result, leftTr, leftTr.resultReg, -1)
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val rightTr = exprGen.translateExpression(call.args[1])
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require(leftTr.resultReg!=rightTr.resultReg)
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addToResult(result, rightTr, rightTr.resultReg, -1)
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val dt = codeGen.irType(call.args[0].type)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.CMP, codeGen.irType(call.args[0].type), reg1=leftTr.resultReg, reg2=rightTr.resultReg)
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it += IRInstruction(Opcode.CMP, dt, reg1=leftTr.resultReg, reg2=rightTr.resultReg)
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}
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return result
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return ExpressionCodeResult(result, dt, leftTr.resultReg, -1)
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}
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private fun funcAny(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
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private fun funcAny(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val arrayName = call.args[0] as PtIdentifier
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val array = codeGen.symbolTable.flat.getValue(arrayName.name) as StStaticVariable
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val syscall =
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@ -139,13 +77,14 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
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it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
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// SysCall call convention: return value in register r0
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if(tr.resultReg!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = tr.resultReg, reg2 = 0)
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}
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return result
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return ExpressionCodeResult(result, IRDataType.BYTE, tr.resultReg, -1)
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}
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private fun funcAll(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
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private fun funcAll(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val arrayName = call.args[0] as PtIdentifier
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val array = codeGen.symbolTable.flat.getValue(arrayName.name) as StStaticVariable
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val syscall =
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@ -163,94 +102,97 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
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it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
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// SysCall call convention: return value in register r0
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if(tr.resultReg!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = tr.resultReg, reg2 = 0)
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}
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return result
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return ExpressionCodeResult(result, IRDataType.BYTE, tr.resultReg, -1)
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}
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private fun funcAbs(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
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private fun funcAbs(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val sourceDt = call.args.single().type
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val result = mutableListOf<IRCodeChunkBase>()
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if(sourceDt!=DataType.UWORD) {
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val tr = exprGen.translateExpression(call.args[0])
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addToResult(result, tr, resultRegister, -1)
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when (sourceDt) {
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DataType.UBYTE -> {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1 = resultRegister)
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}
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if(sourceDt==DataType.UWORD)
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return ExpressionCodeResult.EMPTY
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val tr = exprGen.translateExpression(call.args[0])
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addToResult(result, tr, tr.resultReg, -1)
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when (sourceDt) {
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DataType.UBYTE -> {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1 = tr.resultReg)
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}
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DataType.BYTE -> {
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val notNegativeLabel = codeGen.createLabelName()
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val compareReg = codeGen.registers.nextFree()
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=compareReg, reg2=resultRegister)
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it += IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=compareReg, value=0x80)
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it += IRInstruction(Opcode.BZ, IRDataType.BYTE, reg1=compareReg, labelSymbol = notNegativeLabel)
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it += IRInstruction(Opcode.NEG, IRDataType.BYTE, reg1=resultRegister)
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it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1=resultRegister)
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}
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result += IRCodeChunk(notNegativeLabel, null)
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}
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DataType.WORD -> {
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val notNegativeLabel = codeGen.createLabelName()
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val compareReg = codeGen.registers.nextFree()
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOADR, IRDataType.WORD, reg1=compareReg, reg2=resultRegister)
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it += IRInstruction(Opcode.AND, IRDataType.WORD, reg1=compareReg, value=0x8000)
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it += IRInstruction(Opcode.BZ, IRDataType.WORD, reg1=compareReg, labelSymbol = notNegativeLabel)
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it += IRInstruction(Opcode.NEG, IRDataType.WORD, reg1=resultRegister)
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}
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result += IRCodeChunk(notNegativeLabel, null)
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}
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else -> throw AssemblyError("weird type")
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return ExpressionCodeResult(result, IRDataType.BYTE, tr.resultReg, -1)
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}
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DataType.BYTE -> {
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val notNegativeLabel = codeGen.createLabelName()
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val compareReg = codeGen.registers.nextFree()
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=compareReg, reg2=tr.resultReg)
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it += IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=compareReg, value=0x80)
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it += IRInstruction(Opcode.BZ, IRDataType.BYTE, reg1=compareReg, labelSymbol = notNegativeLabel)
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it += IRInstruction(Opcode.NEG, IRDataType.BYTE, reg1=tr.resultReg)
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it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1=tr.resultReg)
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}
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result += IRCodeChunk(notNegativeLabel, null)
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return ExpressionCodeResult(result, IRDataType.BYTE, tr.resultReg, -1)
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}
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DataType.WORD -> {
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val notNegativeLabel = codeGen.createLabelName()
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val compareReg = codeGen.registers.nextFree()
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOADR, IRDataType.WORD, reg1=compareReg, reg2=tr.resultReg)
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it += IRInstruction(Opcode.AND, IRDataType.WORD, reg1=compareReg, value=0x8000)
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it += IRInstruction(Opcode.BZ, IRDataType.WORD, reg1=compareReg, labelSymbol = notNegativeLabel)
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it += IRInstruction(Opcode.NEG, IRDataType.WORD, reg1=tr.resultReg)
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}
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result += IRCodeChunk(notNegativeLabel, null)
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return ExpressionCodeResult(result, IRDataType.WORD, tr.resultReg, -1)
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}
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else -> throw AssemblyError("weird type")
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}
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return result
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}
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private fun funcSgn(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
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val reg = codeGen.registers.nextFree()
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private fun funcSgn(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val result = mutableListOf<IRCodeChunkBase>()
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val vmDt = codeGen.irType(call.type)
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val tr = exprGen.translateExpression(call.args.single())
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addToResult(result, tr, tr.resultReg, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.SGN, vmDt, reg1 = tr.resultReg, reg2 = tr.resultReg)
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}
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return ExpressionCodeResult(result, vmDt, tr.resultReg, -1)
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}
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private fun funcSqrt16(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val result = mutableListOf<IRCodeChunkBase>()
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val tr = exprGen.translateExpression(call.args.single())
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addToResult(result, tr, reg, -1)
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addToResult(result, tr, tr.resultReg, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.SGN, codeGen.irType(call.type), reg1 = resultRegister, reg2 = reg)
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it += IRInstruction(Opcode.SQRT, IRDataType.WORD, reg1=tr.resultReg, reg2=tr.resultReg)
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}
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return result
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return ExpressionCodeResult(result, IRDataType.WORD, tr.resultReg, -1)
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}
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private fun funcSqrt16(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
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val reg = codeGen.registers.nextFree()
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val result = mutableListOf<IRCodeChunkBase>()
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val tr = exprGen.translateExpression(call.args.single())
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addToResult(result, tr, reg, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.SQRT, IRDataType.WORD, reg1=resultRegister, reg2=reg)
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}
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return result
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}
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private fun funcPop(call: PtBuiltinFunctionCall): IRCodeChunks {
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private fun funcPop(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val code = IRCodeChunk(null, null)
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val reg = codeGen.registers.nextFree()
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code += IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=reg)
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val result = mutableListOf<IRCodeChunkBase>(code)
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result += assignRegisterTo(call.args.single(), reg)
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return result
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return ExpressionCodeResult(result, IRDataType.BYTE, reg, -1)
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}
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private fun funcPopw(call: PtBuiltinFunctionCall): IRCodeChunks {
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private fun funcPopw(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val code = IRCodeChunk(null, null)
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val reg = codeGen.registers.nextFree()
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code += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=reg)
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val result = mutableListOf<IRCodeChunkBase>(code)
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result += assignRegisterTo(call.args.single(), reg)
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return result
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return ExpressionCodeResult(result, IRDataType.WORD, reg, -1)
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}
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private fun funcPush(call: PtBuiltinFunctionCall): IRCodeChunks {
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private fun funcPush(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val result = mutableListOf<IRCodeChunkBase>()
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val reg = codeGen.registers.nextFree()
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val tr = exprGen.translateExpression(call.args.single())
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@ -258,10 +200,10 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=reg)
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}
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return result
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return ExpressionCodeResult(result, IRDataType.BYTE, -1, -1)
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}
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private fun funcPushw(call: PtBuiltinFunctionCall): IRCodeChunks {
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private fun funcPushw(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val result = mutableListOf<IRCodeChunkBase>()
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val reg = codeGen.registers.nextFree()
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val tr = exprGen.translateExpression(call.args.single())
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@ -269,10 +211,10 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1 = reg)
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}
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return result
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return ExpressionCodeResult(result, IRDataType.BYTE, -1, -1)
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}
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private fun funcReverse(call: PtBuiltinFunctionCall): IRCodeChunks {
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private fun funcReverse(call: PtBuiltinFunctionCall): ExpressionCodeResult {
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val arrayName = call.args[0] as PtIdentifier
|
||||
val array = codeGen.symbolTable.flat.getValue(arrayName.name) as StStaticVariable
|
||||
val syscall =
|
||||
|
|
@ -289,10 +231,10 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
|
|||
it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
|
||||
it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
|
||||
}
|
||||
return result
|
||||
return ExpressionCodeResult(result, IRDataType.BYTE, -1, -1)
|
||||
}
|
||||
|
||||
private fun funcSort(call: PtBuiltinFunctionCall): IRCodeChunks {
|
||||
private fun funcSort(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val arrayName = call.args[0] as PtIdentifier
|
||||
val array = codeGen.symbolTable.flat.getValue(arrayName.name) as StStaticVariable
|
||||
val syscall =
|
||||
|
|
@ -312,23 +254,23 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
|
|||
it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
|
||||
it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
|
||||
}
|
||||
return result
|
||||
return ExpressionCodeResult(result, IRDataType.BYTE, -1, -1)
|
||||
}
|
||||
|
||||
private fun funcMkword(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
|
||||
private fun funcMkword(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val result = mutableListOf<IRCodeChunkBase>()
|
||||
val msbTr = exprGen.translateExpression(call.args[0])
|
||||
addToResult(result, msbTr, msbTr.resultReg, -1)
|
||||
val lsbTr = exprGen.translateExpression(call.args[1])
|
||||
require(lsbTr.resultReg!=msbTr.resultReg)
|
||||
addToResult(result, lsbTr, resultRegister, -1)
|
||||
addToResult(result, lsbTr, lsbTr.resultReg, -1)
|
||||
result += IRCodeChunk(null, null).also {
|
||||
it += IRInstruction(Opcode.CONCAT, IRDataType.BYTE, reg1 = resultRegister, reg2 = msbTr.resultReg)
|
||||
it += IRInstruction(Opcode.CONCAT, IRDataType.BYTE, reg1 = lsbTr.resultReg, reg2 = msbTr.resultReg)
|
||||
}
|
||||
return result
|
||||
return ExpressionCodeResult(result, IRDataType.WORD, lsbTr.resultReg, -1)
|
||||
}
|
||||
|
||||
private fun funcPokeW(call: PtBuiltinFunctionCall): IRCodeChunks {
|
||||
private fun funcPokeW(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val result = mutableListOf<IRCodeChunkBase>()
|
||||
if(codeGen.isZero(call.args[1])) {
|
||||
if (call.args[0] is PtNumber) {
|
||||
|
|
@ -364,10 +306,10 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
|
|||
}
|
||||
}
|
||||
}
|
||||
return result
|
||||
return ExpressionCodeResult(result, IRDataType.BYTE, -1, -1)
|
||||
}
|
||||
|
||||
private fun funcPoke(call: PtBuiltinFunctionCall): IRCodeChunks {
|
||||
private fun funcPoke(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val result = mutableListOf<IRCodeChunkBase>()
|
||||
if(codeGen.isZero(call.args[1])) {
|
||||
if (call.args[0] is PtNumber) {
|
||||
|
|
@ -403,50 +345,53 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
|
|||
}
|
||||
}
|
||||
}
|
||||
return result
|
||||
return ExpressionCodeResult(result, IRDataType.BYTE, -1, -1)
|
||||
}
|
||||
|
||||
private fun funcPeekW(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
|
||||
private fun funcPeekW(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val result = mutableListOf<IRCodeChunkBase>()
|
||||
if(call.args[0] is PtNumber) {
|
||||
return if(call.args[0] is PtNumber) {
|
||||
val resultRegister = codeGen.registers.nextFree()
|
||||
val address = (call.args[0] as PtNumber).number.toInt()
|
||||
result += IRCodeChunk(null, null).also {
|
||||
it += IRInstruction(Opcode.LOADM, IRDataType.WORD, reg1 = resultRegister, value = address)
|
||||
}
|
||||
ExpressionCodeResult(result, IRDataType.BYTE, resultRegister, -1)
|
||||
} else {
|
||||
val addressReg = codeGen.registers.nextFree()
|
||||
val tr = exprGen.translateExpression(call.args.single())
|
||||
addToResult(result, tr, addressReg, -1)
|
||||
addToResult(result, tr, tr.resultReg, -1)
|
||||
result += IRCodeChunk(null, null).also {
|
||||
it += IRInstruction(Opcode.LOADI, IRDataType.WORD, reg1 = resultRegister, reg2 = addressReg)
|
||||
it += IRInstruction(Opcode.LOADI, IRDataType.WORD, reg1 = tr.resultReg, reg2 = tr.resultReg)
|
||||
}
|
||||
ExpressionCodeResult(result, IRDataType.WORD, tr.resultReg, -1)
|
||||
}
|
||||
return result
|
||||
}
|
||||
|
||||
private fun funcPeek(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
|
||||
private fun funcPeek(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val result = mutableListOf<IRCodeChunkBase>()
|
||||
if(call.args[0] is PtNumber) {
|
||||
return if(call.args[0] is PtNumber) {
|
||||
val resultRegister = codeGen.registers.nextFree()
|
||||
val address = (call.args[0] as PtNumber).number.toInt()
|
||||
result += IRCodeChunk(null, null).also {
|
||||
it += IRInstruction(Opcode.LOADM, IRDataType.BYTE, reg1 = resultRegister, value = address)
|
||||
}
|
||||
ExpressionCodeResult(result, IRDataType.BYTE, resultRegister, -1)
|
||||
} else {
|
||||
val addressReg = codeGen.registers.nextFree()
|
||||
val tr = exprGen.translateExpression(call.args.single())
|
||||
addToResult(result, tr, addressReg, -1)
|
||||
addToResult(result, tr, tr.resultReg, -1)
|
||||
result += IRCodeChunk(null, null).also {
|
||||
it += IRInstruction(Opcode.LOADI, IRDataType.BYTE, reg1 = resultRegister, reg2 = addressReg)
|
||||
it += IRInstruction(Opcode.LOADI, IRDataType.BYTE, reg1 = tr.resultReg, reg2 = tr.resultReg)
|
||||
}
|
||||
ExpressionCodeResult(result, IRDataType.BYTE, tr.resultReg, -1)
|
||||
}
|
||||
return result
|
||||
}
|
||||
|
||||
private fun funcMemory(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
|
||||
private fun funcMemory(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val name = (call.args[0] as PtString).value
|
||||
val code = IRCodeChunk(null, null)
|
||||
code += IRInstruction(Opcode.LOAD, IRDataType.WORD, reg1=resultRegister, labelSymbol = "prog8_slabs.prog8_memoryslab_$name")
|
||||
return listOf(code)
|
||||
val resultReg = codeGen.registers.nextFree()
|
||||
code += IRInstruction(Opcode.LOAD, IRDataType.WORD, reg1=resultReg, labelSymbol = "prog8_slabs.prog8_memoryslab_$name")
|
||||
return ExpressionCodeResult(code, IRDataType.BYTE, resultReg, -1)
|
||||
}
|
||||
|
||||
private fun funcLsb(call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
|
|
@ -466,16 +411,16 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
|
|||
return ExpressionCodeResult(result, IRDataType.BYTE, resultRegister, -1)
|
||||
}
|
||||
|
||||
private fun funcRolRor(opcode: Opcode, call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
|
||||
private fun funcRolRor(opcode: Opcode, call: PtBuiltinFunctionCall): ExpressionCodeResult {
|
||||
val vmDt = codeGen.irType(call.args[0].type)
|
||||
val result = mutableListOf<IRCodeChunkBase>()
|
||||
val tr = exprGen.translateExpression(call.args[0])
|
||||
addToResult(result, tr, resultRegister, -1)
|
||||
addToResult(result, tr, tr.resultReg, -1)
|
||||
result += IRCodeChunk(null, null).also {
|
||||
it += IRInstruction(opcode, vmDt, reg1 = resultRegister)
|
||||
it += IRInstruction(opcode, vmDt, reg1 = tr.resultReg)
|
||||
}
|
||||
result += assignRegisterTo(call.args[0], resultRegister)
|
||||
return result
|
||||
result += assignRegisterTo(call.args[0], tr.resultReg)
|
||||
return ExpressionCodeResult(result, vmDt, -1, -1)
|
||||
}
|
||||
|
||||
private fun assignRegisterTo(target: PtExpression, register: Int): IRCodeChunks {
|
||||
|
|
|
|||
|
|
@ -459,7 +459,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addInstr(result, IRInstruction(ins, IRDataType.BYTE, reg1 = resultRegister, reg2 = zeroRegister), null)
|
||||
} else {
|
||||
if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, SyscallRegisterBase, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -475,7 +475,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
IRInstruction(Opcode.SGTS, IRDataType.BYTE, reg1 = resultRegister, reg2 = 1)
|
||||
}
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -516,7 +516,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addInstr(result, IRInstruction(ins, IRDataType.BYTE, reg1 = resultRegister, reg2 = zeroRegister), null)
|
||||
} else {
|
||||
if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, SyscallRegisterBase, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -532,7 +532,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
IRInstruction(Opcode.SLTS, IRDataType.BYTE, reg1 = resultRegister, reg2 = 1)
|
||||
}
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -589,7 +589,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
val opcode = if (notEquals) Opcode.SNZ else Opcode.SZ
|
||||
addInstr(result, IRInstruction(opcode, vmDt, reg1 = resultRegister, reg2 = resultRegister), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -610,7 +610,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
val opc = if (signed) Opcode.ASR else Opcode.LSR
|
||||
addInstr(result, IRInstruction(opc, vmDt, reg1 = resultRegister), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -650,7 +650,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addToResult(result, tr, resultRegister, -1)
|
||||
addInstr(result, IRInstruction(Opcode.LSL, vmDt, reg1=resultRegister), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -687,7 +687,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addToResult(result, tr, resultRegister, -1)
|
||||
addInstr(result, IRInstruction(Opcode.XOR, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt()), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -775,7 +775,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addToResult(result, tr, resultRegister, -1)
|
||||
addInstr(result, IRInstruction(Opcode.MOD, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt()), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -907,7 +907,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
val factor = constFactorRight.number.toFloat()
|
||||
result += codeGen.multiplyByConstFloat(resultFpRegister, factor)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, -1, resultFpRegister)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultFpReg!=leftTr.resultFpReg)
|
||||
|
|
@ -926,7 +926,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
val factor = constFactorRight.number.toInt()
|
||||
result += codeGen.multiplyByConst(vmDt, resultRegister, factor)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -984,7 +984,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addToResult(result, tr, -1, resultFpRegister)
|
||||
addInstr(result, IRInstruction(Opcode.SUB, vmDt, fpReg1 = resultFpRegister, fpValue = (binExpr.right as PtNumber).number.toFloat()), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, -1, resultFpRegister)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultFpReg!=leftTr.resultFpReg)
|
||||
|
|
@ -1004,7 +1004,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addToResult(result, tr, resultRegister, -1)
|
||||
addInstr(result, IRInstruction(Opcode.SUB, vmDt, reg1 = resultRegister, value = (binExpr.right as PtNumber).number.toInt()), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
@ -1075,7 +1075,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addToResult(result, tr, -1, resultFpRegister)
|
||||
addInstr(result, IRInstruction(Opcode.ADD, vmDt, fpReg1 = resultFpRegister, fpValue = (binExpr.right as PtNumber).number.toFloat()), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, -1, resultFpRegister)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultFpReg!=leftTr.resultFpReg)
|
||||
|
|
@ -1100,7 +1100,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
|
|||
addToResult(result, tr, resultRegister, -1)
|
||||
addInstr(result, IRInstruction(Opcode.ADD, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt()), null)
|
||||
} else {
|
||||
val leftTr = translateExpression(binExpr.right)
|
||||
val leftTr = translateExpression(binExpr.left)
|
||||
addToResult(result, leftTr, resultRegister, -1)
|
||||
val rightTr = translateExpression(binExpr.right)
|
||||
require(rightTr.resultReg!=leftTr.resultReg)
|
||||
|
|
|
|||
|
|
@ -999,14 +999,13 @@ class IRCodeGen(
|
|||
val branchDt: IRDataType
|
||||
if(irDtLeft==IRDataType.FLOAT) {
|
||||
branchDt = IRDataType.BYTE
|
||||
val leftFpReg = registers.nextFreeFloat()
|
||||
val rightFpReg = registers.nextFreeFloat()
|
||||
compResultReg = registers.nextFree()
|
||||
val tr = expressionEval.translateExpression(ifElse.condition.left)
|
||||
addToResult(result, tr, -1, leftFpReg)
|
||||
val leftTr = expressionEval.translateExpression(ifElse.condition.left)
|
||||
addToResult(result, leftTr, -1, leftTr.resultFpReg)
|
||||
result += IRCodeChunk(null, null).also {
|
||||
val rightFpReg = registers.nextFreeFloat()
|
||||
it += IRInstruction(Opcode.LOAD, IRDataType.FLOAT, fpReg1 = rightFpReg, fpValue = 0f)
|
||||
it += IRInstruction(Opcode.FCOMP, IRDataType.FLOAT, reg1=compResultReg, fpReg1 = leftFpReg, fpReg2 = rightFpReg)
|
||||
it += IRInstruction(Opcode.FCOMP, IRDataType.FLOAT, reg1=compResultReg, fpReg1 = leftTr.resultFpReg, fpReg2 = rightFpReg)
|
||||
}
|
||||
elseBranch = when (ifElse.condition.operator) {
|
||||
"==" -> Opcode.BNZ
|
||||
|
|
@ -1279,16 +1278,14 @@ class IRCodeGen(
|
|||
addInstr(result, IRInstruction(Opcode.RETURN), null)
|
||||
} else {
|
||||
if(value.type==DataType.FLOAT) {
|
||||
val reg = registers.nextFreeFloat()
|
||||
val tr = expressionEval.translateExpression(value)
|
||||
addToResult(result, tr, -1, reg)
|
||||
addInstr(result, IRInstruction(Opcode.RETURNREG, IRDataType.FLOAT, fpReg1 = reg), null)
|
||||
addToResult(result, tr, -1, tr.resultFpReg)
|
||||
addInstr(result, IRInstruction(Opcode.RETURNREG, IRDataType.FLOAT, fpReg1 = tr.resultFpReg), null)
|
||||
}
|
||||
else {
|
||||
val reg = registers.nextFree()
|
||||
val tr = expressionEval.translateExpression(value)
|
||||
addToResult(result, tr, reg, -1)
|
||||
addInstr(result, IRInstruction(Opcode.RETURNREG, irType(value.type) , reg1=reg), null)
|
||||
addToResult(result, tr, tr.resultReg, -1)
|
||||
addInstr(result, IRInstruction(Opcode.RETURNREG, irType(value.type) , reg1=tr.resultReg), null)
|
||||
}
|
||||
}
|
||||
return result
|
||||
|
|
|
|||
|
|
@ -3,7 +3,6 @@ TODO
|
|||
|
||||
For next minor release
|
||||
^^^^^^^^^^^^^^^^^^^^^^
|
||||
- fix VM bsieve not printing the last number and string correctly
|
||||
- fix IR/VM crashing in bouncegfx and textelite
|
||||
- reduce the usage of register.nextFree() in IR codegen
|
||||
- get rid of ResultRegister in IR codegen? as the calls now encode this into the new opcodes...
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user