mirror of
https://github.com/irmen/prog8.git
synced 2026-04-21 02:16:41 +00:00
IR: avoid redundant CMPI in if-expressions, remove dead stores
This commit is contained in:
Irmen de Jong
@@ -409,22 +409,37 @@ gradle :languageServer:test -Dlsp.verbose=true
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Note: By default, Gradle only shows failed tests. Passed and skipped tests are silent.
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**Test filtering patterns:**
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**⚠️ CRITICAL: Test Filtering Patterns - Read This First!**
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Gradle's `--tests` filter has **strict rules** that are easy to get wrong:
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| Pattern | Example | Works? |
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|---------|---------|--------|
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| Full class name | `--tests "prog8tests.compiler.TestOptimization"` | ✅ Yes |
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| **Full class name** | `--tests "prog8tests.compiler.TestOptimization"` | ✅ **USE THIS** |
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| Wildcard at END | `--tests "prog8tests.compiler.Test*"` | ✅ Yes |
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| Wildcard on package | `--tests "prog8tests.compiler.*"` | ✅ Yes |
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| Wildcard at START | `--tests "*TestOptimization"` | ❌ No |
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| Test description | `--tests "*Optimization*inline*"` | ❌ No |
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| **Wildcard at START** | `--tests "*TestOptimization"` | ❌ **FAILS SILENTLY** |
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| Test description | `--tests "*Optimization*inline*"` | ❌ **FAILS SILENTLY** |
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**✅ CORRECT - Always use exact fully qualified class name:**
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```bash
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gradle :compiler:test --tests "prog8tests.vm.TestCompilerVirtual"
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gradle :compiler:test --tests "prog8tests.compiler.TestOptimization"
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```
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**❌ WRONG - These patterns FAIL (tests won't run, but gradle reports success):**
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```bash
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gradle :compiler:test --tests "*TestCompilerVirtual" # FAILS
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gradle :compiler:test --tests "*TestOptimization*" # FAILS
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gradle :compiler:test --tests "*Optimization*inline*" # FAILS
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```
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**Alternative with `-PtestFilter`** (supports wildcards anywhere):
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```bash
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gradle test -PtestFilter="*Optimization"
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gradle test -PtestFilter="*Optimization" # Works with wildcards
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```
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**Why the restrictions?** Gradle's `--tests` filter requires the **fully qualified class name**. Wildcards work as **suffixes** only. KoTest test names like `"inline multi-value void"` are _descriptions_, not method names, so you cannot filter by them.
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**Why the restrictions?** Gradle's `--tests` filter matches **fully qualified class names only**. Wildcards work as **suffixes** (e.g., `Test*`) but NOT as prefixes (e.g., `*Test`). KoTest test names like `"inline multi-value void"` are _descriptions_, not method names, so you cannot filter by them.
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**To find failing tests after a run:**
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```bash
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@@ -229,10 +229,15 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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}
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// TODO don't store condition as expression result but just use the flags, like a normal PtIfElse translation does
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// Use status flags from condition expression when possible, avoiding redundant CMPI #0
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val condTr = translateExpression(ifExpr.condition)
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addToResult(result, condTr, condTr.resultReg, -1)
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addInstr(result, IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=condTr.resultReg, immediate = 0), null)
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// Check if the last instruction already sets status flags - if so, skip the CMPI #0
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val lastInstr = condTr.chunks.lastOrNull()?.instructions?.lastOrNull()
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val skipCmpi = lastInstr != null && lastInstr.opcode in OpcodesThatSetStatusbits
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if (!skipCmpi) {
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addInstr(result, IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=condTr.resultReg, immediate = 0), null)
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}
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addInstr(result, IRInstruction(Opcode.BSTEQ, labelSymbol = falseLabel), null)
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if (irDt != IRDataType.FLOAT) {
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@@ -3,6 +3,14 @@ package prog8.codegen.intermediate
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import prog8.code.core.IErrorReporter
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import prog8.intermediate.*
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/**
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* Represents what value a register currently holds for LOADR forwarding optimization.
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*/
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private sealed class RegisterContent {
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data class Constant(val value: Any) : RegisterContent() // Int or Double
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data class Register(val originalReg: Int) : RegisterContent()
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}
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class IRPeepholeOptimizer(private val irprog: IRProgram, private val retainSSA: Boolean) {
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fun optimize(optimizationsEnabled: Boolean, errors: IErrorReporter) {
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if(!optimizationsEnabled)
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@@ -55,6 +63,8 @@ class IRPeepholeOptimizer(private val irprog: IRProgram, private val retainSSA:
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|| cleanupPushPop(chunk1, indexedInstructions)
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|| simplifyConstantReturns(chunk1, indexedInstructions)
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|| removeNeedlessLoads(chunk1, indexedInstructions)
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|| removeDeadStores(chunk1, indexedInstructions)
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// || removeLoadrForwarding(chunk1, indexedInstructions) // DISABLED - needs debugging
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|| removeNops(chunk1, indexedInstructions) // last time, in case one of the optimizers replaced something with a nop
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} while (changed)
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}
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@@ -521,11 +531,11 @@ jump p8_label_gen_2
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Opcode.ADDR -> optimizeImmediateLoadAssociative(Opcode.ADD)
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Opcode.MULR -> optimizeImmediateLoadAssociative(Opcode.MUL)
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Opcode.MULSR -> optimizeImmediateLoadAssociative(Opcode.MULS)
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// Opcode.SUBR -> TODO("ir peephole Subr")
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// Opcode.DIVR -> TODO("ir peephole Divr")
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// Opcode.DIVSR -> TODO("ir peephole Divsr")
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// Opcode.MODR -> TODO("ir peephole Modr")
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// Opcode.DIVMODR -> TODO("ir peephole DivModr")
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Opcode.SUBR -> optimizeImmediateLoadAssociative(Opcode.SUB)
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Opcode.DIVR -> optimizeImmediateLoadAssociative(Opcode.DIV)
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Opcode.DIVSR -> optimizeImmediateLoadAssociative(Opcode.DIVS)
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Opcode.MODR -> optimizeImmediateLoadAssociative(Opcode.MOD)
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// Opcode.DIVMODR - skipped, no immediate DIVMOD variant exists
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else -> {}
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}
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}
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@@ -593,4 +603,103 @@ jump p8_label_gen_2
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}
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return changed
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}
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}
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private fun removeDeadStores(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
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// Detect and remove dead stores: when a register is written but never read before being overwritten.
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// Example:
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// LOAD r1, #5 <- dead store (r1 overwritten before use)
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// LOAD r1, #10
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// USE r1
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// Track for each register: (index of last write, whether value was read since)
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val pendingWrites = mutableMapOf<Int, Pair<Int, Boolean>>() // reg -> (writeIdx, wasRead)
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val deadStores = mutableSetOf<Int>()
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indexedInstructions.forEach { (idx, ins) ->
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val formats = instructionFormats.getValue(ins.opcode)
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val format = formats[ins.type] ?: formats[null]
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// First, check if this instruction READS any registers
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if(format?.reg1 == OperandDirection.READ || format?.reg1 == OperandDirection.READWRITE) {
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val reg = ins.reg1 ?: ins.fpReg1
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if(reg != null) {
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val existing = pendingWrites[reg]
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if(existing != null) {
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pendingWrites[reg] = existing.first to true
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}
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}
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}
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if(format?.reg2 == OperandDirection.READ || format?.reg2 == OperandDirection.READWRITE) {
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val reg = ins.reg2 ?: ins.fpReg2
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if(reg != null) {
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val existing = pendingWrites[reg]
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if(existing != null) {
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pendingWrites[reg] = existing.first to true
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}
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}
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}
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if(format?.reg3 == OperandDirection.READ || format?.reg3 == OperandDirection.READWRITE) {
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val reg = ins.reg3
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if(reg != null) {
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val existing = pendingWrites[reg]
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if(existing != null) {
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pendingWrites[reg] = existing.first to true
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}
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}
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}
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// Then, check if this instruction WRITES to any registers
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if(format?.reg1 == OperandDirection.WRITE || format?.reg1 == OperandDirection.READWRITE) {
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val reg = ins.reg1 ?: ins.fpReg1
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if(reg != null && reg != 0) {
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// Check if previous write to this reg was dead (never read before this overwrite)
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val existing = pendingWrites[reg]
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if(existing != null && !existing.second) {
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deadStores.add(existing.first)
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}
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// Record this new write as pending (not yet read)
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pendingWrites[reg] = idx to false
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}
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}
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}
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// Any remaining pending writes that were never read are also dead
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// (unless they're the final value needed - but we can't know that here)
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// Actually, we should NOT remove these because they might be the final value
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// Remove dead stores (in reverse order to preserve indices)
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var changed = false
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deadStores.sortedDescending().forEach { idx ->
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if(idx < chunk.instructions.size) {
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chunk.instructions.removeAt(idx)
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changed = true
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}
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}
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return changed
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}
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private fun isRegisterRead(ins: IRInstruction, reg: Int): Boolean {
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// Check if the instruction reads from the given register
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val formats = instructionFormats.getValue(ins.opcode)
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val format = formats[ins.type] ?: formats[null]
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val reg1Read = (format?.reg1 == OperandDirection.READ || format?.reg1 == OperandDirection.READWRITE) && (ins.reg1 == reg || ins.fpReg1 == reg)
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val reg2Read = (format?.reg2 == OperandDirection.READ || format?.reg2 == OperandDirection.READWRITE) && (ins.reg2 == reg || ins.fpReg2 == reg)
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val reg3Read = (format?.reg3 == OperandDirection.READ || format?.reg3 == OperandDirection.READWRITE) && (ins.reg3 == reg)
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return reg1Read || reg2Read || reg3Read
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}
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//private fun removeLoadrForwarding(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
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// Forward LOADR instructions to their original source.
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// Example:
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// LOAD r1, #5
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// LOADR r2, r1 -> LOAD r2, #5
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// LOADR r3, r2 -> LOAD r3, #5
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// todo: This needs more careful implementation considering:
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// - Cross-chunk register usage
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// - Function call side effects
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// - Proper invalidation of register tracking
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//}
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}
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@@ -153,28 +153,31 @@ class TestIRPeepholeOpt: FunSpec({
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}
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test("remove useless div/mul, add/sub") {
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// Use different registers for each test case to avoid dead store elimination removing them
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val irProg = makeIRProgram(listOf(
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IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=42, immediate = 1),
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IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=42, immediate = 1),
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IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=42, immediate = 1),
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IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=42, immediate = 1),
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IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=42, immediate = 2),
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IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=42, immediate = 2),
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IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=42, immediate = 2),
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IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=42, immediate = 2),
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IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=42, immediate = 0),
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IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=42, immediate = 0)
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IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=1, immediate = 1),
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IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=2, immediate = 1),
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IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=3, immediate = 1),
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IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=4, immediate = 1),
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IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=5, immediate = 2),
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IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=6, immediate = 2),
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IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=7, immediate = 2),
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IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=8, immediate = 2),
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IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=9, immediate = 0),
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IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=10, immediate = 0)
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))
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irProg.chunks().single().instructions.size shouldBe 10
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val opt = IRPeepholeOptimizer(irProg, false)
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opt.optimize(true, ErrorReporterForTests())
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// First 4 are removed (div/mul/mod by 1), last 2 become no-ops (add/sub 0)
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irProg.chunks().single().instructions.size shouldBe 4
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}
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test("replace add/sub 1 by inc/dec") {
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// Use different registers for each test case to avoid dead store elimination removing them
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val irProg = makeIRProgram(listOf(
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IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=42, immediate = 1),
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IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=42, immediate = 1)
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IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=1, immediate = 1),
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IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=2, immediate = 1)
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))
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irProg.chunks().single().instructions.size shouldBe 2
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val opt = IRPeepholeOptimizer(irProg, false)
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@@ -186,40 +189,51 @@ class TestIRPeepholeOpt: FunSpec({
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}
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test("remove useless and/or/xor") {
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// Use different registers for each test case to avoid dead store elimination removing them
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val irProg = makeIRProgram(listOf(
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=42, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, immediate = 255),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, immediate = 65535),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=42, immediate = 2147483647),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=42, immediate = -1),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, immediate = 0),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, immediate = 255),
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IRInstruction(Opcode.OR, IRDataType.WORD, reg1=42, immediate = 65535),
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IRInstruction(Opcode.OR, IRDataType.LONG, reg1=42, immediate = 2147483647),
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IRInstruction(Opcode.OR, IRDataType.LONG, reg1=42, immediate = -1),
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IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=42, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, immediate = 200),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, immediate = 60000),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, immediate = 1),
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IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=42, immediate = 1)
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=1, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=2, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=3, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=4, immediate = 255),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=5, immediate = 65535),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=6, immediate = 2147483647),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=7, immediate = -1),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=8, immediate = 0),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=9, immediate = 255),
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IRInstruction(Opcode.OR, IRDataType.WORD, reg1=10, immediate = 65535),
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IRInstruction(Opcode.OR, IRDataType.LONG, reg1=11, immediate = 2147483647),
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IRInstruction(Opcode.OR, IRDataType.LONG, reg1=12, immediate = -1),
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IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=13, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=14, immediate = 200),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=15, immediate = 60000),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=16, immediate = 1),
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IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=17, immediate = 1)
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))
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irProg.chunks().single().instructions.size shouldBe 17
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val opt = IRPeepholeOptimizer(irProg, false)
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opt.optimize(true, ErrorReporterForTests())
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// After optimization:
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// - AND #0 (3x) -> LOAD #0
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// - AND #max (2x) -> removed
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// - AND #other (3x) -> stays
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// - OR #0 (1x) -> removed
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// - OR #max (3x) -> LOAD #max
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// - XOR #0 (1x) -> removed
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// - other (3x) -> stays
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// Total: 17 - 5 (removed) = 12, with 6 LOAD instructions
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irProg.chunks().single().instructions.size shouldBe 12
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irProg.chunks().single().instructions.count { it.opcode == Opcode.LOAD } shouldBe 6
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}
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test("replace and/or/xor by constant number") {
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// Use different registers for each test case to avoid dead store elimination removing them
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val irProg = makeIRProgram(listOf(
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=42, immediate = 0),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, immediate = 255),
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IRInstruction(Opcode.OR, IRDataType.WORD, reg1=42, immediate = 65535),
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IRInstruction(Opcode.OR, IRDataType.LONG, reg1=42, immediate = -1)
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IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=1, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.WORD, reg1=2, immediate = 0),
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IRInstruction(Opcode.AND, IRDataType.LONG, reg1=3, immediate = 0),
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IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=4, immediate = 255),
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IRInstruction(Opcode.OR, IRDataType.WORD, reg1=5, immediate = 65535),
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IRInstruction(Opcode.OR, IRDataType.LONG, reg1=6, immediate = -1)
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))
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irProg.chunks().single().instructions.size shouldBe 6
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val opt = IRPeepholeOptimizer(irProg, false)
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@@ -239,4 +253,48 @@ class TestIRPeepholeOpt: FunSpec({
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instr[4].immediate shouldBe 65535
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instr[5].immediate shouldBe -1
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}
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test("replace register arithmetic by immediate operations") {
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// Test the new optimization: LOAD + SUBR/DIVR/MODR → immediate operation
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// Pattern: LOAD r1, #const followed by SUBR r2, r1 → SUB r2, #const
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// SUBR optimization
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val subrProg = makeIRProgram(listOf(
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IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=1, immediate = 5),
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IRInstruction(Opcode.SUBR, IRDataType.BYTE, reg1=2, reg2=1)
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))
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subrProg.chunks().single().instructions.size shouldBe 2
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val opt1 = IRPeepholeOptimizer(subrProg, false)
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opt1.optimize(true, ErrorReporterForTests())
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val subInstr = subrProg.chunks().single().instructions
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subInstr.size shouldBe 1
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subInstr[0].opcode shouldBe Opcode.SUB
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subInstr[0].immediate shouldBe 5
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|
||||
// DIVR optimization
|
||||
val divrProg = makeIRProgram(listOf(
|
||||
IRInstruction(Opcode.LOAD, IRDataType.WORD, reg1=10, immediate = 100),
|
||||
IRInstruction(Opcode.DIVR, IRDataType.WORD, reg1=20, reg2=10)
|
||||
))
|
||||
divrProg.chunks().single().instructions.size shouldBe 2
|
||||
val opt2 = IRPeepholeOptimizer(divrProg, false)
|
||||
opt2.optimize(true, ErrorReporterForTests())
|
||||
val divInstr = divrProg.chunks().single().instructions
|
||||
divInstr.size shouldBe 1
|
||||
divInstr[0].opcode shouldBe Opcode.DIV
|
||||
divInstr[0].immediate shouldBe 100
|
||||
|
||||
// MODR optimization
|
||||
val modrProg = makeIRProgram(listOf(
|
||||
IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=30, immediate = 7),
|
||||
IRInstruction(Opcode.MODR, IRDataType.BYTE, reg1=40, reg2=30)
|
||||
))
|
||||
modrProg.chunks().single().instructions.size shouldBe 2
|
||||
val opt3 = IRPeepholeOptimizer(modrProg, false)
|
||||
opt3.optimize(true, ErrorReporterForTests())
|
||||
val modInstr = modrProg.chunks().single().instructions
|
||||
modInstr.size shouldBe 1
|
||||
modInstr[0].opcode shouldBe Opcode.MOD
|
||||
modInstr[0].immediate shouldBe 7
|
||||
}
|
||||
})
|
||||
@@ -4,6 +4,7 @@ import io.kotest.assertions.throwables.shouldThrow
|
||||
import io.kotest.core.spec.style.FunSpec
|
||||
import io.kotest.engine.spec.tempdir
|
||||
import io.kotest.matchers.collections.shouldBeIn
|
||||
import io.kotest.matchers.ints.shouldBeGreaterThan
|
||||
import io.kotest.matchers.ints.shouldBeLessThanOrEqual
|
||||
import io.kotest.matchers.shouldBe
|
||||
import io.kotest.matchers.shouldNotBe
|
||||
@@ -368,6 +369,75 @@ main {
|
||||
instructions.last().opcode shouldBe Opcode.RETURN
|
||||
}
|
||||
|
||||
test("if-expression skips redundant CMPI when condition sets flags") {
|
||||
val src = """
|
||||
main {
|
||||
sub start() {
|
||||
bool flag = true
|
||||
cx16.r0L = if flag then 1 else 0
|
||||
}
|
||||
}"""
|
||||
val result = compileText(VMTarget(), optimize=false, src, outputDir, writeAssembly=true)!!
|
||||
val virtfile = result.compilationOptions.outputDir.resolve(result.compilerAst.name + ".p8ir")
|
||||
val irProgram = IRFileReader().read(virtfile)
|
||||
val start = irProgram.blocks[0].children[0] as IRSubroutine
|
||||
val instructions = start.chunks.flatMap { c->c.instructions }
|
||||
|
||||
// Find LOADM for 'flag' variable - use contains match since scoped name may vary
|
||||
val loadmIdx = instructions.indexOfFirst { it.opcode == Opcode.LOADM && it.labelSymbol?.contains("flag") == true }
|
||||
loadmIdx shouldBeGreaterThan -1
|
||||
|
||||
// After LOADM, there should be a BSTEQ/BSTNE branch, not CMPI #0
|
||||
val nextInstr = instructions[loadmIdx + 1]
|
||||
nextInstr.opcode shouldBeIn setOf(Opcode.BSTEQ, Opcode.BSTNE)
|
||||
}
|
||||
|
||||
test("if-statement skips redundant CMPI when condition sets flags") {
|
||||
val src = """
|
||||
main {
|
||||
sub start() {
|
||||
bool flag = true
|
||||
if flag {
|
||||
cx16.r0L = 1
|
||||
} else {
|
||||
cx16.r0L = 0
|
||||
}
|
||||
}
|
||||
}"""
|
||||
val result = compileText(VMTarget(), optimize=false, src, outputDir, writeAssembly=true)!!
|
||||
val virtfile = result.compilationOptions.outputDir.resolve(result.compilerAst.name + ".p8ir")
|
||||
val irProgram = IRFileReader().read(virtfile)
|
||||
val start = irProgram.blocks[0].children[0] as IRSubroutine
|
||||
val instructions = start.chunks.flatMap { c->c.instructions }
|
||||
|
||||
// Find LOADM for 'flag' variable - use contains match since scoped name may vary
|
||||
val loadmIdx = instructions.indexOfFirst { it.opcode == Opcode.LOADM && it.labelSymbol?.contains("flag") == true }
|
||||
loadmIdx shouldBeGreaterThan -1
|
||||
|
||||
// After LOADM, there should be a BSTEQ/BSTNE branch, not CMPI #0
|
||||
val nextInstr = instructions[loadmIdx + 1]
|
||||
nextInstr.opcode shouldBeIn setOf(Opcode.BSTEQ, Opcode.BSTNE)
|
||||
}
|
||||
|
||||
test("if-expression keeps CMPI when condition doesn't set flags") {
|
||||
val src = """
|
||||
main {
|
||||
sub start() {
|
||||
sub getflag() -> bool { return true }
|
||||
cx16.r0L = if getflag() then 1 else 0
|
||||
}
|
||||
}"""
|
||||
val result = compileText(VMTarget(), optimize=false, src, outputDir, writeAssembly=true)!!
|
||||
val virtfile = result.compilationOptions.outputDir.resolve(result.compilerAst.name + ".p8ir")
|
||||
val irProgram = IRFileReader().read(virtfile)
|
||||
val start = irProgram.blocks[0].children[0] as IRSubroutine
|
||||
val instructions = start.chunks.flatMap { c->c.instructions }
|
||||
|
||||
// Should contain CMPI #0 after function call (since CALL doesn't set flags)
|
||||
val cmpiInstr = instructions.find { it.opcode == Opcode.CMPI && it.immediate == 0 }
|
||||
cmpiInstr shouldNotBe null
|
||||
}
|
||||
|
||||
test("repeat counts (const)") {
|
||||
val src="""
|
||||
main {
|
||||
|
||||
Reference in New Issue
Block a user