fix void/nonvoid assign target issue

This commit is contained in:
Irmen de Jong
2026-01-24 01:11:30 +01:00
parent 9a5edeebbc
commit 5d5ad8a70e
3 changed files with 12 additions and 9 deletions
@@ -927,7 +927,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
require(parameter.register in Cx16VirtualRegisters) { "can only use R0-R15 'registers' here" }
val regname = parameter.register!!.asScopedNameVirtualReg(parameter.type).joinToString(".")
val assign = PtAssignment(fcall.position)
val target = PtAssignTarget(true, fcall.position)
val target = PtAssignTarget(false, fcall.position)
target.add(PtIdentifier(regname, parameter.type, fcall.position))
assign.add(target)
assign.add(arg)
@@ -116,7 +116,7 @@ private fun setDeferMasks(program: PtProgram, errors: IErrorReporter): Map<PtSub
val scope = defer.parent
val idx = scope.children.indexOf(defer)
val enableDefer = PtAugmentedAssign("|=", defer.position)
val target = PtAssignTarget(true, defer.position)
val target = PtAssignTarget(false, defer.position)
target.add(PtIdentifier(sub.scopedName+"."+maskVarName, DataType.UBYTE, defer.position))
enableDefer.add(target)
// enable the bit for this defer (beginning with high bits so the handler can simply shift right to check them in reverse order)
+10 -7
View File
@@ -199,13 +199,16 @@ class PtAssignTarget(val void: Boolean, position: Position) : PtNode(position) {
val type: DataType
get() {
return when(val tgt = children.single()) {
is PtIdentifier -> tgt.type
is PtArrayIndexer -> tgt.type
is PtMemoryByte -> tgt.type
is PtPointerDeref -> tgt.type
else -> throw AssemblyError("weird target $tgt")
}
return if(void)
DataType.UNDEFINED
else
when(val tgt = children.single()) {
is PtIdentifier -> tgt.type
is PtArrayIndexer -> tgt.type
is PtMemoryByte -> tgt.type
is PtPointerDeref -> tgt.type
else -> throw AssemblyError("weird target $tgt")
}
}
infix fun isSameAs(expression: PtExpression): Boolean = !void && expression.isSameAs(this)