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https://github.com/irmen/prog8.git
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vm postincrdecr on array done
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@@ -386,7 +386,25 @@ class CodeGen(internal val program: PtProgram,
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code += VmCodeInstruction(operation, vmDt, reg1=resultReg)
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code += VmCodeInstruction(Opcode.STOREI, vmDt, reg1=resultReg, reg2=addressReg)
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} else if (array!=null) {
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TODO("postincrdecr array")
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val variable = array.variable.targetName
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var variableAddr = allocations.get(variable)
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val itemsize = program.memsizer.memorySize(array.type)
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val fixedIndex = (array.index as? PtNumber)?.number?.toInt()
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val memOp = when(postIncrDecr.operator) {
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"++" -> Opcode.INCM
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"--" -> Opcode.DECM
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else -> throw AssemblyError("weird operator")
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}
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if(fixedIndex!=null) {
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variableAddr += fixedIndex*itemsize
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code += VmCodeInstruction(memOp, vmDt, value=variableAddr)
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} else {
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val indexReg = vmRegisters.nextFree()
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code += expressionEval.translateExpression(array.index, indexReg)
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code += VmCodeInstruction(Opcode.LOADX, vmDt, reg1=resultReg, reg2=indexReg, value=variableAddr)
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code += VmCodeInstruction(operation, vmDt, reg1=resultReg)
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code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1=resultReg, reg2=indexReg, value=variableAddr)
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}
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} else
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throw AssemblyError("weird assigntarget")
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@@ -526,7 +544,7 @@ class CodeGen(internal val program: PtProgram,
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private var labelSequenceNumber = 0
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internal fun createLabelName(): List<String> {
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labelSequenceNumber++
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return listOf("generated$labelSequenceNumber")
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return listOf("prog8_label_gen_$labelSequenceNumber")
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}
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internal fun translateBuiltinFunc(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk =
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@@ -96,11 +96,12 @@ internal class ExpressionGen(private val codeGen: CodeGen) {
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val vmDt = codeGen.vmType(arrayIx.type)
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val code = VmCodeChunk()
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val idxReg = codeGen.vmRegisters.nextFree()
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// TODO: optimized code when the index is a constant value
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code += translateExpression(arrayIx.index, idxReg)
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if(eltSize>1) {
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val factorReg = codeGen.vmRegisters.nextFree()
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code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=factorReg, value=eltSize)
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code += VmCodeInstruction(Opcode.MUL, VmDataType.BYTE, reg1=idxReg, reg2=factorReg)
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code += VmCodeInstruction(Opcode.MUL, VmDataType.BYTE, reg1=idxReg, reg2=idxReg, reg3=factorReg)
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}
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val arrayLocation = codeGen.allocations.get(arrayIx.variable.targetName)
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code += VmCodeInstruction(Opcode.LOADX, vmDt, reg1=resultRegister, reg2=idxReg, value = arrayLocation)
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