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vm: ifElse codegen uses proper branching instructions now
This commit is contained in:
Irmen de Jong
parent
a7df828932
commit
6e31eebfb5
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@ -95,8 +95,8 @@ class PtForLoop(position: Position) : PtNode(position) {
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class PtIfElse(position: Position) : PtNode(position) {
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val condition: PtExpression
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get() = children[0] as PtExpression
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val condition: PtBinaryExpression
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get() = children[0] as PtBinaryExpression
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val ifScope: PtNodeGroup
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get() = children[1] as PtNodeGroup
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val elseScope: PtNodeGroup
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@ -465,46 +465,95 @@ class CodeGen(internal val program: PtProgram,
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}
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private fun translate(ifElse: PtIfElse): VmCodeChunk {
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var branch = Opcode.BZ
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var condition = ifElse.condition
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if(ifElse.condition.operator !in ComparisonOperators)
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throw AssemblyError("if condition should only be a binary comparison expression")
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val cond = ifElse.condition as? PtBinaryExpression
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if(cond!=null && constValue(cond.right)==0.0) {
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if(cond.operator == "==") {
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// if X==0 ... so we branch on Not-zero instead.
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branch = Opcode.BNZ
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condition = cond.left
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}
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else if(cond.operator == "!=") {
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// if X!=0 ... so we keep branching on Zero.
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condition = cond.left
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}
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}
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val conditionReg = vmRegisters.nextFree()
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val vmDt = vmType(condition.type)
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val signed = ifElse.condition.left.type in arrayOf(DataType.BYTE, DataType.WORD, DataType.FLOAT)
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val vmDt = vmType(ifElse.condition.type)
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val code = VmCodeChunk()
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code += expressionEval.translateExpression(condition, conditionReg, -1)
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if(ifElse.elseScope.children.isNotEmpty()) {
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// if and else parts
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val elseLabel = createLabelName()
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val afterIfLabel = createLabelName()
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code += VmCodeInstruction(branch, vmDt, reg1=conditionReg, symbol = elseLabel)
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code += translateNode(ifElse.ifScope)
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code += VmCodeInstruction(Opcode.JUMP, symbol = afterIfLabel)
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code += VmCodeLabel(elseLabel)
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code += translateNode(ifElse.elseScope)
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code += VmCodeLabel(afterIfLabel)
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} else {
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// only if part
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val afterIfLabel = createLabelName()
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code += VmCodeInstruction(branch, vmDt, reg1=conditionReg, symbol = afterIfLabel)
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code += translateNode(ifElse.ifScope)
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code += VmCodeLabel(afterIfLabel)
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fun translateNonZeroComparison(): VmCodeChunk {
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val elseBranch = when(ifElse.condition.operator) {
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"==" -> Opcode.BNE
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"!=" -> Opcode.BEQ
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"<" -> if(signed) Opcode.BGES else Opcode.BGE
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">" -> if(signed) Opcode.BLES else Opcode.BLE
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"<=" -> if(signed) Opcode.BGTS else Opcode.BGT
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">=" -> if(signed) Opcode.BLTS else Opcode.BLT
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else -> throw AssemblyError("invalid comparison operator")
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}
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val leftReg = vmRegisters.nextFree()
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val rightReg = vmRegisters.nextFree()
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code += expressionEval.translateExpression(ifElse.condition.left, leftReg, -1)
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code += expressionEval.translateExpression(ifElse.condition.right, rightReg, -1)
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if(ifElse.elseScope.children.isNotEmpty()) {
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// if and else parts
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val elseLabel = createLabelName()
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val afterIfLabel = createLabelName()
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code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, reg2=rightReg, symbol = elseLabel)
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code += translateNode(ifElse.ifScope)
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code += VmCodeInstruction(Opcode.JUMP, symbol = afterIfLabel)
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code += VmCodeLabel(elseLabel)
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code += translateNode(ifElse.elseScope)
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code += VmCodeLabel(afterIfLabel)
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} else {
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// only if part
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val afterIfLabel = createLabelName()
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code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, reg2=rightReg, symbol = afterIfLabel)
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code += translateNode(ifElse.ifScope)
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code += VmCodeLabel(afterIfLabel)
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}
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return code
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}
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return code
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fun translateZeroComparison(): VmCodeChunk {
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fun equalOrNotEqualZero(elseBranch: Opcode): VmCodeChunk {
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val leftReg = vmRegisters.nextFree()
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code += expressionEval.translateExpression(ifElse.condition.left, leftReg, -1)
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if(ifElse.elseScope.children.isNotEmpty()) {
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// if and else parts
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val elseLabel = createLabelName()
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val afterIfLabel = createLabelName()
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code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, symbol = elseLabel)
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code += translateNode(ifElse.ifScope)
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code += VmCodeInstruction(Opcode.JUMP, symbol = afterIfLabel)
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code += VmCodeLabel(elseLabel)
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code += translateNode(ifElse.elseScope)
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code += VmCodeLabel(afterIfLabel)
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} else {
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// only if part
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val afterIfLabel = createLabelName()
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code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, symbol = afterIfLabel)
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code += translateNode(ifElse.ifScope)
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code += VmCodeLabel(afterIfLabel)
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}
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return code
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}
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return when (ifElse.condition.operator) {
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"==" -> {
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// if X==0 ... so we just branch on left expr is Not-zero.
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equalOrNotEqualZero(Opcode.BNZ)
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}
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"!=" -> {
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// if X!=0 ... so we just branch on left expr is Zero.
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equalOrNotEqualZero(Opcode.BZ)
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}
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else -> {
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// another comparison against 0, just use regular codegen for this.
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translateNonZeroComparison()
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}
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}
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}
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return if(constValue(ifElse.condition.right)==0.0)
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translateZeroComparison()
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else
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translateNonZeroComparison()
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}
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private fun translate(postIncrDecr: PtPostIncrDecr): VmCodeChunk {
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val code = VmCodeChunk()
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val operationMem: Opcode
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@ -603,7 +652,7 @@ class CodeGen(internal val program: PtProgram,
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}
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private fun translate(assignment: PtAssignment): VmCodeChunk {
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// TODO can in-place assignments be optimized more?
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// TODO can in-place assignments be optimized more? use special memory versions of instructions instead of register ones?
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// note: assigning array and string values is done via an explicit memcopy/stringcopy function call.
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if(assignment.target.children.single() is PtMachineRegister)
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throw AssemblyError("assigning to a register should be done by just evaluating the expression into resultregister")
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@ -3,9 +3,9 @@ TODO
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For next release
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^^^^^^^^^^^^^^^^
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- vm: use more instructions in codegen: branching, don't use the conditional set instructions here
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- vm: get rid of all the conditional set instructions
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- vm: add more instructions operating directly on memory instead of only registers?
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- vm: check array type in PtAssignTarget
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- in-place modifiying functions (rol, ror, ..) don't accept a memory address but require a memory-read expression. that is weird.
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- complete the Inliner
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- add McCarthy evaluation to shortcircuit and/or expressions. First do ifs by splitting them up? Then do expressions that compute a value?
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@ -28,6 +28,19 @@ main {
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ubyte lowb = 4
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ubyte highb = $ea
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if lowb+4
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lowb++
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if math.sin8u(lowb)
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lowb++
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if lowb
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lowb++
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if lowb==0
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lowb++
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if lowb!=0
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lowb++
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if lowb==3
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lowb++
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@ -184,16 +184,16 @@ enum class Opcode {
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BSTPOS,
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BZ,
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BNZ,
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BEQ, // TODO not used in codegen??? == nonzero
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BNE, // TODO not used in codegen??? != nonzero
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BLT, // TODO not used in codegen??? <
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BLTS, // TODO not used in codegen??? <
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BGT, // TODO not used in codegen??? >
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BGTS, // TODO not used in codegen??? >
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BLE, // TODO should be used in codegen conditional branch too
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BLES, // TODO should be used in codegen conditional branch too
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BGE, // TODO not used in codegen??? >=
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BGES, // TODO not used in codegen??? >=
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BEQ,
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BNE,
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BLT,
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BLTS,
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BGT,
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BGTS,
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BLE,
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BLES,
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BGE,
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BGES,
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SEQ,
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SNE,
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SLT,
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