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cx16 reserved zp vars (virtual registers)
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@ -68,21 +68,6 @@ class CX16MachineDefinition: IMachineDefinition {
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override fun isIOAddress(address: UInt): Boolean = address==0u || address==1u || address in 0x9f00u..0x9fffu
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// TODO integrate this in the internal list of allocated zp variables:
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// override fun getPreallocatedZeropageVars(): Map<String, Pair<UInt, DataType>> {
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// val vars = mutableMapOf<String, Pair<UInt, DataType>>()
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// for(reg in 0..15) {
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// vars["cx16.r${reg}"] = (2+reg*2).toUInt() to DataType.UWORD // cx16.r0 .. cx16.r15
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// vars["cx16.r${reg}s"] = (2+reg*2).toUInt() to DataType.WORD // cx16.r0s .. cx16.r15s
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// vars["cx16.r${reg}L"] = (2+reg*2).toUInt() to DataType.UBYTE // cx16.r0L .. cx16.r15L
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// vars["cx16.r${reg}H"] = (3+reg*2).toUInt() to DataType.UBYTE // cx16.r0H .. cx16.r15H
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// vars["cx16.r${reg}sL"] = (2+reg*2).toUInt() to DataType.BYTE // cx16.r0sL .. cx16.r15sL
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// vars["cx16.r${reg}sH"] = (3+reg*2).toUInt() to DataType.BYTE // cx16.r0sH .. cx16.r15sH
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// }
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// return vars
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// }
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override fun initializeZeropage(compilerOptions: CompilationOptions) {
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zeropage = CX16Zeropage(compilerOptions)
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}
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@ -1,5 +1,6 @@
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package prog8.codegen.target.cx16
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import prog8.ast.base.DataType
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import prog8.compilerinterface.CompilationOptions
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import prog8.compilerinterface.InternalCompilerException
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import prog8.compilerinterface.Zeropage
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@ -37,5 +38,15 @@ class CX16Zeropage(options: CompilationOptions) : Zeropage(options) {
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}
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removeReservedFromFreePool()
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for(reg in 0..15) {
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allocatedVariables["cx16.r${reg}"] = ((2+reg*2).toUInt() to 2) to DataType.UWORD // cx16.r0 .. cx16.r15
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allocatedVariables["cx16.r${reg}s"] = ((2+reg*2).toUInt() to 2) to DataType.WORD // cx16.r0s .. cx16.r15s
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allocatedVariables["cx16.r${reg}L"] = ((2+reg*2).toUInt() to 1) to DataType.UBYTE // cx16.r0L .. cx16.r15L
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allocatedVariables["cx16.r${reg}H"] = ((3+reg*2).toUInt() to 1) to DataType.UBYTE // cx16.r0H .. cx16.r15H
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allocatedVariables["cx16.r${reg}sL"] = ((2+reg*2).toUInt() to 1) to DataType.BYTE // cx16.r0sL .. cx16.r15sL
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allocatedVariables["cx16.r${reg}sH"] = ((3+reg*2).toUInt() to 1) to DataType.BYTE // cx16.r0sH .. cx16.r15sH
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}
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}
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}
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@ -11,6 +11,7 @@ import io.kotest.matchers.collections.shouldBeIn
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import io.kotest.matchers.collections.shouldNotBeIn
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import io.kotest.matchers.comparables.shouldBeGreaterThan
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import io.kotest.matchers.shouldBe
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import io.kotest.matchers.shouldNotBe
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import prog8.ast.base.DataType
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import prog8.ast.expressions.Expression
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import prog8.ast.statements.RegisterOrStatusflag
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@ -287,4 +288,15 @@ class TestCx16Zeropage: FunSpec({
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0x02u shouldNotBeIn zp1.free
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0x21u shouldNotBeIn zp1.free
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}
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test("preallocated zp vars") {
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val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, LauncherType.NONE, ZeropageType.FULL, emptyList(), false, false, Cx16Target))
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zp1.allocatedZeropageVariable("test") shouldBe null
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zp1.allocatedZeropageVariable("cx16.r0") shouldNotBe null
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zp1.allocatedZeropageVariable("cx16.r15") shouldNotBe null
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zp1.allocatedZeropageVariable("cx16.r0L") shouldNotBe null
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zp1.allocatedZeropageVariable("cx16.r15L") shouldNotBe null
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zp1.allocatedZeropageVariable("cx16.r0sH") shouldNotBe null
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zp1.allocatedZeropageVariable("cx16.r15sH") shouldNotBe null
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}
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})
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@ -104,5 +104,5 @@ abstract class Zeropage(protected val options: CompilationOptions) {
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fun allocatedZeropageVariable(scopedname: String): Pair<Pair<UInt, Int>, DataType>? = allocatedVariables[scopedname]
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private val allocatedVariables = mutableMapOf<String, Pair<Pair<UInt, Int>, DataType>>()
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protected val allocatedVariables = mutableMapOf<String, Pair<Pair<UInt, Int>, DataType>>()
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}
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@ -4,7 +4,6 @@ TODO
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For next compiler release (7.7)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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- fix array and string initialization in zeropage
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- fix cx16 zeropage preallocated vars (virtual regs)
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- fix ForloopAsmGen zp allocation handling
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- check all examples if they still run correctly (c64 + cx16)
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- document check: arrays and strings can also be placed in zeropage (but almost never should, due to size!)
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