mirror of
https://github.com/irmen/prog8.git
synced 2024-06-26 07:29:32 +00:00
fixed vm problem with branching instructions in global init chunk
This commit is contained in:
Irmen de Jong
parent
4db4a5f1b2
commit
de3d0b40dc
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@ -148,6 +148,7 @@ class IRUnusedCodeRemover(
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val entrypointSub = irprog.blocks.single { it.label=="main" }
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.children.single { it is IRSubroutine && it.label=="main.start" }
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val reachable = mutableSetOf((entrypointSub as IRSubroutine).chunks.first())
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reachable.add(irprog.globalInits)
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// all chunks referenced in array initializer values are also 'reachable':
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irprog.st.allVariables()
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@ -230,6 +231,7 @@ class IRUnusedCodeRemover(
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}
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}
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linkedChunks.add(irprog.globalInits)
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return removeUnlinkedChunks(linkedChunks)
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}
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@ -69,6 +69,25 @@ class TestOptimization: FunSpec({
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}
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}
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test("don't remove empty subroutine if it's referenced in vardecl") {
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val sourcecode = """
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main {
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ubyte tw = other.width()
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sub start() {
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tw++
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}
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}
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other {
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sub width() -> ubyte {
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cx16.r0++
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return 80
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}
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}"""
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compileText(C64Target(), true, sourcecode, writeAssembly = true) shouldNotBe null
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compileText(VMTarget(), true, sourcecode, writeAssembly = true) shouldNotBe null
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}
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test("generated constvalue from typecast inherits proper parent linkage") {
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val number = NumericLiteral(DataType.UBYTE, 11.0, Position.DUMMY)
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val tc = TypecastExpression(number, DataType.BYTE, false, Position.DUMMY)
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@ -59,10 +59,11 @@ main {
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VmRunner().runProgram(virtfile.readText())
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}
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test("compile virtual: str args and return type") {
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test("compile virtual: str args and return type, and global var init") {
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val src = """
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main {
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ubyte @shared dvar = test.dummy()
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sub start() {
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sub testsub(str s1) -> str {
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return "result"
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@ -70,6 +71,13 @@ main {
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uword result = testsub("arg")
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}
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}
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test {
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sub dummy() -> ubyte {
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cx16.r0++
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return 80
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}
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}"""
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val target = VMTarget()
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var result = compileText(target, false, src, writeAssembly = true)!!
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@ -467,4 +475,6 @@ main {
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compileText(VMTarget(), true, src, writeAssembly = true) shouldNotBe null
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}
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})
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@ -69,10 +69,11 @@ class CallGraph(private val program: Program) : IAstVisitor {
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override fun visit(functionCallExpr: FunctionCallExpression) {
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val otherSub = functionCallExpr.target.targetSubroutine(program)
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if (otherSub != null) {
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functionCallExpr.definingSubroutine?.let { thisSub ->
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calls[thisSub] = calls.getValue(thisSub) + otherSub
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calledBy[otherSub] = calledBy.getValue(otherSub) + functionCallExpr
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val definingSub = functionCallExpr.definingSubroutine
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if(definingSub!=null) {
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calls[definingSub] = calls.getValue(definingSub) + otherSub
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}
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calledBy[otherSub] = calledBy.getValue(otherSub) + functionCallExpr
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}
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super.visit(functionCallExpr)
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}
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@ -1,8 +1,6 @@
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TODO
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====
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fix ubyte width = text.width() text.width() gets removed as 'unused subroutine'
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vm textelite: after 1 galaxy jump: galaxy maps shows wrong planet name until you redraw them a second time. Current planet name changes when showing maps and asking planet i)nfo!
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...
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@ -1,14 +1,16 @@
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%import textio
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%zeropage basicsafe
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%option no_sysinit
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main {
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ubyte tw = text.width()
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ubyte tw = other.width()
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sub start() {
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tw++
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txt.print_uw(tw)
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}
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}
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text {
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other {
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sub width() -> ubyte {
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cx16.r0++
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return 80
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@ -57,7 +57,10 @@ class IRProgram(val name: String,
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fun allSubs(): Sequence<IRSubroutine> = blocks.asSequence().flatMap { it.children.filterIsInstance<IRSubroutine>() }
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fun foreachSub(operation: (sub: IRSubroutine) -> Unit) = allSubs().forEach { operation(it) }
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fun foreachCodeChunk(operation: (chunk: IRCodeChunkBase) -> Unit) = allSubs().flatMap { it.chunks }.forEach { operation(it) }
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fun foreachCodeChunk(operation: (chunk: IRCodeChunkBase) -> Unit) {
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allSubs().flatMap { it.chunks }.forEach { operation(it) }
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operation(globalInits)
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}
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fun getChunkWithLabel(label: String): IRCodeChunkBase {
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for(sub in allSubs()) {
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for(chunk in sub.chunks) {
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@ -123,44 +126,46 @@ class IRProgram(val name: String,
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}
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}
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fun linkCodeChunk(chunk: IRCodeChunk, next: IRCodeChunkBase?) {
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// link sequential chunks
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val jump = chunk.instructions.lastOrNull()?.opcode
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if (jump == null || jump !in OpcodesThatJump) {
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// no jump at the end, so link to next chunk (if it exists)
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if(next!=null) {
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if (next is IRCodeChunk && chunk.instructions.lastOrNull()?.opcode !in OpcodesThatJump)
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chunk.next = next
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else if(next is IRInlineAsmChunk)
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chunk.next = next
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else if(next is IRInlineBinaryChunk)
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chunk.next =next
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else
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throw AssemblyError("code chunk followed by invalid chunk type $next")
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}
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}
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// link all jump and branching instructions to their target
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chunk.instructions.forEach {
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if(it.opcode in OpcodesThatBranch && it.opcode!=Opcode.JUMPI && it.opcode!=Opcode.RETURN && it.opcode!=Opcode.RETURNR && it.labelSymbol!=null) {
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if(it.labelSymbol.startsWith('$') || it.labelSymbol.first().isDigit()) {
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// it's a call to an address (romsub most likely)
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require(it.address!=null)
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} else {
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it.branchTarget = labeledChunks.getValue(it.labelSymbol)
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}
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}
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}
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}
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fun linkSubroutineChunks(sub: IRSubroutine) {
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sub.chunks.withIndex().forEach { (index, chunk) ->
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fun nextChunk(): IRCodeChunkBase? = if(index<sub.chunks.size-1) sub.chunks[index + 1] else null
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val next = if(index<sub.chunks.size-1) sub.chunks[index + 1] else null
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when (chunk) {
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is IRCodeChunk -> {
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// link sequential chunks
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val jump = chunk.instructions.lastOrNull()?.opcode
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if (jump == null || jump !in OpcodesThatJump) {
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// no jump at the end, so link to next chunk (if it exists)
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val next = nextChunk()
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if(next!=null) {
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if (next is IRCodeChunk && chunk.instructions.lastOrNull()?.opcode !in OpcodesThatJump)
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chunk.next = next
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else if(next is IRInlineAsmChunk)
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chunk.next = next
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else if(next is IRInlineBinaryChunk)
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chunk.next =next
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else
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throw AssemblyError("code chunk followed by invalid chunk type $next")
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}
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}
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// link all jump and branching instructions to their target
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chunk.instructions.forEach {
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if(it.opcode in OpcodesThatBranch && it.opcode!=Opcode.JUMPI && it.opcode!=Opcode.RETURN && it.opcode!=Opcode.RETURNR && it.labelSymbol!=null) {
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if(it.labelSymbol.startsWith('$') || it.labelSymbol.first().isDigit()) {
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// it's a call to an address (romsub most likely)
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require(it.address!=null)
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} else {
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it.branchTarget = labeledChunks.getValue(it.labelSymbol)
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}
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}
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}
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linkCodeChunk(chunk, next)
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}
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is IRInlineAsmChunk -> {
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val next = nextChunk()
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if(next!=null) {
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val lastInstr = chunk.instructions.lastOrNull()
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if(lastInstr==null || lastInstr.opcode !in OpcodesThatJump)
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@ -184,9 +189,64 @@ class IRProgram(val name: String,
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}
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}
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}
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linkCodeChunk(globalInits, globalInits.next)
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}
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fun validate() {
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fun validateChunk(chunk: IRCodeChunkBase, sub: IRSubroutine?, emptyChunkIsAllowed: Boolean) {
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if (chunk is IRCodeChunk) {
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if(!emptyChunkIsAllowed)
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require(chunk.instructions.isNotEmpty() || chunk.label != null)
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if(chunk.instructions.lastOrNull()?.opcode in OpcodesThatJump)
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require(chunk.next == null) { "chunk ending with a jump or return shouldn't be linked to next" }
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else if (sub!=null) {
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// if chunk is NOT the last in the block, it needs to link to next.
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val isLast = sub.chunks.last() === chunk
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require(isLast || chunk.next != null) { "chunk needs to be linked to next" }
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}
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}
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else {
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require(chunk.instructions.isEmpty())
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if(chunk is IRInlineAsmChunk)
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require(!chunk.isIR) { "inline IR-asm should have been converted into regular code chunk"}
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}
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chunk.instructions.withIndex().forEach { (index, instr) ->
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if(instr.labelSymbol!=null && instr.opcode in OpcodesThatBranch) {
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if(instr.opcode==Opcode.JUMPI) {
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val pointervar = st.lookup(instr.labelSymbol)!!
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when(pointervar) {
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is IRStStaticVariable -> require(pointervar.dt==DataType.UWORD)
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is IRStMemVar -> require(pointervar.dt==DataType.UWORD)
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else -> throw AssemblyError("weird pointervar type")
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}
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}
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else if(!instr.labelSymbol.startsWith('$') && !instr.labelSymbol.first().isDigit())
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require(instr.branchTarget != null) { "branching instruction to label should have branchTarget set" }
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}
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if(instr.opcode==Opcode.PREPARECALL) {
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var i = index+1
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var instr2 = chunk.instructions[i]
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val registers = mutableSetOf<Int>()
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while(instr2.opcode!=Opcode.SYSCALL && instr2.opcode!=Opcode.CALL && i<chunk.instructions.size-1) {
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if(instr2.reg1direction==OperandDirection.WRITE || instr2.reg1direction==OperandDirection.READWRITE) registers.add(instr2.reg1!!)
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if(instr2.reg2direction==OperandDirection.WRITE || instr2.reg2direction==OperandDirection.READWRITE) registers.add(instr2.reg2!!)
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if(instr2.reg3direction==OperandDirection.WRITE || instr2.reg3direction==OperandDirection.READWRITE) registers.add(instr2.reg3!!)
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if(instr2.fpReg1direction==OperandDirection.WRITE || instr2.fpReg1direction==OperandDirection.READWRITE) registers.add(instr2.fpReg1!!)
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if(instr2.fpReg2direction==OperandDirection.WRITE || instr2.fpReg2direction==OperandDirection.READWRITE) registers.add(instr2.fpReg2!!)
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i++
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instr2 = chunk.instructions[i]
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}
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// it could be that the actual call is only in another code chunk, so IF we find one, we can check. Otherwise just skip the check...
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if(chunk.instructions[i].fcallArgs!=null) {
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val expectedRegisterLoads = chunk.instructions[i].fcallArgs!!.arguments.map { it.reg.registerNum }
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require(registers.containsAll(expectedRegisterLoads)) { "not all argument registers are given a value in the preparecall-call sequence" }
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}
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}
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}
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}
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validateChunk(globalInits, null, true)
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blocks.forEach { block ->
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if(block.isNotEmpty()) {
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block.children.filterIsInstance<IRInlineAsmChunk>().forEach { chunk ->
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@ -197,57 +257,7 @@ class IRProgram(val name: String,
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if(sub.chunks.isNotEmpty()) {
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require(sub.chunks.first().label == sub.label) { "first chunk in subroutine should have sub name (label) as its label" }
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}
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sub.chunks.forEach { chunk ->
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if (chunk is IRCodeChunk) {
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require(chunk.instructions.isNotEmpty() || chunk.label != null)
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if(chunk.instructions.lastOrNull()?.opcode in OpcodesThatJump)
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require(chunk.next == null) { "chunk ending with a jump or return shouldn't be linked to next" }
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else {
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// if chunk is NOT the last in the block, it needs to link to next.
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val isLast = sub.chunks.last() === chunk
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require(isLast || chunk.next != null) { "chunk needs to be linked to next" }
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}
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}
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else {
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require(chunk.instructions.isEmpty())
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if(chunk is IRInlineAsmChunk)
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require(!chunk.isIR) { "inline IR-asm should have been converted into regular code chunk"}
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}
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chunk.instructions.withIndex().forEach { (index, instr) ->
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if(instr.labelSymbol!=null && instr.opcode in OpcodesThatBranch) {
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if(instr.opcode==Opcode.JUMPI) {
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val pointervar = st.lookup(instr.labelSymbol)!!
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when(pointervar) {
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is IRStStaticVariable -> require(pointervar.dt==DataType.UWORD)
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is IRStMemVar -> require(pointervar.dt==DataType.UWORD)
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else -> throw AssemblyError("weird pointervar type")
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}
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}
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else if(!instr.labelSymbol.startsWith('$') && !instr.labelSymbol.first().isDigit())
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require(instr.branchTarget != null) { "branching instruction to label should have branchTarget set" }
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}
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if(instr.opcode==Opcode.PREPARECALL) {
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var i = index+1
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var instr2 = chunk.instructions[i]
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val registers = mutableSetOf<Int>()
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while(instr2.opcode!=Opcode.SYSCALL && instr2.opcode!=Opcode.CALL && i<chunk.instructions.size-1) {
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if(instr2.reg1direction==OperandDirection.WRITE || instr2.reg1direction==OperandDirection.READWRITE) registers.add(instr2.reg1!!)
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if(instr2.reg2direction==OperandDirection.WRITE || instr2.reg2direction==OperandDirection.READWRITE) registers.add(instr2.reg2!!)
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if(instr2.reg3direction==OperandDirection.WRITE || instr2.reg3direction==OperandDirection.READWRITE) registers.add(instr2.reg3!!)
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if(instr2.fpReg1direction==OperandDirection.WRITE || instr2.fpReg1direction==OperandDirection.READWRITE) registers.add(instr2.fpReg1!!)
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if(instr2.fpReg2direction==OperandDirection.WRITE || instr2.fpReg2direction==OperandDirection.READWRITE) registers.add(instr2.fpReg2!!)
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i++
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instr2 = chunk.instructions[i]
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}
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// it could be that the actual call is only in another code chunk, so IF we find one, we can check. Otherwise just skip the check...
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if(chunk.instructions[i].fcallArgs!=null) {
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val expectedRegisterLoads = chunk.instructions[i].fcallArgs!!.arguments.map { it.reg.registerNum }
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require(registers.containsAll(expectedRegisterLoads)) { "not all argument registers are given a value in the preparecall-call sequence" }
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}
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}
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}
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}
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sub.chunks.forEach { validateChunk(it, sub, false) }
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}
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}
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}
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@ -63,11 +63,11 @@ class VmProgramLoader {
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}
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}
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pass2translateSyscalls(programChunks)
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pass2translateSyscalls(programChunks + irProgram.globalInits)
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pass2replaceLabelsByProgIndex(programChunks, variableAddresses, subroutines)
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phase2relinkReplacedChunks(chunkReplacements, programChunks)
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programChunks.forEach {
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(programChunks + irProgram.globalInits).forEach {
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it.instructions.forEach { ins ->
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if (ins.labelSymbol != null && ins.opcode !in OpcodesThatBranch)
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require(ins.address != null) { "instruction with labelSymbol for a var should have value set to the memory address" }
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@ -78,8 +78,8 @@ class VmProgramLoader {
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}
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private fun phase2relinkReplacedChunks(
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replacements: MutableList<Pair<IRCodeChunkBase, IRCodeChunk>>,
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programChunks: MutableList<IRCodeChunk>
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replacements: List<Pair<IRCodeChunkBase, IRCodeChunk>>,
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programChunks: List<IRCodeChunk>
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) {
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replacements.forEach { (old, new) ->
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programChunks.forEach { chunk ->
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@ -97,7 +97,7 @@ class VmProgramLoader {
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}
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}
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private fun pass2translateSyscalls(chunks: MutableList<IRCodeChunk>) {
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private fun pass2translateSyscalls(chunks: List<IRCodeChunk>) {
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chunks.forEach { chunk ->
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chunk.instructions.withIndex().forEach { (index, ins) ->
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if(ins.opcode == Opcode.SYSCALL) {
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@ -147,7 +147,7 @@ class VmProgramLoader {
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}
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private fun pass2replaceLabelsByProgIndex(
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chunks: MutableList<IRCodeChunk>,
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chunks: List<IRCodeChunk>,
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variableAddresses: MutableMap<String, Int>,
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subroutines: MutableMap<String, IRSubroutine>
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) {
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