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v14.0-BETA2
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v12.3.4
| Author | SHA1 | Date | |
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ee09d35fdc |
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@@ -44,6 +44,11 @@ enum class CpuType(val statusBitsOnMultiByteOps: Boolean) {
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* behavior consistent across all current targets.
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*/
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VIRTUAL(false)
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;
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/** True for the 6502-family targets (plain 6502 and 65C02). */
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val is6502: Boolean
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get() = this == CPU6502 || this == CPU65C02
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}
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interface ICompilationTarget: IStringEncoding, IMemSizer {
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@@ -888,7 +888,10 @@ class IRCodeGen(
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val chunk2 = addConstMem(loopvarDtIr, null, loopvarSymbol, iterable.step)
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if(loopvarDtIr==IRDataType.BYTE && iterable.step==-1 && iterable.last==0) {
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// downto 0 optimization (byte)
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if(loopvarDt.isSignedByte || iterable.first<=127) {
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// Only rely on DECM setting status bits on targets where it actually does (6502 hardware,
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// or targets that honor the strict multi-byte status-bits contract). On the VM DECM
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// leaves flags untouched, so BSTPOS would read stale state and loop forever.
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if((loopvarDt.isSignedByte || iterable.first<=127) && (options.compTarget.cpu.is6502 || options.compTarget.cpu.statusBitsOnMultiByteOps)) {
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chunk2 += IRInstruction(Opcode.BSTPOS, labelSymbol = loopLabel)
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} else {
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chunk2 += IRInstruction(Opcode.LOADM, loopvarDtIr, reg1 = indexReg, labelSymbol = loopvarSymbol)
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+8
-10
@@ -1,14 +1,12 @@
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main {
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const uword STACK_SIZE = 10
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struct Stack {
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uword[STACK_SIZE] stack1
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uword[20] stack2
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uword top
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}
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%import textio
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%zeropage basicsafe
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main {
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sub start() {
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^^Stack st = []
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st.stack1[5] = 9999
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st.stack2[5] = 8888
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for cx16.r0L in 5 downto 0 {
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txt.print_ub(cx16.r0L)
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txt.spc()
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}
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}
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}
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+1
-1
@@ -4,4 +4,4 @@ org.gradle.parallel=true
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org.gradle.daemon=true
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org.gradle.configuration-cache=false
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kotlin.code.style=official
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version=12.3.4-SNAPSHOT
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version=12.3.4
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