Uthernet II: the real hardware only decodes A0 and A1, so we introduce a 0x03 mask. (PR #1115)

Fixes #1113
This commit is contained in:
Andrea 2022-06-17 22:27:52 +02:00 committed by GitHub
parent 6a934bcfef
commit b3e617f1e5
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 8 additions and 5 deletions

View File

@ -1407,7 +1407,7 @@ BYTE Uthernet2::IO_C0(WORD programcounter, WORD address, BYTE write, BYTE value,
const uint16_t oldAddress = myDataAddress;
#endif
const uint8_t loc = address & 0x0F;
const uint8_t loc = address & U2_C0X_MASK;
if (write)
{

View File

@ -2,10 +2,13 @@
// Uthernet II registers
#define U2_C0X_MODE_REGISTER 0x04
#define U2_C0X_ADDRESS_HIGH 0x05
#define U2_C0X_ADDRESS_LOW 0x06
#define U2_C0X_DATA_PORT 0x07
// only A0 and A1 are decoded
#define U2_C0X_MASK 0x03
#define U2_C0X_MODE_REGISTER (0x04 & U2_C0X_MASK)
#define U2_C0X_ADDRESS_HIGH (0x05 & U2_C0X_MASK)
#define U2_C0X_ADDRESS_LOW (0x06 & U2_C0X_MASK)
#define U2_C0X_DATA_PORT (0x07 & U2_C0X_MASK)
// W5100 registers and values