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110 lines
4.2 KiB
C
110 lines
4.2 KiB
C
#pragma once
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// Uthernet II registers
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// only A0 and A1 are decoded
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#define U2_C0X_MASK 0x03
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#define U2_C0X_MODE_REGISTER (0x04 & U2_C0X_MASK)
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#define U2_C0X_ADDRESS_HIGH (0x05 & U2_C0X_MASK)
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#define U2_C0X_ADDRESS_LOW (0x06 & U2_C0X_MASK)
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#define U2_C0X_DATA_PORT (0x07 & U2_C0X_MASK)
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// W5100 registers and values
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#define W5100_MR 0x0000
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#define W5100_GAR0 0x0001
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#define W5100_GAR3 0x0004
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#define W5100_SUBR0 0x0005
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#define W5100_SUBR3 0x0008
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#define W5100_SHAR0 0x0009
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#define W5100_SHAR5 0x000E
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#define W5100_SIPR0 0x000F
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#define W5100_SIPR3 0x0012
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#define W5100_RTR0 0x0017
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#define W5100_RTR1 0x0018
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#define W5100_RCR 0x0019
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#define W5100_RMSR 0x001A
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#define W5100_TMSR 0x001B
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#define W5100_PTIMER 0x0028
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#define W5100_UPORT1 0x002F
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#define W5100_S0_BASE 0x0400
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#define W5100_S3_MAX 0x07FF
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#define W5100_TX_BASE 0x4000
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#define W5100_RX_BASE 0x6000
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#define W5100_MEM_MAX 0x7FFF
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#define W5100_MEM_SIZE 0x8000
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#define W5100_MR_IND 0x01 // 0
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#define W5100_MR_AI 0x02 // 1
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#define W5100_MR_PPOE 0x08 // 3
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#define W5100_MR_PB 0x10 // 4
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#define W5100_MR_RST 0x80 // 7
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#define W5100_SN_MR_PROTO_MASK 0x0F
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#define W5100_SN_MR_MF 0x40 // 6
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#define W5100_SN_MR_CLOSED 0x00
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#define W5100_SN_MR_TCP 0x01
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#define W5100_SN_MR_UDP 0x02
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#define W5100_SN_MR_IPRAW 0x03
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#define W5100_SN_MR_MACRAW 0x04
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#define W5100_SN_MR_PPPOE 0x05
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#define W5100_SN_VIRTUAL_DNS 0x08 // not present on real hardware, see comment in Uthernet2.cpp
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#define W5100_SN_MR_TCP_DNS (W5100_SN_VIRTUAL_DNS | W5100_SN_MR_TCP)
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#define W5100_SN_MR_UDP_DNS (W5100_SN_VIRTUAL_DNS | W5100_SN_MR_UDP)
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#define W5100_SN_MR_IPRAW_DNS (W5100_SN_VIRTUAL_DNS | W5100_SN_MR_IPRAW)
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#define W5100_SN_CR_OPEN 0x01
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#define W5100_SN_CR_LISTENT 0x02
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#define W5100_SN_CR_CONNECT 0x04
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#define W5100_SN_CR_DISCON 0x08
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#define W5100_SN_CR_CLOSE 0x10
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#define W5100_SN_CR_SEND 0x20
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#define W5100_SN_CR_RECV 0x40
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#define W5100_SN_MR 0x00
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#define W5100_SN_CR 0x01
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#define W5100_SN_SR 0x03
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#define W5100_SN_PORT0 0x04
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#define W5100_SN_PORT1 0x05
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#define W5100_SN_DHAR0 0x06
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#define W5100_SN_DHAR1 0x07
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#define W5100_SN_DHAR2 0x08
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#define W5100_SN_DHAR3 0x09
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#define W5100_SN_DHAR4 0x0A
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#define W5100_SN_DHAR5 0x0B
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#define W5100_SN_DIPR0 0x0C
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#define W5100_SN_DIPR1 0x0D
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#define W5100_SN_DIPR2 0x0E
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#define W5100_SN_DIPR3 0x0F
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#define W5100_SN_DPORT0 0x10
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#define W5100_SN_DPORT1 0x11
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#define W5100_SN_PROTO 0x14
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#define W5100_SN_TOS 0x15
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#define W5100_SN_TTL 0x16
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#define W5100_SN_TX_FSR0 0x20 // TX Free Size
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#define W5100_SN_TX_FSR1 0x21 // TX Free Size
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#define W5100_SN_TX_RD0 0x22 // TX Read Pointer
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#define W5100_SN_TX_RD1 0x23 // TX Read Pointer
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#define W5100_SN_TX_WR0 0x24 // TX Write Pointer
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#define W5100_SN_TX_WR1 0x25 // TX Write Pointer
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#define W5100_SN_RX_RSR0 0x26 // RX Receive Size
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#define W5100_SN_RX_RSR1 0x27 // RX Receive Size
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#define W5100_SN_RX_RD0 0x28 // RX Read Pointer
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#define W5100_SN_RX_RD1 0x29 // RX Read Pointer
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#define W5100_SN_DNS_NAME_LEN 0x2A // these are not present on real hardware, see comment in Uthernet2.cpp
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#define W5100_SN_DNS_NAME_BEGIN 0x2B
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#define W5100_SN_DNS_NAME_END 0xFF
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#define W5100_SN_DNS_NAME_CPTY (W5100_SN_DNS_NAME_END - W5100_SN_DNS_NAME_BEGIN)
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#define W5100_SN_SR_CLOSED 0x00
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#define W5100_SN_SR_SOCK_INIT 0x13
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#define W5100_SN_SR_SOCK_SYNSENT 0x15
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#define W5100_SN_SR_ESTABLISHED 0x17
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#define W5100_SN_SR_SOCK_UDP 0x22
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#define W5100_SN_SR_SOCK_IPRAW 0x32
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#define W5100_SN_SR_SOCK_MACRAW 0x42
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