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x86_64 target builds

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This commit is contained in:
Aaron Culliney 2014-06-08 11:01:38 -07:00
parent 126d049ffc
commit c33cdb4b25
4 changed files with 69 additions and 31 deletions
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4
configure.ac
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@ -17,10 +17,10 @@ AC_PROG_INSTALL
dnl ---------------------------------------------------------------------------
dnl Arch checks
ASM_O="src/x86/glue.o src/x86/cpu.o"
arch=''
case $target in
x86_64-*-*)
ASM_O="src/x64/glue.o src/x64/cpu.o"
arch='x64'
;;
i?86-*-*)
@ -31,6 +31,7 @@ case $target in
arch='x86'
;;
*)
ASM_O=""
AC_MSG_ERROR([emulator does not presently support architecture $target])
;;
esac
@ -39,7 +40,6 @@ AM_CFLAGS="-std=gnu11 -Wall"
dnl double-check compilation for x86 target
if test "$arch" = "x86" ; then
ASM_O="src/x86/glue.o src/x86/cpu.o"
my_save_cflags="$CFLAGS"
AC_MSG_CHECKING([whether compiler supports x86 target])
case $host in

2
src/meta/debug.l
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@ -967,7 +967,7 @@ void init_lex (char *str, int size) {
}
#define WONT_EXECUTE 0
static volatile int hack_warnings = (int)&hack_warnings;
static volatile void *hack_warnings = &hack_warnings;
if (hack_warnings == WONT_EXECUTE) {
// flex defines these, but we don't use 'em ...
char hack[2];

32
src/x86/cpu-regs.h
View File

@ -21,9 +21,39 @@
#define EffectiveAddr %di /* Effective address */
#if __LP64__
# error not ready
# define SZ_PTR 8
# define _XBP %rbp /* x86_64 base pointer */
# define _XSP %rsp /* x86_64 stack pointer */
# define _XAX %rax /* scratch */
# define _XBX %rbx /* scratch2 */
// full-length Apple ][ registers
# define XY_Reg_X %rbx /* 6502 X&Y flags */
# define AF_Reg_X %rcx /* 6502 F&A flags */
# define SP_Reg_X %rdx /* 6502 Stack pointer */
# define PC_Reg_X %rsi /* 6502 Program Counter */
# define EffectiveAddr_X %rdi /* Effective address */
// full-length assembly instructions
# define addLQ addq
# define andLQ andq
# define decLQ decq
# define orLQ orq
# define movLQ movq
# define movzbLQ movzbq
# define movzwLQ movzwq
# define popaLQ popaq
# define popLQ popq
# define pushaLQ pushaq
# define pushfLQ pushfq
# define pushLQ pushq
# define rorLQ rorq
# define shlLQ shlq
# define shrLQ shrq
# define subLQ subq
# define testLQ testq
# define xorLQ xorq
#else
# define SZ_PTR 4
# define _XBP %ebp /* x86 base pointer */
# define _XSP %esp /* x86 stack pointer */
# define _XAX %eax /* scratch */
# define _XBX %ebx /* scratch2 */

62
src/x86/cpu.S
View File

@ -310,14 +310,6 @@
#define DebugBCDCheck
#endif
#define DoADC_d GetFromEA_B \
DebugBCDCheck \
bt $C_Flag_Bit, AF_Reg_X; \
adcb A_Reg, %al; \
daa; \
movb %al, A_Reg; \
FlagNVZC
#define DoAND GetFromEA_B \
andb %al, A_Reg; \
FlagNZ
@ -411,17 +403,6 @@
adcb %al, A_Reg; \
FlagNVZC
#define DoSBC_d GetFromEA_B \
DebugBCDCheck \
bt $C_Flag_Bit, AF_Reg_X; \
cmc; \
xchgb A_Reg, %al; \
sbbb A_Reg, %al; \
das; \
movb %al, A_Reg; \
cmc; \
FlagNVZC
#define DoSTA movb A_Reg, %al; \
PutToEA_B
@ -460,7 +441,17 @@
// Decimal mode
E(op_ADC_dec)
incb DebugCycleCount // +1 cycle
DoADC_d
GetFromEA_B
DebugBCDCheck
bt $C_Flag_Bit, AF_Reg_X
adcb A_Reg, %al
#ifdef __LP64__
#warning TODO FIXME das instruction
#else
daa
#endif
movb %al, A_Reg
FlagNVZC
Continue
E(op_ADC_imm) // 0x69
@ -818,7 +809,8 @@ E(op_BRK)
Push(%ah)
Push(%al)
orb $(B_Flag|X_Flag), F_Reg
movzbLQ F_Reg, _XAX
xorw %ax, %ax
movb F_Reg, %al
movb SN(cpu65_flags_encode)(,_XAX,1), %al
Push(%al)
orb $I_Flag, F_Reg
@ -1568,7 +1560,20 @@ E(op_RTS) // 0x60
E(op_SBC_dec)
incb DebugCycleCount // +1 cycle
DoSBC_d
GetFromEA_B
DebugBCDCheck
bt $C_Flag_Bit, AF_Reg_X
cmc
xchgb A_Reg, %al
sbbb A_Reg, %al
#ifdef __LP64__
#warning TODO FIXME das instruction
#else
das
#endif
movb %al, A_Reg
cmc
FlagNVZC
Continue
E(op_SBC_imm) // 0xe9
@ -2001,7 +2006,8 @@ ex_irq: testb $I_Flag, F_Reg // Already interrupt
Push(%ah)
Push(%al)
orb $X_Flag, F_Reg
movzbLQ F_Reg, _XAX
xorw %ax, %ax
movb F_Reg, %al
movb SN(cpu65_flags_encode)(,_XAX,1), %al
Push(%al)
orb $(B_Flag | I_Flag), F_Reg
@ -2016,7 +2022,8 @@ ex_irq: testb $I_Flag, F_Reg // Already interrupt
CPU thread main entry and exit points
------------------------------------------------------------------------- */
E(cpu65_run)
pushaLQ // ENTER CPURUN
pushLQ _XBP
movLQ _XSP, _XBP
cmpb $0, SN(emul_reinitialize)
jnz 1f
@ -2053,18 +2060,19 @@ exit_cpu65_run:
movw EffectiveAddr, DebugCurrEA
movw PC_Reg, SN(cpu65_current)
movb A_Reg, SN(cpu65_current)+2
movzbLQ F_Reg, _XAX
xorw %ax, %ax
movb F_Reg, %al
movb SN(cpu65_flags_encode)(,_XAX,1), %al
movb %al, SN(cpu65_current)+3
movb X_Reg, SN(cpu65_current)+4
movb Y_Reg, SN(cpu65_current)+5
movb SP_Reg_L, SN(cpu65_current)+6
popaLQ
popLQ _XBP
ret
emul_reinit: movb $0, SN(cpu65__signal)
movb $1, SN(emul_reinitialize)
popaLQ
popLQ _XBP
ret
/* -------------------------------------------------------------------------